228 static int mb86a20s_i2c_writereg(struct mb86a20s_state *state,  in mb86a20s_i2c_writereg()  argument
237 	rc = i2c_transfer(state->i2c, &msg, 1);  in mb86a20s_i2c_writereg()
239 		dev_err(&state->i2c->dev,  in mb86a20s_i2c_writereg()
248 static int mb86a20s_i2c_writeregdata(struct mb86a20s_state *state,  in mb86a20s_i2c_writeregdata()  argument
254 		rc = mb86a20s_i2c_writereg(state, i2c_addr, rd[i].reg,  in mb86a20s_i2c_writeregdata()
262 static int mb86a20s_i2c_readreg(struct mb86a20s_state *state,  in mb86a20s_i2c_readreg()  argument
272 	rc = i2c_transfer(state->i2c, msg, 2);  in mb86a20s_i2c_readreg()
275 		dev_err(&state->i2c->dev, "%s: reg=0x%x (error=%d)\n",  in mb86a20s_i2c_readreg()
283 #define mb86a20s_readreg(state, reg) \  argument
284 	mb86a20s_i2c_readreg(state, state->config->demod_address, reg)
285 #define mb86a20s_writereg(state, reg, val) \  argument
286 	mb86a20s_i2c_writereg(state, state->config->demod_address, reg, val)
287 #define mb86a20s_writeregdata(state, regdata) \  argument
288 	mb86a20s_i2c_writeregdata(state, state->config->demod_address, \
299 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_read_status()  local
304 	val = mb86a20s_readreg(state, 0x0a) & 0xf;  in mb86a20s_read_status()
323 	dev_dbg(&state->i2c->dev, "%s: Status = 0x%02x (state = %d)\n",  in mb86a20s_read_status()
331 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_read_signal_strength()  local
336 	if (state->get_strength_time &&  in mb86a20s_read_signal_strength()
337 	   (!time_after(jiffies, state->get_strength_time)))  in mb86a20s_read_signal_strength()
348 		rc = mb86a20s_writereg(state, 0x04, 0x1f);  in mb86a20s_read_signal_strength()
351 		rc = mb86a20s_writereg(state, 0x05, rf >> 8);  in mb86a20s_read_signal_strength()
354 		rc = mb86a20s_writereg(state, 0x04, 0x20);  in mb86a20s_read_signal_strength()
357 		rc = mb86a20s_writereg(state, 0x05, rf);  in mb86a20s_read_signal_strength()
361 		rc = mb86a20s_readreg(state, 0x02);  in mb86a20s_read_signal_strength()
376 			dev_dbg(&state->i2c->dev,  in mb86a20s_read_signal_strength()
380 			state->get_strength_time = jiffies +  in mb86a20s_read_signal_strength()
387 static int mb86a20s_get_modulation(struct mb86a20s_state *state,  in mb86a20s_get_modulation()  argument
399 	rc = mb86a20s_writereg(state, 0x6d, reg[layer]);  in mb86a20s_get_modulation()
402 	rc = mb86a20s_readreg(state, 0x6e);  in mb86a20s_get_modulation()
419 static int mb86a20s_get_fec(struct mb86a20s_state *state,  in mb86a20s_get_fec()  argument
432 	rc = mb86a20s_writereg(state, 0x6d, reg[layer]);  in mb86a20s_get_fec()
435 	rc = mb86a20s_readreg(state, 0x6e);  in mb86a20s_get_fec()
454 static int mb86a20s_get_interleaving(struct mb86a20s_state *state,  in mb86a20s_get_interleaving()  argument
470 	rc = mb86a20s_writereg(state, 0x6d, reg[layer]);  in mb86a20s_get_interleaving()
473 	rc = mb86a20s_readreg(state, 0x6e);  in mb86a20s_get_interleaving()
480 static int mb86a20s_get_segment_count(struct mb86a20s_state *state,  in mb86a20s_get_segment_count()  argument
490 	dev_dbg(&state->i2c->dev, "%s called.\n", __func__);  in mb86a20s_get_segment_count()
495 	rc = mb86a20s_writereg(state, 0x6d, reg[layer]);  in mb86a20s_get_segment_count()
498 	rc = mb86a20s_readreg(state, 0x6e);  in mb86a20s_get_segment_count()
503 	dev_dbg(&state->i2c->dev, "%s: segments: %d.\n", __func__, count);  in mb86a20s_get_segment_count()
510 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_reset_frontend_cache()  local
513 	dev_dbg(&state->i2c->dev, "%s called.\n", __func__);  in mb86a20s_reset_frontend_cache()
558 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_layer_bitrate()  local
626 	dev_dbg(&state->i2c->dev,  in mb86a20s_layer_bitrate()
632 	state->estimated_rate[layer] = rate;  in mb86a20s_layer_bitrate()
637 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_get_frontend()  local
641 	dev_dbg(&state->i2c->dev, "%s called.\n", __func__);  in mb86a20s_get_frontend()
647 	rc = mb86a20s_writereg(state, 0x6d, 0x85);  in mb86a20s_get_frontend()
650 	rc = mb86a20s_readreg(state, 0x6e);  in mb86a20s_get_frontend()
658 		dev_dbg(&state->i2c->dev, "%s: getting data for layer %c.\n",  in mb86a20s_get_frontend()
661 		rc = mb86a20s_get_segment_count(state, layer);  in mb86a20s_get_frontend()
668 			state->estimated_rate[layer] = 0;  in mb86a20s_get_frontend()
672 		rc = mb86a20s_get_modulation(state, layer);  in mb86a20s_get_frontend()
675 		dev_dbg(&state->i2c->dev, "%s: modulation %d.\n",  in mb86a20s_get_frontend()
678 		rc = mb86a20s_get_fec(state, layer);  in mb86a20s_get_frontend()
681 		dev_dbg(&state->i2c->dev, "%s: FEC %d.\n",  in mb86a20s_get_frontend()
684 		rc = mb86a20s_get_interleaving(state, layer);  in mb86a20s_get_frontend()
687 		dev_dbg(&state->i2c->dev, "%s: interleaving %d.\n",  in mb86a20s_get_frontend()
696 	rc = mb86a20s_writereg(state, 0x6d, 0x84);  in mb86a20s_get_frontend()
707 	rc = mb86a20s_readreg(state, 0x07);  in mb86a20s_get_frontend()
749 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_reset_counters()  local
753 	dev_dbg(&state->i2c->dev, "%s called.\n", __func__);  in mb86a20s_reset_counters()
756 	if (state->last_frequency != c->frequency) {  in mb86a20s_reset_counters()
765 		state->last_frequency = c->frequency;  in mb86a20s_reset_counters()
771 	rc = mb86a20s_writeregdata(state, mb86a20s_per_ber_reset);  in mb86a20s_reset_counters()
776 	rc = mb86a20s_readreg(state, 0x45);  in mb86a20s_reset_counters()
780 	rc = mb86a20s_writereg(state, 0x45, val | 0x10);  in mb86a20s_reset_counters()
783 	rc = mb86a20s_writereg(state, 0x45, val & 0x6f);  in mb86a20s_reset_counters()
788 	rc = mb86a20s_writereg(state, 0x50, 0x50);  in mb86a20s_reset_counters()
791 	rc = mb86a20s_readreg(state, 0x51);  in mb86a20s_reset_counters()
795 	rc = mb86a20s_writereg(state, 0x51, val | 0x01);  in mb86a20s_reset_counters()
798 	rc = mb86a20s_writereg(state, 0x51, val & 0x06);  in mb86a20s_reset_counters()
804 	dev_err(&state->i2c->dev,  in mb86a20s_reset_counters()
815 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_get_pre_ber()  local
818 	dev_dbg(&state->i2c->dev, "%s called.\n", __func__);  in mb86a20s_get_pre_ber()
824 	rc = mb86a20s_readreg(state, 0x54);  in mb86a20s_get_pre_ber()
830 		dev_dbg(&state->i2c->dev,  in mb86a20s_get_pre_ber()
837 	rc = mb86a20s_readreg(state, 0x55 + layer * 3);  in mb86a20s_get_pre_ber()
841 	rc = mb86a20s_readreg(state, 0x56 + layer * 3);  in mb86a20s_get_pre_ber()
845 	rc = mb86a20s_readreg(state, 0x57 + layer * 3);  in mb86a20s_get_pre_ber()
850 	dev_dbg(&state->i2c->dev,  in mb86a20s_get_pre_ber()
855 	rc = mb86a20s_writereg(state, 0x50, 0xa7 + layer * 3);  in mb86a20s_get_pre_ber()
858 	rc = mb86a20s_readreg(state, 0x51);  in mb86a20s_get_pre_ber()
862 	rc = mb86a20s_writereg(state, 0x50, 0xa8 + layer * 3);  in mb86a20s_get_pre_ber()
865 	rc = mb86a20s_readreg(state, 0x51);  in mb86a20s_get_pre_ber()
869 	rc = mb86a20s_writereg(state, 0x50, 0xa9 + layer * 3);  in mb86a20s_get_pre_ber()
872 	rc = mb86a20s_readreg(state, 0x51);  in mb86a20s_get_pre_ber()
877 	dev_dbg(&state->i2c->dev,  in mb86a20s_get_pre_ber()
889 	if (state->estimated_rate[layer]  in mb86a20s_get_pre_ber()
890 	    && state->estimated_rate[layer] != *count) {  in mb86a20s_get_pre_ber()
891 		dev_dbg(&state->i2c->dev,  in mb86a20s_get_pre_ber()
893 			__func__, 'A' + layer, state->estimated_rate[layer]);  in mb86a20s_get_pre_ber()
896 		rc = mb86a20s_writereg(state, 0x52, 0x00);  in mb86a20s_get_pre_ber()
899 		rc = mb86a20s_writereg(state, 0x50, 0xa7 + layer * 3);  in mb86a20s_get_pre_ber()
902 		rc = mb86a20s_writereg(state, 0x51,  in mb86a20s_get_pre_ber()
903 				       state->estimated_rate[layer] >> 16);  in mb86a20s_get_pre_ber()
906 		rc = mb86a20s_writereg(state, 0x50, 0xa8 + layer * 3);  in mb86a20s_get_pre_ber()
909 		rc = mb86a20s_writereg(state, 0x51,  in mb86a20s_get_pre_ber()
910 				       state->estimated_rate[layer] >> 8);  in mb86a20s_get_pre_ber()
913 		rc = mb86a20s_writereg(state, 0x50, 0xa9 + layer * 3);  in mb86a20s_get_pre_ber()
916 		rc = mb86a20s_writereg(state, 0x51,  in mb86a20s_get_pre_ber()
917 				       state->estimated_rate[layer]);  in mb86a20s_get_pre_ber()
922 		rc = mb86a20s_writereg(state, 0x52, 0x01);  in mb86a20s_get_pre_ber()
925 		rc = mb86a20s_writereg(state, 0x53, 0x00);  in mb86a20s_get_pre_ber()
928 		rc = mb86a20s_writereg(state, 0x53, 0x07);  in mb86a20s_get_pre_ber()
931 		rc = mb86a20s_readreg(state, 0x53);  in mb86a20s_get_pre_ber()
935 		rc = mb86a20s_writereg(state, 0x53, val & ~(1 << layer));  in mb86a20s_get_pre_ber()
938 		rc = mb86a20s_writereg(state, 0x53, val | (1 << layer));  in mb86a20s_get_pre_ber()
948 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_get_post_ber()  local
952 	dev_dbg(&state->i2c->dev, "%s called.\n", __func__);  in mb86a20s_get_post_ber()
958 	rc = mb86a20s_readreg(state, 0x60);  in mb86a20s_get_post_ber()
964 		dev_dbg(&state->i2c->dev,  in mb86a20s_get_post_ber()
971 	rc = mb86a20s_readreg(state, 0x64 + layer * 3);  in mb86a20s_get_post_ber()
975 	rc = mb86a20s_readreg(state, 0x65 + layer * 3);  in mb86a20s_get_post_ber()
979 	rc = mb86a20s_readreg(state, 0x66 + layer * 3);  in mb86a20s_get_post_ber()
984 	dev_dbg(&state->i2c->dev,  in mb86a20s_get_post_ber()
989 	rc = mb86a20s_writereg(state, 0x50, 0xdc + layer * 2);  in mb86a20s_get_post_ber()
992 	rc = mb86a20s_readreg(state, 0x51);  in mb86a20s_get_post_ber()
996 	rc = mb86a20s_writereg(state, 0x50, 0xdd + layer * 2);  in mb86a20s_get_post_ber()
999 	rc = mb86a20s_readreg(state, 0x51);  in mb86a20s_get_post_ber()
1005 	dev_dbg(&state->i2c->dev,  in mb86a20s_get_post_ber()
1016 	if (!state->estimated_rate[layer])  in mb86a20s_get_post_ber()
1019 	collect_rate = state->estimated_rate[layer] / 204 / 8;  in mb86a20s_get_post_ber()
1025 		dev_dbg(&state->i2c->dev,  in mb86a20s_get_post_ber()
1030 		rc = mb86a20s_writereg(state, 0x5e, 0x00);  in mb86a20s_get_post_ber()
1033 		rc = mb86a20s_writereg(state, 0x50, 0xdc + layer * 2);  in mb86a20s_get_post_ber()
1036 		rc = mb86a20s_writereg(state, 0x51, collect_rate >> 8);  in mb86a20s_get_post_ber()
1039 		rc = mb86a20s_writereg(state, 0x50, 0xdd + layer * 2);  in mb86a20s_get_post_ber()
1042 		rc = mb86a20s_writereg(state, 0x51, collect_rate & 0xff);  in mb86a20s_get_post_ber()
1047 		rc = mb86a20s_writereg(state, 0x5e, 0x07);  in mb86a20s_get_post_ber()
1050 		rc = mb86a20s_writereg(state, 0x5f, 0x00);  in mb86a20s_get_post_ber()
1053 		rc = mb86a20s_writereg(state, 0x5f, 0x07);  in mb86a20s_get_post_ber()
1060 	rc = mb86a20s_readreg(state, 0x5f);  in mb86a20s_get_post_ber()
1064 	rc = mb86a20s_writereg(state, 0x5f, val & ~(1 << layer));  in mb86a20s_get_post_ber()
1067 	rc = mb86a20s_writereg(state, 0x5f, val | (1 << layer));  in mb86a20s_get_post_ber()
1076 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_get_blk_error()  local
1079 	dev_dbg(&state->i2c->dev, "%s called.\n", __func__);  in mb86a20s_get_blk_error()
1085 	rc = mb86a20s_writereg(state, 0x50, 0xb8);  in mb86a20s_get_blk_error()
1088 	rc = mb86a20s_readreg(state, 0x51);  in mb86a20s_get_blk_error()
1095 		dev_dbg(&state->i2c->dev,  in mb86a20s_get_blk_error()
1102 	rc = mb86a20s_writereg(state, 0x50, 0xb9 + layer * 2);  in mb86a20s_get_blk_error()
1105 	rc = mb86a20s_readreg(state, 0x51);  in mb86a20s_get_blk_error()
1109 	rc = mb86a20s_writereg(state, 0x50, 0xba + layer * 2);  in mb86a20s_get_blk_error()
1112 	rc = mb86a20s_readreg(state, 0x51);  in mb86a20s_get_blk_error()
1116 	dev_dbg(&state->i2c->dev, "%s: block error for layer %c: %d.\n",  in mb86a20s_get_blk_error()
1120 	rc = mb86a20s_writereg(state, 0x50, 0xb2 + layer * 2);  in mb86a20s_get_blk_error()
1123 	rc = mb86a20s_readreg(state, 0x51);  in mb86a20s_get_blk_error()
1127 	rc = mb86a20s_writereg(state, 0x50, 0xb3 + layer * 2);  in mb86a20s_get_blk_error()
1130 	rc = mb86a20s_readreg(state, 0x51);  in mb86a20s_get_blk_error()
1135 	dev_dbg(&state->i2c->dev,  in mb86a20s_get_blk_error()
1146 	if (!state->estimated_rate[layer])  in mb86a20s_get_blk_error()
1149 	collect_rate = state->estimated_rate[layer] / 204 / 8;  in mb86a20s_get_blk_error()
1156 		dev_dbg(&state->i2c->dev,  in mb86a20s_get_blk_error()
1161 		rc = mb86a20s_writereg(state, 0x50, 0xb0);  in mb86a20s_get_blk_error()
1164 		rc = mb86a20s_writereg(state, 0x51, 0x00);  in mb86a20s_get_blk_error()
1169 		rc = mb86a20s_writereg(state, 0x50, 0xb2 + layer * 2);  in mb86a20s_get_blk_error()
1172 		rc = mb86a20s_writereg(state, 0x51, collect_rate >> 8);  in mb86a20s_get_blk_error()
1175 		rc = mb86a20s_writereg(state, 0x50, 0xb3 + layer * 2);  in mb86a20s_get_blk_error()
1178 		rc = mb86a20s_writereg(state, 0x51, collect_rate & 0xff);  in mb86a20s_get_blk_error()
1183 		rc = mb86a20s_writereg(state, 0x50, 0xb0);  in mb86a20s_get_blk_error()
1186 		rc = mb86a20s_writereg(state, 0x51, 0x07);  in mb86a20s_get_blk_error()
1191 		rc = mb86a20s_writereg(state, 0x50, 0xb1);  in mb86a20s_get_blk_error()
1194 		rc = mb86a20s_writereg(state, 0x51, 0x07);  in mb86a20s_get_blk_error()
1197 		rc = mb86a20s_writereg(state, 0x51, 0x00);  in mb86a20s_get_blk_error()
1204 	rc = mb86a20s_writereg(state, 0x50, 0xb1);  in mb86a20s_get_blk_error()
1207 	rc = mb86a20s_readreg(state, 0x51);  in mb86a20s_get_blk_error()
1211 	rc = mb86a20s_writereg(state, 0x51, val | (1 << layer));  in mb86a20s_get_blk_error()
1214 	rc = mb86a20s_writereg(state, 0x51, val & ~(1 << layer));  in mb86a20s_get_blk_error()
1396 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_get_main_CNR()  local
1402 	rc = mb86a20s_readreg(state, 0x45);  in mb86a20s_get_main_CNR()
1407 		dev_dbg(&state->i2c->dev, "%s: CNR is not available yet.\n",  in mb86a20s_get_main_CNR()
1413 	rc = mb86a20s_readreg(state, 0x46);  in mb86a20s_get_main_CNR()
1418 	rc = mb86a20s_readreg(state, 0x46);  in mb86a20s_get_main_CNR()
1429 	dev_dbg(&state->i2c->dev, "%s: CNR is %d.%03d dB (%d)\n",  in mb86a20s_get_main_CNR()
1433 	rc = mb86a20s_writereg(state, 0x45, val | 0x10);  in mb86a20s_get_main_CNR()
1436 	rc = mb86a20s_writereg(state, 0x45, val & 0x6f);  in mb86a20s_get_main_CNR()
1443 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_get_blk_error_layer_CNR()  local
1450 	dev_dbg(&state->i2c->dev, "%s called.\n", __func__);  in mb86a20s_get_blk_error_layer_CNR()
1453 	rc = mb86a20s_writereg(state, 0x50, 0x5b);  in mb86a20s_get_blk_error_layer_CNR()
1456 	rc = mb86a20s_readreg(state, 0x51);  in mb86a20s_get_blk_error_layer_CNR()
1462 		dev_dbg(&state->i2c->dev,  in mb86a20s_get_blk_error_layer_CNR()
1474 		rc = mb86a20s_writereg(state, 0x50, 0x52 + layer * 3);  in mb86a20s_get_blk_error_layer_CNR()
1477 		rc = mb86a20s_readreg(state, 0x51);  in mb86a20s_get_blk_error_layer_CNR()
1481 		rc = mb86a20s_writereg(state, 0x50, 0x53 + layer * 3);  in mb86a20s_get_blk_error_layer_CNR()
1484 		rc = mb86a20s_readreg(state, 0x51);  in mb86a20s_get_blk_error_layer_CNR()
1488 		rc = mb86a20s_writereg(state, 0x50, 0x54 + layer * 3);  in mb86a20s_get_blk_error_layer_CNR()
1491 		rc = mb86a20s_readreg(state, 0x51);  in mb86a20s_get_blk_error_layer_CNR()
1517 		dev_dbg(&state->i2c->dev,  in mb86a20s_get_blk_error_layer_CNR()
1525 	rc = mb86a20s_writereg(state, 0x50, 0x50);  in mb86a20s_get_blk_error_layer_CNR()
1528 	rc = mb86a20s_readreg(state, 0x51);  in mb86a20s_get_blk_error_layer_CNR()
1533 	rc = mb86a20s_writereg(state, 0x51, val | 0x01);  in mb86a20s_get_blk_error_layer_CNR()
1536 	rc = mb86a20s_writereg(state, 0x51, val & 0x06);  in mb86a20s_get_blk_error_layer_CNR()
1545 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_stats_not_ready()  local
1549 	dev_dbg(&state->i2c->dev, "%s called.\n", __func__);  in mb86a20s_stats_not_ready()
1583 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_get_stats()  local
1594 	dev_dbg(&state->i2c->dev, "%s called.\n", __func__);  in mb86a20s_get_stats()
1629 				dev_err(&state->i2c->dev,  in mb86a20s_get_stats()
1651 				dev_err(&state->i2c->dev,  in mb86a20s_get_stats()
1674 				dev_err(&state->i2c->dev,  in mb86a20s_get_stats()
1765 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_initfe()  local
1771 	dev_dbg(&state->i2c->dev, "%s called.\n", __func__);  in mb86a20s_initfe()
1777 	rc = mb86a20s_writeregdata(state, mb86a20s_init1);  in mb86a20s_initfe()
1781 	if (!state->inversion)  in mb86a20s_initfe()
1783 	rc = mb86a20s_writereg(state, 0x09, reg09);  in mb86a20s_initfe()
1786 	if (!state->bw)  in mb86a20s_initfe()
1790 	rc = mb86a20s_writereg(state, 0x39, reg71);  in mb86a20s_initfe()
1793 	rc = mb86a20s_writereg(state, 0x71, state->bw);  in mb86a20s_initfe()
1796 	if (state->subchannel) {  in mb86a20s_initfe()
1797 		rc = mb86a20s_writereg(state, 0x44, state->subchannel);  in mb86a20s_initfe()
1802 	fclk = state->config->fclk;  in mb86a20s_initfe()
1808 		fe->ops.tuner_ops.get_if_frequency(fe, &state->if_freq);  in mb86a20s_initfe()
1810 	if (!state->if_freq)  in mb86a20s_initfe()
1811 		state->if_freq = 3300000;  in mb86a20s_initfe()
1813 	pll = (((u64)1) << 34) * state->if_freq;  in mb86a20s_initfe()
1816 	rc = mb86a20s_writereg(state, 0x28, 0x2a);  in mb86a20s_initfe()
1819 	rc = mb86a20s_writereg(state, 0x29, (pll >> 16) & 0xff);  in mb86a20s_initfe()
1822 	rc = mb86a20s_writereg(state, 0x2a, (pll >> 8) & 0xff);  in mb86a20s_initfe()
1825 	rc = mb86a20s_writereg(state, 0x2b, pll & 0xff);  in mb86a20s_initfe()
1828 	dev_dbg(&state->i2c->dev, "%s: fclk=%d, IF=%d, clock reg=0x%06llx\n",  in mb86a20s_initfe()
1829 		__func__, fclk, state->if_freq, (long long)pll);  in mb86a20s_initfe()
1832 	pll = state->if_freq * 1677721600L;  in mb86a20s_initfe()
1834 	rc = mb86a20s_writereg(state, 0x28, 0x20);  in mb86a20s_initfe()
1837 	rc = mb86a20s_writereg(state, 0x29, (pll >> 16) & 0xff);  in mb86a20s_initfe()
1840 	rc = mb86a20s_writereg(state, 0x2a, (pll >> 8) & 0xff);  in mb86a20s_initfe()
1843 	rc = mb86a20s_writereg(state, 0x2b, pll & 0xff);  in mb86a20s_initfe()
1846 	dev_dbg(&state->i2c->dev, "%s: IF=%d, IF reg=0x%06llx\n",  in mb86a20s_initfe()
1847 		__func__, state->if_freq, (long long)pll);  in mb86a20s_initfe()
1849 	if (!state->config->is_serial)  in mb86a20s_initfe()
1852 	rc = mb86a20s_writereg(state, 0x50, 0xd5);  in mb86a20s_initfe()
1855 	rc = mb86a20s_writereg(state, 0x51, regD5);  in mb86a20s_initfe()
1859 	rc = mb86a20s_writeregdata(state, mb86a20s_init2);  in mb86a20s_initfe()
1869 		state->need_init = true;  in mb86a20s_initfe()
1870 		dev_info(&state->i2c->dev,  in mb86a20s_initfe()
1873 		state->need_init = false;  in mb86a20s_initfe()
1874 		dev_dbg(&state->i2c->dev, "Initialization succeeded.\n");  in mb86a20s_initfe()
1881 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_set_frontend()  local
1884 	dev_dbg(&state->i2c->dev, "%s called.\n", __func__);  in mb86a20s_set_frontend()
1890 		state->bw = MB86A20S_1SEG;  in mb86a20s_set_frontend()
1892 		state->bw = MB86A20S_13SEG_PARTIAL;  in mb86a20s_set_frontend()
1894 		state->bw = MB86A20S_13SEG;  in mb86a20s_set_frontend()
1897 		state->inversion = true;  in mb86a20s_set_frontend()
1899 		state->inversion = false;  in mb86a20s_set_frontend()
1902 		state->subchannel = 0;  in mb86a20s_set_frontend()
1907 		state->subchannel = mb86a20s_subchannel[c->isdbt_sb_subchannel];  in mb86a20s_set_frontend()
1943 	rc = mb86a20s_writeregdata(state, mb86a20s_reset_reception);  in mb86a20s_set_frontend()
1956 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_read_status_and_stats()  local
1959 	dev_dbg(&state->i2c->dev, "%s called.\n", __func__);  in mb86a20s_read_status_and_stats()
1971 		dev_err(&state->i2c->dev,  in mb86a20s_read_status_and_stats()
1979 		dev_err(&state->i2c->dev,  in mb86a20s_read_status_and_stats()
1992 			dev_err(&state->i2c->dev,  in mb86a20s_read_status_and_stats()
2001 			dev_err(&state->i2c->dev,  in mb86a20s_read_status_and_stats()
2047 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_tune()  local
2050 	dev_dbg(&state->i2c->dev, "%s called.\n", __func__);  in mb86a20s_tune()
2063 	struct mb86a20s_state *state = fe->demodulator_priv;  in mb86a20s_release()  local
2065 	dev_dbg(&state->i2c->dev, "%s called.\n", __func__);  in mb86a20s_release()
2067 	kfree(state);  in mb86a20s_release()
2075 	struct mb86a20s_state *state;  in mb86a20s_attach()  local
2081 	state = kzalloc(sizeof(struct mb86a20s_state), GFP_KERNEL);  in mb86a20s_attach()
2082 	if (state == NULL) {  in mb86a20s_attach()
2089 	state->config = config;  in mb86a20s_attach()
2090 	state->i2c = i2c;  in mb86a20s_attach()
2093 	memcpy(&state->frontend.ops, &mb86a20s_ops,  in mb86a20s_attach()
2095 	state->frontend.demodulator_priv = state;  in mb86a20s_attach()
2098 	rev = mb86a20s_readreg(state, 0);  in mb86a20s_attach()
2110 	return &state->frontend;  in mb86a20s_attach()
2113 	kfree(state);  in mb86a20s_attach()