115 static int lgdt3305_write_reg(struct lgdt3305_state *state, u16 reg, u8 val)  in lgdt3305_write_reg()  argument
120 		.addr = state->cfg->i2c_addr, .flags = 0,  in lgdt3305_write_reg()
126 	ret = i2c_transfer(state->i2c_adap, &msg, 1);  in lgdt3305_write_reg()
139 static int lgdt3305_read_reg(struct lgdt3305_state *state, u16 reg, u8 *val)  in lgdt3305_read_reg()  argument
144 		{ .addr = state->cfg->i2c_addr,  in lgdt3305_read_reg()
146 		{ .addr = state->cfg->i2c_addr,  in lgdt3305_read_reg()
152 	ret = i2c_transfer(state->i2c_adap, msg, 2);  in lgdt3305_read_reg()
156 		       state->cfg->i2c_addr, reg, ret);  in lgdt3305_read_reg()
165 #define read_reg(state, reg)						\  argument
168 	int ret = lgdt3305_read_reg(state, reg, &__val);		\
174 static int lgdt3305_set_reg_bit(struct lgdt3305_state *state,  in lgdt3305_set_reg_bit()  argument
182 	ret = lgdt3305_read_reg(state, reg, &val);  in lgdt3305_set_reg_bit()
189 	ret = lgdt3305_write_reg(state, reg, val);  in lgdt3305_set_reg_bit()
199 static int lgdt3305_write_regs(struct lgdt3305_state *state,  in lgdt3305_write_regs()  argument
207 		ret = lgdt3305_write_reg(state, regs[i].reg, regs[i].val);  in lgdt3305_write_regs()
216 static int lgdt3305_soft_reset(struct lgdt3305_state *state)  in lgdt3305_soft_reset()  argument
222 	ret = lgdt3305_set_reg_bit(state, LGDT3305_GEN_CTRL_3, 0, 0);  in lgdt3305_soft_reset()
227 	ret = lgdt3305_set_reg_bit(state, LGDT3305_GEN_CTRL_3, 0, 1);  in lgdt3305_soft_reset()
232 static inline int lgdt3305_mpeg_mode(struct lgdt3305_state *state,  in lgdt3305_mpeg_mode()  argument
236 	return lgdt3305_set_reg_bit(state, LGDT3305_TP_CTRL_1, 5, mode);  in lgdt3305_mpeg_mode()
239 static int lgdt3305_mpeg_mode_polarity(struct lgdt3305_state *state)  in lgdt3305_mpeg_mode_polarity()  argument
243 	enum lgdt3305_tp_clock_edge edge = state->cfg->tpclk_edge;  in lgdt3305_mpeg_mode_polarity()
244 	enum lgdt3305_tp_clock_mode mode = state->cfg->tpclk_mode;  in lgdt3305_mpeg_mode_polarity()
245 	enum lgdt3305_tp_valid_polarity valid = state->cfg->tpvalid_polarity;  in lgdt3305_mpeg_mode_polarity()
249 	ret = lgdt3305_read_reg(state, LGDT3305_TP_CTRL_1, &val);  in lgdt3305_mpeg_mode_polarity()
262 	ret = lgdt3305_write_reg(state, LGDT3305_TP_CTRL_1, val);  in lgdt3305_mpeg_mode_polarity()
266 	ret = lgdt3305_soft_reset(state);  in lgdt3305_mpeg_mode_polarity()
271 static int lgdt3305_set_modulation(struct lgdt3305_state *state,  in lgdt3305_set_modulation()  argument
279 	ret = lgdt3305_read_reg(state, LGDT3305_GEN_CTRL_1, &opermode);  in lgdt3305_set_modulation()
298 	ret = lgdt3305_write_reg(state, LGDT3305_GEN_CTRL_1, opermode);  in lgdt3305_set_modulation()
303 static int lgdt3305_set_filter_extension(struct lgdt3305_state *state,  in lgdt3305_set_filter_extension()  argument
321 	return lgdt3305_set_reg_bit(state, 0x043f, 2, val);  in lgdt3305_set_filter_extension()
326 static int lgdt3305_passband_digital_agc(struct lgdt3305_state *state,  in lgdt3305_passband_digital_agc()  argument
347 	lgdt3305_write_reg(state, LGDT3305_DGTL_AGC_REF_1, agc_ref >> 8);  in lgdt3305_passband_digital_agc()
348 	lgdt3305_write_reg(state, LGDT3305_DGTL_AGC_REF_2, agc_ref & 0xff);  in lgdt3305_passband_digital_agc()
353 static int lgdt3305_rfagc_loop(struct lgdt3305_state *state,  in lgdt3305_rfagc_loop()  argument
370 		if (state->cfg->demod_chip == LGDT3304)  in lgdt3305_rfagc_loop()
379 	if (state->cfg->rf_agc_loop) {  in lgdt3305_rfagc_loop()
383 		lgdt3305_write_reg(state, LGDT3305_AGC_DELAY_PT_1,  in lgdt3305_rfagc_loop()
385 		lgdt3305_write_reg(state, LGDT3305_AGC_DELAY_PT_2,  in lgdt3305_rfagc_loop()
388 		lgdt3305_write_reg(state, LGDT3305_RFAGC_LOOP_FLTR_BW_1,  in lgdt3305_rfagc_loop()
390 		lgdt3305_write_reg(state, LGDT3305_RFAGC_LOOP_FLTR_BW_2,  in lgdt3305_rfagc_loop()
396 		lgdt3305_write_reg(state, LGDT3305_IFBW_1, ifbw >> 8);  in lgdt3305_rfagc_loop()
397 		lgdt3305_write_reg(state, LGDT3305_IFBW_2, ifbw & 0xff);  in lgdt3305_rfagc_loop()
403 static int lgdt3305_agc_setup(struct lgdt3305_state *state,  in lgdt3305_agc_setup()  argument
425 	switch (state->cfg->demod_chip) {  in lgdt3305_agc_setup()
427 		lgdt3305_write_reg(state, 0x0314, 0xe1 | lockdten << 1);  in lgdt3305_agc_setup()
428 		lgdt3305_set_reg_bit(state, 0x030e, 2, acqen);  in lgdt3305_agc_setup()
431 		lgdt3305_write_reg(state, LGDT3305_AGC_CTRL_4, 0xe1 | lockdten << 1);  in lgdt3305_agc_setup()
432 		lgdt3305_set_reg_bit(state, LGDT3305_AGC_CTRL_1, 2, acqen);  in lgdt3305_agc_setup()
438 	return lgdt3305_rfagc_loop(state, p);  in lgdt3305_agc_setup()
441 static int lgdt3305_set_agc_power_ref(struct lgdt3305_state *state,  in lgdt3305_set_agc_power_ref()  argument
448 		if (state->cfg->usref_8vsb)  in lgdt3305_set_agc_power_ref()
449 			usref = state->cfg->usref_8vsb;  in lgdt3305_set_agc_power_ref()
452 		if (state->cfg->usref_qam64)  in lgdt3305_set_agc_power_ref()
453 			usref = state->cfg->usref_qam64;  in lgdt3305_set_agc_power_ref()
456 		if (state->cfg->usref_qam256)  in lgdt3305_set_agc_power_ref()
457 			usref = state->cfg->usref_qam256;  in lgdt3305_set_agc_power_ref()
466 		lgdt3305_set_reg_bit(state, LGDT3305_AGC_CTRL_1, 3, 1);  in lgdt3305_set_agc_power_ref()
468 		lgdt3305_write_reg(state, LGDT3305_AGC_POWER_REF_1,  in lgdt3305_set_agc_power_ref()
470 		lgdt3305_write_reg(state, LGDT3305_AGC_POWER_REF_2,  in lgdt3305_set_agc_power_ref()
478 static int lgdt3305_spectral_inversion(struct lgdt3305_state *state,  in lgdt3305_spectral_inversion()  argument
488 		ret = lgdt3305_write_reg(state, LGDT3305_CR_CTRL_7,  in lgdt3305_spectral_inversion()
493 		ret = lgdt3305_write_reg(state, LGDT3305_FEC_BLOCK_CTRL,  in lgdt3305_spectral_inversion()
502 static int lgdt3305_set_if(struct lgdt3305_state *state,  in lgdt3305_set_if()  argument
511 		if_freq_khz = state->cfg->vsb_if_khz;  in lgdt3305_set_if()
515 		if_freq_khz = state->cfg->qam_if_khz;  in lgdt3305_set_if()
543 	lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_1, nco1);  in lgdt3305_set_if()
544 	lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_2, nco2);  in lgdt3305_set_if()
545 	lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_3, nco3);  in lgdt3305_set_if()
546 	lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_4, nco4);  in lgdt3305_set_if()
558 	struct lgdt3305_state *state = fe->demodulator_priv;  in lgdt3305_i2c_gate_ctrl()  local
560 	if (state->cfg->deny_i2c_rptr)  in lgdt3305_i2c_gate_ctrl()
565 	return lgdt3305_set_reg_bit(state, LGDT3305_GEN_CTRL_2, 5,  in lgdt3305_i2c_gate_ctrl()
571 	struct lgdt3305_state *state = fe->demodulator_priv;  in lgdt3305_sleep()  local
576 	gen_ctrl_3 = read_reg(state, LGDT3305_GEN_CTRL_3);  in lgdt3305_sleep()
577 	gen_ctrl_4 = read_reg(state, LGDT3305_GEN_CTRL_4);  in lgdt3305_sleep()
591 	lgdt3305_write_reg(state, LGDT3305_GEN_CTRL_3, gen_ctrl_3);  in lgdt3305_sleep()
592 	lgdt3305_write_reg(state, LGDT3305_GEN_CTRL_4, gen_ctrl_4);  in lgdt3305_sleep()
599 	struct lgdt3305_state *state = fe->demodulator_priv;  in lgdt3305_init()  local
663 	switch (state->cfg->demod_chip) {  in lgdt3305_init()
665 		ret = lgdt3305_write_regs(state, lgdt3304_init_data,  in lgdt3305_init()
669 		ret = lgdt3305_write_regs(state, lgdt3305_init_data,  in lgdt3305_init()
678 	ret = lgdt3305_soft_reset(state);  in lgdt3305_init()
686 	struct lgdt3305_state *state = fe->demodulator_priv;  in lgdt3304_set_parameters()  local
697 		state->current_frequency = p->frequency;  in lgdt3304_set_parameters()
700 	ret = lgdt3305_set_modulation(state, p);  in lgdt3304_set_parameters()
704 	ret = lgdt3305_passband_digital_agc(state, p);  in lgdt3304_set_parameters()
708 	ret = lgdt3305_agc_setup(state, p);  in lgdt3304_set_parameters()
715 		lgdt3305_write_reg(state, 0x030d, 0x00);  in lgdt3304_set_parameters()
716 		lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_1, 0x4f);  in lgdt3304_set_parameters()
717 		lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_2, 0x0c);  in lgdt3304_set_parameters()
718 		lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_3, 0xac);  in lgdt3304_set_parameters()
719 		lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_4, 0xba);  in lgdt3304_set_parameters()
723 		lgdt3305_write_reg(state, 0x030d, 0x14);  in lgdt3304_set_parameters()
724 		ret = lgdt3305_set_if(state, p);  in lgdt3304_set_parameters()
733 	ret = lgdt3305_spectral_inversion(state, p,  in lgdt3304_set_parameters()
734 					  state->cfg->spectral_inversion  in lgdt3304_set_parameters()
739 	state->current_modulation = p->modulation;  in lgdt3304_set_parameters()
741 	ret = lgdt3305_mpeg_mode(state, state->cfg->mpeg_mode);  in lgdt3304_set_parameters()
746 	ret = lgdt3305_mpeg_mode_polarity(state);  in lgdt3304_set_parameters()
754 	struct lgdt3305_state *state = fe->demodulator_priv;  in lgdt3305_set_parameters()  local
765 		state->current_frequency = p->frequency;  in lgdt3305_set_parameters()
768 	ret = lgdt3305_set_modulation(state, p);  in lgdt3305_set_parameters()
772 	ret = lgdt3305_passband_digital_agc(state, p);  in lgdt3305_set_parameters()
775 	ret = lgdt3305_set_agc_power_ref(state, p);  in lgdt3305_set_parameters()
778 	ret = lgdt3305_agc_setup(state, p);  in lgdt3305_set_parameters()
783 	ret = lgdt3305_write_reg(state, LGDT3305_GEN_CONTROL, 0x2f);  in lgdt3305_set_parameters()
786 	ret = lgdt3305_set_reg_bit(state, LGDT3305_CR_CTR_FREQ_1, 6, 1);  in lgdt3305_set_parameters()
790 	ret = lgdt3305_set_if(state, p);  in lgdt3305_set_parameters()
793 	ret = lgdt3305_spectral_inversion(state, p,  in lgdt3305_set_parameters()
794 					  state->cfg->spectral_inversion  in lgdt3305_set_parameters()
799 	ret = lgdt3305_set_filter_extension(state, p);  in lgdt3305_set_parameters()
803 	state->current_modulation = p->modulation;  in lgdt3305_set_parameters()
805 	ret = lgdt3305_mpeg_mode(state, state->cfg->mpeg_mode);  in lgdt3305_set_parameters()
810 	ret = lgdt3305_mpeg_mode_polarity(state);  in lgdt3305_set_parameters()
818 	struct lgdt3305_state *state = fe->demodulator_priv;  in lgdt3305_get_frontend()  local
822 	p->modulation = state->current_modulation;  in lgdt3305_get_frontend()
823 	p->frequency = state->current_frequency;  in lgdt3305_get_frontend()
829 static int lgdt3305_read_cr_lock_status(struct lgdt3305_state *state,  in lgdt3305_read_cr_lock_status()  argument
838 	ret = lgdt3305_read_reg(state, LGDT3305_CR_LOCK_STATUS, &val);  in lgdt3305_read_cr_lock_status()
842 	switch (state->current_modulation) {  in lgdt3305_read_cr_lock_status()
880 static int lgdt3305_read_fec_lock_status(struct lgdt3305_state *state,  in lgdt3305_read_fec_lock_status()  argument
888 	switch (state->current_modulation) {  in lgdt3305_read_fec_lock_status()
891 		ret = lgdt3305_read_reg(state,  in lgdt3305_read_fec_lock_status()
917 	struct lgdt3305_state *state = fe->demodulator_priv;  in lgdt3305_read_status()  local
924 	ret = lgdt3305_read_reg(state, LGDT3305_GEN_STATUS, &val);  in lgdt3305_read_status()
941 	ret = lgdt3305_read_cr_lock_status(state, &cr_lock);  in lgdt3305_read_status()
954 	switch (state->current_modulation) {  in lgdt3305_read_status()
958 		if (((LGDT3304 == state->cfg->demod_chip)) && (cr_lock))  in lgdt3305_read_status()
961 		ret = lgdt3305_read_fec_lock_status(state, &fec_lock);  in lgdt3305_read_status()
999 	struct lgdt3305_state *state = fe->demodulator_priv;  in lgdt3305_read_snr()  local
1003 	switch (state->current_modulation) {  in lgdt3305_read_snr()
1008 		noise =	((read_reg(state, LGDT3305_PT_MSE_1) & 0x07) << 16) |  in lgdt3305_read_snr()
1009 			(read_reg(state, LGDT3305_PT_MSE_2) << 8) |  in lgdt3305_read_snr()
1010 			(read_reg(state, LGDT3305_PT_MSE_3) & 0xff);  in lgdt3305_read_snr()
1015 		noise =	((read_reg(state, LGDT3305_EQ_MSE_1) & 0x0f) << 16) |  in lgdt3305_read_snr()
1016 			(read_reg(state, LGDT3305_EQ_MSE_2) << 8) |  in lgdt3305_read_snr()
1017 			(read_reg(state, LGDT3305_EQ_MSE_3) & 0xff);  in lgdt3305_read_snr()
1023 		noise = (read_reg(state, LGDT3305_CR_MSE_1) << 8) |  in lgdt3305_read_snr()
1024 			(read_reg(state, LGDT3305_CR_MSE_2) & 0xff);  in lgdt3305_read_snr()
1026 		c = (state->current_modulation == QAM_64) ?  in lgdt3305_read_snr()
1033 	state->snr = calculate_snr(noise, c);  in lgdt3305_read_snr()
1035 	*snr = (state->snr / ((1 << 24) / 10));  in lgdt3305_read_snr()
1037 	       state->snr >> 24, (((state->snr >> 8) & 0xffff) * 100) >> 16);  in lgdt3305_read_snr()
1052 	struct lgdt3305_state *state = fe->demodulator_priv;  in lgdt3305_read_signal_strength()  local
1063 	if (state->snr >= 8960 * 0x10000)  in lgdt3305_read_signal_strength()
1066 		*strength = state->snr / 8960;  in lgdt3305_read_signal_strength()
1081 	struct lgdt3305_state *state = fe->demodulator_priv;  in lgdt3305_read_ucblocks()  local
1084 		(read_reg(state, LGDT3305_FEC_PKT_ERR_1) << 8) |  in lgdt3305_read_ucblocks()
1085 		(read_reg(state, LGDT3305_FEC_PKT_ERR_2) & 0xff);  in lgdt3305_read_ucblocks()
1101 	struct lgdt3305_state *state = fe->demodulator_priv;  in lgdt3305_release()  local
1103 	kfree(state);  in lgdt3305_release()
1112 	struct lgdt3305_state *state = NULL;  in lgdt3305_attach()  local
1120 	state = kzalloc(sizeof(struct lgdt3305_state), GFP_KERNEL);  in lgdt3305_attach()
1121 	if (state == NULL)  in lgdt3305_attach()
1124 	state->cfg = config;  in lgdt3305_attach()
1125 	state->i2c_adap = i2c_adap;  in lgdt3305_attach()
1129 		memcpy(&state->frontend.ops, &lgdt3304_ops,  in lgdt3305_attach()
1133 		memcpy(&state->frontend.ops, &lgdt3305_ops,  in lgdt3305_attach()
1139 	state->frontend.demodulator_priv = state;  in lgdt3305_attach()
1142 	ret = lgdt3305_read_reg(state, LGDT3305_GEN_CTRL_2, &val);  in lgdt3305_attach()
1145 	ret = lgdt3305_write_reg(state, 0x0808, 0x80);  in lgdt3305_attach()
1148 	ret = lgdt3305_read_reg(state, 0x0808, &val);  in lgdt3305_attach()
1151 	ret = lgdt3305_write_reg(state, 0x0808, 0x00);  in lgdt3305_attach()
1155 	state->current_frequency = -1;  in lgdt3305_attach()
1156 	state->current_modulation = -1;  in lgdt3305_attach()
1158 	return &state->frontend;  in lgdt3305_attach()
1162 	kfree(state);  in lgdt3305_attach()