Lines Matching refs:write16
403 static int write16(struct drxk_state *state, u32 reg, u16 data) in write16() function
523 status = write16(state, SIO_CC_PWD_MODE__A, SIO_CC_PWD_MODE_LEVEL_NONE); in power_up_device()
526 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in power_up_device()
530 status = write16(state, SIO_CC_PLL_LOCK__A, 1); in power_up_device()
788 status = write16(state, SCU_RAM_GPIO__A, in drxx_open()
796 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in drxx_open()
805 status = write16(state, SIO_TOP_COMM_KEY__A, key); in drxx_open()
823 status = write16(state, SCU_RAM_GPIO__A, in get_device_capabilities()
827 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in get_device_capabilities()
833 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in get_device_capabilities()
1020 status = write16(state, SIO_HI_RA_RAM_CMD__A, cmd); in hi_command()
1062 status = write16(state, SIO_HI_RA_RAM_PAR_6__A, in hi_cfg_command()
1066 status = write16(state, SIO_HI_RA_RAM_PAR_5__A, in hi_cfg_command()
1070 status = write16(state, SIO_HI_RA_RAM_PAR_4__A, in hi_cfg_command()
1074 status = write16(state, SIO_HI_RA_RAM_PAR_3__A, in hi_cfg_command()
1078 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in hi_cfg_command()
1082 status = write16(state, SIO_HI_RA_RAM_PAR_1__A, in hi_cfg_command()
1122 status = write16(state, SCU_RAM_GPIO__A, in mpegts_configure_pins()
1128 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in mpegts_configure_pins()
1134 status = write16(state, SIO_PDR_MSTRT_CFG__A, 0x0000); in mpegts_configure_pins()
1137 status = write16(state, SIO_PDR_MERR_CFG__A, 0x0000); in mpegts_configure_pins()
1140 status = write16(state, SIO_PDR_MCLK_CFG__A, 0x0000); in mpegts_configure_pins()
1143 status = write16(state, SIO_PDR_MVAL_CFG__A, 0x0000); in mpegts_configure_pins()
1146 status = write16(state, SIO_PDR_MD0_CFG__A, 0x0000); in mpegts_configure_pins()
1149 status = write16(state, SIO_PDR_MD1_CFG__A, 0x0000); in mpegts_configure_pins()
1152 status = write16(state, SIO_PDR_MD2_CFG__A, 0x0000); in mpegts_configure_pins()
1155 status = write16(state, SIO_PDR_MD3_CFG__A, 0x0000); in mpegts_configure_pins()
1158 status = write16(state, SIO_PDR_MD4_CFG__A, 0x0000); in mpegts_configure_pins()
1161 status = write16(state, SIO_PDR_MD5_CFG__A, 0x0000); in mpegts_configure_pins()
1164 status = write16(state, SIO_PDR_MD6_CFG__A, 0x0000); in mpegts_configure_pins()
1167 status = write16(state, SIO_PDR_MD7_CFG__A, 0x0000); in mpegts_configure_pins()
1179 status = write16(state, SIO_PDR_MSTRT_CFG__A, sio_pdr_mdx_cfg); in mpegts_configure_pins()
1186 status = write16(state, SIO_PDR_MERR_CFG__A, err_cfg); in mpegts_configure_pins()
1189 status = write16(state, SIO_PDR_MVAL_CFG__A, err_cfg); in mpegts_configure_pins()
1195 status = write16(state, SIO_PDR_MD1_CFG__A, in mpegts_configure_pins()
1199 status = write16(state, SIO_PDR_MD2_CFG__A, in mpegts_configure_pins()
1203 status = write16(state, SIO_PDR_MD3_CFG__A, in mpegts_configure_pins()
1207 status = write16(state, SIO_PDR_MD4_CFG__A, in mpegts_configure_pins()
1211 status = write16(state, SIO_PDR_MD5_CFG__A, in mpegts_configure_pins()
1215 status = write16(state, SIO_PDR_MD6_CFG__A, in mpegts_configure_pins()
1219 status = write16(state, SIO_PDR_MD7_CFG__A, in mpegts_configure_pins()
1228 status = write16(state, SIO_PDR_MD1_CFG__A, 0x0000); in mpegts_configure_pins()
1231 status = write16(state, SIO_PDR_MD2_CFG__A, 0x0000); in mpegts_configure_pins()
1234 status = write16(state, SIO_PDR_MD3_CFG__A, 0x0000); in mpegts_configure_pins()
1237 status = write16(state, SIO_PDR_MD4_CFG__A, 0x0000); in mpegts_configure_pins()
1240 status = write16(state, SIO_PDR_MD5_CFG__A, 0x0000); in mpegts_configure_pins()
1243 status = write16(state, SIO_PDR_MD6_CFG__A, 0x0000); in mpegts_configure_pins()
1246 status = write16(state, SIO_PDR_MD7_CFG__A, 0x0000); in mpegts_configure_pins()
1250 status = write16(state, SIO_PDR_MCLK_CFG__A, sio_pdr_mclk_cfg); in mpegts_configure_pins()
1253 status = write16(state, SIO_PDR_MD0_CFG__A, sio_pdr_mdx_cfg); in mpegts_configure_pins()
1258 status = write16(state, SIO_PDR_MON_CFG__A, 0x0000); in mpegts_configure_pins()
1262 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in mpegts_configure_pins()
1285 status = write16(state, SIO_BL_MODE__A, SIO_BL_MODE_CHAIN); in bl_chain_cmd()
1288 status = write16(state, SIO_BL_CHAIN_ADDR__A, rom_offset); in bl_chain_cmd()
1291 status = write16(state, SIO_BL_CHAIN_LEN__A, nr_of_elements); in bl_chain_cmd()
1294 status = write16(state, SIO_BL_ENABLE__A, SIO_BL_ENABLE_ON); in bl_chain_cmd()
1406 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, desired_ctrl); in dvbt_enable_ofdm_token_ring()
1436 status = write16(state, FEC_OC_SNC_MODE__A, fec_oc_snc_mode); in mpegts_stop()
1445 status = write16(state, FEC_OC_IPR_MODE__A, fec_oc_ipr_mode); in mpegts_stop()
1578 status = write16(state, IQM_AF_STDBY__A, data); in set_iqm_af()
1668 status = write16(state, SIO_CC_PWD_MODE__A, sio_cc_pwd_mode); in ctrl_power_mode()
1671 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in ctrl_power_mode()
1722 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in power_down_dvbt()
1725 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in power_down_dvbt()
1728 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in power_down_dvbt()
1762 status = write16(state, SCU_RAM_GPIO__A, in setoperation_mode()
1930 status = write16(state, FEC_OC_SNC_MODE__A, fec_oc_snc_mode); in mpegts_start()
1933 status = write16(state, FEC_OC_SNC_UNLOCK__A, 1); in mpegts_start()
1947 status = write16(state, FEC_OC_RCN_CTL_STEP_LO__A, 0x0000); in mpegts_dto_init()
1950 status = write16(state, FEC_OC_RCN_CTL_STEP_HI__A, 0x000C); in mpegts_dto_init()
1953 status = write16(state, FEC_OC_RCN_GAIN__A, 0x000A); in mpegts_dto_init()
1956 status = write16(state, FEC_OC_AVR_PARM_A__A, 0x0008); in mpegts_dto_init()
1959 status = write16(state, FEC_OC_AVR_PARM_B__A, 0x0006); in mpegts_dto_init()
1962 status = write16(state, FEC_OC_TMD_HI_MARGIN__A, 0x0680); in mpegts_dto_init()
1965 status = write16(state, FEC_OC_TMD_LO_MARGIN__A, 0x0080); in mpegts_dto_init()
1968 status = write16(state, FEC_OC_TMD_COUNT__A, 0x03F4); in mpegts_dto_init()
1973 status = write16(state, FEC_OC_OCR_INVERT__A, 0); in mpegts_dto_init()
1976 status = write16(state, FEC_OC_SNC_LWM__A, 2); in mpegts_dto_init()
1979 status = write16(state, FEC_OC_SNC_HWM__A, 12); in mpegts_dto_init()
2090 status = write16(state, FEC_OC_DTO_BURST_LEN__A, fec_oc_dto_burst_len); in mpegts_dto_setup()
2093 status = write16(state, FEC_OC_DTO_PERIOD__A, fec_oc_dto_period); in mpegts_dto_setup()
2096 status = write16(state, FEC_OC_DTO_MODE__A, fec_oc_dto_mode); in mpegts_dto_setup()
2099 status = write16(state, FEC_OC_FCT_MODE__A, fec_oc_fct_mode); in mpegts_dto_setup()
2102 status = write16(state, FEC_OC_MODE__A, fec_oc_reg_mode); in mpegts_dto_setup()
2105 status = write16(state, FEC_OC_IPR_MODE__A, fec_oc_reg_ipr_mode); in mpegts_dto_setup()
2113 status = write16(state, FEC_OC_TMD_INT_UPD_RATE__A, in mpegts_dto_setup()
2117 status = write16(state, FEC_OC_TMD_MODE__A, fec_oc_tmd_mode); in mpegts_dto_setup()
2154 return write16(state, FEC_OC_IPR_INVERT__A, fec_oc_reg_ipr_invert); in mpegts_configure_polarity()
2178 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2193 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2207 status = write16(state, SCU_RAM_AGC_KI_RED__A, data); in set_agc_rf()
2224 status = write16(state, in set_agc_rf()
2232 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, in set_agc_rf()
2238 status = write16(state, SCU_RAM_AGC_RF_MAX__A, in set_agc_rf()
2251 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2264 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2269 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, 0); in set_agc_rf()
2274 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A, in set_agc_rf()
2286 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2295 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2329 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2345 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2358 status = write16(state, SCU_RAM_AGC_KI_RED__A, data); in set_agc_if()
2369 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in set_agc_if()
2382 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2398 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2403 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in set_agc_if()
2416 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2425 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2433 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, p_agc_cfg->top); in set_agc_if()
2769 status = write16(state, SIO_HI_RA_RAM_PAR_1__A, in ConfigureI2CBridge()
2774 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in ConfigureI2CBridge()
2779 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in ConfigureI2CBridge()
2804 status = write16(state, IQM_AF_PDREF__A, p_pre_saw_cfg->reference); in set_pre_saw()
2823 status = write16(state, SIO_BL_MODE__A, SIO_BL_MODE_DIRECT); in bl_direct_cmd()
2826 status = write16(state, SIO_BL_TGT_HDR__A, blockbank); in bl_direct_cmd()
2829 status = write16(state, SIO_BL_TGT_ADDR__A, offset); in bl_direct_cmd()
2832 status = write16(state, SIO_BL_SRC_ADDR__A, rom_offset); in bl_direct_cmd()
2835 status = write16(state, SIO_BL_SRC_LEN__A, nr_of_elements); in bl_direct_cmd()
2838 status = write16(state, SIO_BL_ENABLE__A, SIO_BL_ENABLE_ON); in bl_direct_cmd()
2870 status = write16(state, IQM_AF_COMM_EXEC__A, IQM_AF_COMM_EXEC_ACTIVE); in adc_sync_measurement()
2873 status = write16(state, IQM_AF_START_LOCK__A, 1); in adc_sync_measurement()
2928 status = write16(state, IQM_AF_CLKNEG__A, clk_neg); in adc_synchronization()
3062 status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A, in init_agc()
3067 status = write16(state, SCU_RAM_AGC_CLP_CTRL_MODE__A, clp_ctrl_mode); in init_agc()
3070 status = write16(state, SCU_RAM_AGC_INGAIN_TGT__A, ingain_tgt); in init_agc()
3073 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, ingain_tgt_min); in init_agc()
3076 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MAX__A, ingain_tgt_max); in init_agc()
3079 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MIN__A, in init_agc()
3083 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in init_agc()
3087 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI__A, 0); in init_agc()
3090 status = write16(state, SCU_RAM_AGC_IF_IACCU_LO__A, 0); in init_agc()
3093 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A, 0); in init_agc()
3096 status = write16(state, SCU_RAM_AGC_RF_IACCU_LO__A, 0); in init_agc()
3099 status = write16(state, SCU_RAM_AGC_CLP_SUM_MAX__A, clp_sum_max); in init_agc()
3102 status = write16(state, SCU_RAM_AGC_SNS_SUM_MAX__A, sns_sum_max); in init_agc()
3106 status = write16(state, SCU_RAM_AGC_KI_INNERGAIN_MIN__A, in init_agc()
3110 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT__A, in init_agc()
3114 status = write16(state, SCU_RAM_AGC_CLP_CYCLEN__A, clp_cyclen); in init_agc()
3118 status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MAX__A, 1023); in init_agc()
3121 status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MIN__A, (u16) -1023); in init_agc()
3124 status = write16(state, SCU_RAM_AGC_FAST_SNS_CTRL_DELAY__A, 50); in init_agc()
3128 status = write16(state, SCU_RAM_AGC_KI_MAXMINGAIN_TH__A, 20); in init_agc()
3131 status = write16(state, SCU_RAM_AGC_CLP_SUM_MIN__A, clp_sum_min); in init_agc()
3134 status = write16(state, SCU_RAM_AGC_SNS_SUM_MIN__A, sns_sum_min); in init_agc()
3137 status = write16(state, SCU_RAM_AGC_CLP_DIR_TO__A, clp_dir_to); in init_agc()
3140 status = write16(state, SCU_RAM_AGC_SNS_DIR_TO__A, sns_dir_to); in init_agc()
3143 status = write16(state, SCU_RAM_AGC_KI_MINGAIN__A, 0x7fff); in init_agc()
3146 status = write16(state, SCU_RAM_AGC_KI_MAXGAIN__A, 0x0); in init_agc()
3149 status = write16(state, SCU_RAM_AGC_KI_MIN__A, 0x0117); in init_agc()
3152 status = write16(state, SCU_RAM_AGC_KI_MAX__A, 0x0657); in init_agc()
3155 status = write16(state, SCU_RAM_AGC_CLP_SUM__A, 0); in init_agc()
3158 status = write16(state, SCU_RAM_AGC_CLP_CYCCNT__A, 0); in init_agc()
3161 status = write16(state, SCU_RAM_AGC_CLP_DIR_WD__A, 0); in init_agc()
3164 status = write16(state, SCU_RAM_AGC_CLP_DIR_STP__A, 1); in init_agc()
3167 status = write16(state, SCU_RAM_AGC_SNS_SUM__A, 0); in init_agc()
3170 status = write16(state, SCU_RAM_AGC_SNS_CYCCNT__A, 0); in init_agc()
3173 status = write16(state, SCU_RAM_AGC_SNS_DIR_WD__A, 0); in init_agc()
3176 status = write16(state, SCU_RAM_AGC_SNS_DIR_STP__A, 1); in init_agc()
3179 status = write16(state, SCU_RAM_AGC_SNS_CYCLEN__A, 500); in init_agc()
3182 status = write16(state, SCU_RAM_AGC_KI_CYCLEN__A, 500); in init_agc()
3197 status = write16(state, SCU_RAM_AGC_KI__A, data); in init_agc()
3210 status = write16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0); in dvbtqam_get_acc_pkt_err()
3255 status = write16(state, OFDM_SC_RA_RAM_CMD_ADDR__A, subcmd); in dvbt_sc_command()
3273 status = write16(state, OFDM_SC_RA_RAM_PARAM1__A, param1); in dvbt_sc_command()
3277 status = write16(state, OFDM_SC_RA_RAM_PARAM0__A, param0); in dvbt_sc_command()
3282 status = write16(state, OFDM_SC_RA_RAM_CMD__A, cmd); in dvbt_sc_command()
3357 status = write16(state, IQM_CF_BYPASSDET__A, 0); in dvbt_ctrl_set_inc_enable()
3359 status = write16(state, IQM_CF_BYPASSDET__A, 1); in dvbt_ctrl_set_inc_enable()
3374 status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A, in dvbt_ctrl_set_fr_enable()
3378 status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A, 0); in dvbt_ctrl_set_fr_enable()
3414 status = write16(state, OFDM_SC_RA_RAM_ECHO_THRES__A, data); in dvbt_ctrl_set_echo_threshold()
3436 status = write16(state, SCU_RAM_FEC_PRE_RS_BER_FILTER_SH__A, in dvbt_ctrl_set_sqi_speed()
3476 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MAX__A, in dvbt_activate_presets()
3522 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in set_dvbt_standard()
3525 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in set_dvbt_standard()
3528 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in set_dvbt_standard()
3534 status = write16(state, IQM_AF_UPD_SEL__A, 1); in set_dvbt_standard()
3538 status = write16(state, IQM_AF_CLP_LEN__A, 0); in set_dvbt_standard()
3542 status = write16(state, IQM_AF_SNS_LEN__A, 0); in set_dvbt_standard()
3546 status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC); in set_dvbt_standard()
3553 status = write16(state, IQM_AF_AGC_RF__A, 0); in set_dvbt_standard()
3558 status = write16(state, IQM_AF_INC_LCT__A, 0); /* crunch in IQM_CF */ in set_dvbt_standard()
3561 status = write16(state, IQM_CF_DET_LCT__A, 0); /* detect in IQM_CF */ in set_dvbt_standard()
3564 status = write16(state, IQM_CF_WND_LEN__A, 3); /* peak detector window length */ in set_dvbt_standard()
3568 status = write16(state, IQM_RC_STRETCH__A, 16); in set_dvbt_standard()
3571 status = write16(state, IQM_CF_OUT_ENA__A, 0x4); /* enable output 2 */ in set_dvbt_standard()
3574 status = write16(state, IQM_CF_DS_ENA__A, 0x4); /* decimate output 2 */ in set_dvbt_standard()
3577 status = write16(state, IQM_CF_SCALE__A, 1600); in set_dvbt_standard()
3580 status = write16(state, IQM_CF_SCALE_SH__A, 0); in set_dvbt_standard()
3585 status = write16(state, IQM_AF_CLP_TH__A, 448); in set_dvbt_standard()
3588 status = write16(state, IQM_CF_DATATH__A, 495); /* crunching threshold */ in set_dvbt_standard()
3597 status = write16(state, IQM_CF_PKDTH__A, 2); /* peak detector threshold */ in set_dvbt_standard()
3600 status = write16(state, IQM_CF_POW_MEAS_LEN__A, 2); in set_dvbt_standard()
3604 status = write16(state, IQM_CF_COMM_INT_MSK__A, 1); in set_dvbt_standard()
3607 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE); in set_dvbt_standard()
3620 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_dvbt_standard()
3636 status = write16(state, OFDM_SC_RA_RAM_CONFIG__A, data); in set_dvbt_standard()
3641 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_dvbt_standard()
3647 status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A, in set_dvbt_standard()
3655 status = write16(state, OFDM_SC_RA_RAM_BE_OPT_DELAY__A, 1); in set_dvbt_standard()
3658 status = write16(state, OFDM_SC_RA_RAM_BE_OPT_INIT_DELAY__A, 2); in set_dvbt_standard()
3664 status = write16(state, FEC_DI_INPUT_CTL__A, 1); /* OFDM input */ in set_dvbt_standard()
3670 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x400); in set_dvbt_standard()
3674 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x1000); in set_dvbt_standard()
3678 status = write16(state, FEC_RS_MEASUREMENT_PRESCALE__A, 0x0001); in set_dvbt_standard()
3722 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE); in dvbt_start()
3761 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_dvbt()
3766 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in set_dvbt()
3769 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in set_dvbt()
3775 status = write16(state, OFDM_CP_COMM_EXEC__A, OFDM_CP_COMM_EXEC_STOP); in set_dvbt()
3874 status = write16(state, OFDM_EC_SB_PRIOR__A, OFDM_EC_SB_PRIOR_HI); in set_dvbt()
3921 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3926 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3930 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3934 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3938 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
3945 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3950 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3954 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3958 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3962 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
3969 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3974 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3978 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3982 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3986 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
4042 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_dvbt()
4047 status = write16(state, OFDM_SC_COMM_STATE__A, 0); in set_dvbt()
4050 status = write16(state, OFDM_SC_COMM_EXEC__A, 1); in set_dvbt()
4163 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP); in power_down_qam()
4256 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, fec_rs_period); in set_qam_measurement()
4259 status = write16(state, FEC_RS_MEASUREMENT_PRESCALE__A, in set_qam_measurement()
4263 status = write16(state, FEC_OC_SNC_FAIL_PERIOD__A, fec_rs_period); in set_qam_measurement()
4277 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 13517); in set_qam16()
4280 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 13517); in set_qam16()
4283 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 13517); in set_qam16()
4286 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 13517); in set_qam16()
4289 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13517); in set_qam16()
4292 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 13517); in set_qam16()
4296 status = write16(state, QAM_DQ_QUAL_FUN0__A, 2); in set_qam16()
4299 status = write16(state, QAM_DQ_QUAL_FUN1__A, 2); in set_qam16()
4302 status = write16(state, QAM_DQ_QUAL_FUN2__A, 2); in set_qam16()
4305 status = write16(state, QAM_DQ_QUAL_FUN3__A, 2); in set_qam16()
4308 status = write16(state, QAM_DQ_QUAL_FUN4__A, 2); in set_qam16()
4311 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam16()
4315 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam16()
4318 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam16()
4321 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam16()
4326 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam16()
4332 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam16()
4335 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam16()
4338 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam16()
4341 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam16()
4344 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam16()
4347 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam16()
4350 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam16()
4353 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam16()
4357 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam16()
4360 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20); in set_qam16()
4363 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 80); in set_qam16()
4366 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam16()
4369 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20); in set_qam16()
4372 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam16()
4375 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam16()
4378 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 16); in set_qam16()
4381 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 32); in set_qam16()
4384 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam16()
4387 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam16()
4390 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam16()
4397 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 140); in set_qam16()
4400 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 50); in set_qam16()
4403 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 95); in set_qam16()
4406 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 120); in set_qam16()
4409 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 230); in set_qam16()
4412 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 105); in set_qam16()
4416 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam16()
4419 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam16()
4422 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 24); in set_qam16()
4429 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 16); in set_qam16()
4432 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 220); in set_qam16()
4435 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 25); in set_qam16()
4438 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 6); in set_qam16()
4441 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -24); in set_qam16()
4444 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -65); in set_qam16()
4447 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -127); in set_qam16()
4472 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 6707); in set_qam32()
4475 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 6707); in set_qam32()
4478 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 6707); in set_qam32()
4481 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 6707); in set_qam32()
4484 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 6707); in set_qam32()
4487 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 6707); in set_qam32()
4492 status = write16(state, QAM_DQ_QUAL_FUN0__A, 3); in set_qam32()
4495 status = write16(state, QAM_DQ_QUAL_FUN1__A, 3); in set_qam32()
4498 status = write16(state, QAM_DQ_QUAL_FUN2__A, 3); in set_qam32()
4501 status = write16(state, QAM_DQ_QUAL_FUN3__A, 3); in set_qam32()
4504 status = write16(state, QAM_DQ_QUAL_FUN4__A, 3); in set_qam32()
4507 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam32()
4511 status = write16(state, QAM_SY_SYNC_HWM__A, 6); in set_qam32()
4514 status = write16(state, QAM_SY_SYNC_AWM__A, 5); in set_qam32()
4517 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam32()
4523 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam32()
4531 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam32()
4534 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam32()
4537 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam32()
4540 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam32()
4543 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam32()
4546 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam32()
4549 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam32()
4552 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam32()
4556 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam32()
4559 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20); in set_qam32()
4562 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 80); in set_qam32()
4565 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam32()
4568 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20); in set_qam32()
4571 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam32()
4574 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam32()
4577 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 16); in set_qam32()
4580 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 16); in set_qam32()
4583 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam32()
4586 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam32()
4589 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 0); in set_qam32()
4596 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 90); in set_qam32()
4599 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 50); in set_qam32()
4602 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam32()
4605 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam32()
4608 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 170); in set_qam32()
4611 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 100); in set_qam32()
4615 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam32()
4618 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam32()
4621 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 10); in set_qam32()
4628 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 12); in set_qam32()
4631 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 140); in set_qam32()
4634 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) -8); in set_qam32()
4637 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) -16); in set_qam32()
4640 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -26); in set_qam32()
4643 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -56); in set_qam32()
4646 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -86); in set_qam32()
4667 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 13336); in set_qam64()
4670 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 12618); in set_qam64()
4673 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 11988); in set_qam64()
4676 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 13809); in set_qam64()
4679 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13809); in set_qam64()
4682 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 15609); in set_qam64()
4687 status = write16(state, QAM_DQ_QUAL_FUN0__A, 4); in set_qam64()
4690 status = write16(state, QAM_DQ_QUAL_FUN1__A, 4); in set_qam64()
4693 status = write16(state, QAM_DQ_QUAL_FUN2__A, 4); in set_qam64()
4696 status = write16(state, QAM_DQ_QUAL_FUN3__A, 4); in set_qam64()
4699 status = write16(state, QAM_DQ_QUAL_FUN4__A, 3); in set_qam64()
4702 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam64()
4706 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam64()
4709 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam64()
4712 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam64()
4717 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam64()
4725 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam64()
4728 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam64()
4731 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam64()
4734 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam64()
4737 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam64()
4740 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam64()
4743 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam64()
4746 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam64()
4750 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam64()
4753 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 30); in set_qam64()
4756 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 100); in set_qam64()
4759 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam64()
4762 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 30); in set_qam64()
4765 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam64()
4768 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam64()
4771 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam64()
4774 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 48); in set_qam64()
4777 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam64()
4780 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam64()
4783 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam64()
4790 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 100); in set_qam64()
4793 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam64()
4796 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam64()
4799 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 110); in set_qam64()
4802 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 200); in set_qam64()
4805 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 95); in set_qam64()
4809 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam64()
4812 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam64()
4815 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 15); in set_qam64()
4822 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 12); in set_qam64()
4825 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 141); in set_qam64()
4828 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 7); in set_qam64()
4831 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 0); in set_qam64()
4834 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -15); in set_qam64()
4837 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -45); in set_qam64()
4840 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -80); in set_qam64()
4862 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 6564); in set_qam128()
4865 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 6598); in set_qam128()
4868 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 6394); in set_qam128()
4871 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 6409); in set_qam128()
4874 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 6656); in set_qam128()
4877 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 7238); in set_qam128()
4882 status = write16(state, QAM_DQ_QUAL_FUN0__A, 6); in set_qam128()
4885 status = write16(state, QAM_DQ_QUAL_FUN1__A, 6); in set_qam128()
4888 status = write16(state, QAM_DQ_QUAL_FUN2__A, 6); in set_qam128()
4891 status = write16(state, QAM_DQ_QUAL_FUN3__A, 6); in set_qam128()
4894 status = write16(state, QAM_DQ_QUAL_FUN4__A, 5); in set_qam128()
4897 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam128()
4901 status = write16(state, QAM_SY_SYNC_HWM__A, 6); in set_qam128()
4904 status = write16(state, QAM_SY_SYNC_AWM__A, 5); in set_qam128()
4907 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam128()
4914 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam128()
4922 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam128()
4925 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam128()
4928 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam128()
4931 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam128()
4934 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam128()
4937 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam128()
4940 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam128()
4943 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam128()
4947 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam128()
4950 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 40); in set_qam128()
4953 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 120); in set_qam128()
4956 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam128()
4959 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 40); in set_qam128()
4962 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 60); in set_qam128()
4965 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam128()
4968 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam128()
4971 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 64); in set_qam128()
4974 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam128()
4977 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam128()
4980 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 0); in set_qam128()
4987 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 50); in set_qam128()
4990 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam128()
4993 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam128()
4996 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam128()
4999 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 140); in set_qam128()
5002 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 100); in set_qam128()
5006 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam128()
5009 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 5); in set_qam128()
5013 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 12); in set_qam128()
5019 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 8); in set_qam128()
5022 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 65); in set_qam128()
5025 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 5); in set_qam128()
5028 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 3); in set_qam128()
5031 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -1); in set_qam128()
5034 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -12); in set_qam128()
5037 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -23); in set_qam128()
5059 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 11502); in set_qam256()
5062 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 12084); in set_qam256()
5065 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 12543); in set_qam256()
5068 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 12931); in set_qam256()
5071 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13629); in set_qam256()
5074 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 15385); in set_qam256()
5079 status = write16(state, QAM_DQ_QUAL_FUN0__A, 8); in set_qam256()
5082 status = write16(state, QAM_DQ_QUAL_FUN1__A, 8); in set_qam256()
5085 status = write16(state, QAM_DQ_QUAL_FUN2__A, 8); in set_qam256()
5088 status = write16(state, QAM_DQ_QUAL_FUN3__A, 8); in set_qam256()
5091 status = write16(state, QAM_DQ_QUAL_FUN4__A, 6); in set_qam256()
5094 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam256()
5098 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam256()
5101 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam256()
5104 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam256()
5110 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam256()
5118 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam256()
5121 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam256()
5124 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam256()
5127 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam256()
5130 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam256()
5133 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam256()
5136 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam256()
5139 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam256()
5143 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam256()
5146 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 50); in set_qam256()
5149 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 250); in set_qam256()
5152 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam256()
5155 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 50); in set_qam256()
5158 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 125); in set_qam256()
5161 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam256()
5164 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam256()
5167 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 48); in set_qam256()
5170 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam256()
5173 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam256()
5176 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam256()
5183 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 50); in set_qam256()
5186 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam256()
5189 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam256()
5192 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam256()
5195 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 150); in set_qam256()
5198 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 110); in set_qam256()
5202 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam256()
5205 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam256()
5208 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 12); in set_qam256()
5215 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 8); in set_qam256()
5218 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 74); in set_qam256()
5221 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 18); in set_qam256()
5224 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 13); in set_qam256()
5227 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) 7); in set_qam256()
5230 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) 0); in set_qam256()
5233 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -8); in set_qam256()
5255 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP); in qam_reset_qam()
5296 status = write16(state, IQM_FD_RATESEL__A, ratesel); in qam_set_symbolrate()
5330 status = write16(state, QAM_LC_SYMBOL_FREQ__A, (u16) lc_symb_rate); in qam_set_symbolrate()
5460 status = write16(state, FEC_DI_COMM_EXEC__A, FEC_DI_COMM_EXEC_STOP); in set_qam()
5463 status = write16(state, FEC_RS_COMM_EXEC__A, FEC_RS_COMM_EXEC_STOP); in set_qam()
5561 status = write16(state, IQM_CF_SCALE_SH__A, IQM_CF_SCALE_SH__PRE); in set_qam()
5564 status = write16(state, QAM_SY_TIMEOUT__A, QAM_SY_TIMEOUT__PRE); in set_qam()
5569 status = write16(state, QAM_LC_RATE_LIMIT__A, 3); in set_qam()
5572 status = write16(state, QAM_LC_LPF_FACTORP__A, 4); in set_qam()
5575 status = write16(state, QAM_LC_LPF_FACTORI__A, 4); in set_qam()
5578 status = write16(state, QAM_LC_MODE__A, 7); in set_qam()
5582 status = write16(state, QAM_LC_QUAL_TAB0__A, 1); in set_qam()
5585 status = write16(state, QAM_LC_QUAL_TAB1__A, 1); in set_qam()
5588 status = write16(state, QAM_LC_QUAL_TAB2__A, 1); in set_qam()
5591 status = write16(state, QAM_LC_QUAL_TAB3__A, 1); in set_qam()
5594 status = write16(state, QAM_LC_QUAL_TAB4__A, 2); in set_qam()
5597 status = write16(state, QAM_LC_QUAL_TAB5__A, 2); in set_qam()
5600 status = write16(state, QAM_LC_QUAL_TAB6__A, 2); in set_qam()
5603 status = write16(state, QAM_LC_QUAL_TAB8__A, 2); in set_qam()
5606 status = write16(state, QAM_LC_QUAL_TAB9__A, 2); in set_qam()
5609 status = write16(state, QAM_LC_QUAL_TAB10__A, 2); in set_qam()
5612 status = write16(state, QAM_LC_QUAL_TAB12__A, 2); in set_qam()
5615 status = write16(state, QAM_LC_QUAL_TAB15__A, 3); in set_qam()
5618 status = write16(state, QAM_LC_QUAL_TAB16__A, 3); in set_qam()
5621 status = write16(state, QAM_LC_QUAL_TAB20__A, 4); in set_qam()
5624 status = write16(state, QAM_LC_QUAL_TAB25__A, 4); in set_qam()
5629 status = write16(state, QAM_SY_SP_INV__A, in set_qam()
5635 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_qam()
5665 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_qam()
5680 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE); in set_qam()
5683 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_ACTIVE); in set_qam()
5686 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE); in set_qam()
5732 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in set_qam_standard()
5735 status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC); in set_qam_standard()
5766 status = write16(state, IQM_CF_OUT_ENA__A, 1 << IQM_CF_OUT_ENA_QAM__B); in set_qam_standard()
5769 status = write16(state, IQM_CF_SYMMETRIC__A, 0); in set_qam_standard()
5772 status = write16(state, IQM_CF_MIDTAP__A, in set_qam_standard()
5777 status = write16(state, IQM_RC_STRETCH__A, 21); in set_qam_standard()
5780 status = write16(state, IQM_AF_CLP_LEN__A, 0); in set_qam_standard()
5783 status = write16(state, IQM_AF_CLP_TH__A, 448); in set_qam_standard()
5786 status = write16(state, IQM_AF_SNS_LEN__A, 0); in set_qam_standard()
5789 status = write16(state, IQM_CF_POW_MEAS_LEN__A, 0); in set_qam_standard()
5793 status = write16(state, IQM_FS_ADJ_SEL__A, 1); in set_qam_standard()
5796 status = write16(state, IQM_RC_ADJ_SEL__A, 1); in set_qam_standard()
5799 status = write16(state, IQM_CF_ADJ_SEL__A, 1); in set_qam_standard()
5802 status = write16(state, IQM_AF_UPD_SEL__A, 0); in set_qam_standard()
5807 status = write16(state, IQM_CF_CLP_VAL__A, 500); in set_qam_standard()
5810 status = write16(state, IQM_CF_DATATH__A, 1000); in set_qam_standard()
5813 status = write16(state, IQM_CF_BYPASSDET__A, 1); in set_qam_standard()
5816 status = write16(state, IQM_CF_DET_LCT__A, 0); in set_qam_standard()
5819 status = write16(state, IQM_CF_WND_LEN__A, 1); in set_qam_standard()
5822 status = write16(state, IQM_CF_PKDTH__A, 1); in set_qam_standard()
5825 status = write16(state, IQM_AF_INC_BYPASS__A, 1); in set_qam_standard()
5833 status = write16(state, IQM_AF_START_LOCK__A, 0x01); in set_qam_standard()
5843 status = write16(state, SCU_RAM_QAM_FSM_STEP_PERIOD__A, 2000); in set_qam_standard()
5848 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_qam_standard()
5871 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_qam_standard()
5885 status = write16(state, SCU_RAM_GPIO__A, in write_gpio()
5891 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in write_gpio()
5898 status = write16(state, SIO_PDR_SMA_TX_CFG__A, in write_gpio()
5912 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5918 status = write16(state, SIO_PDR_SMA_RX_CFG__A, in write_gpio()
5932 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5938 status = write16(state, SIO_PDR_GPIO_CFG__A, in write_gpio()
5952 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5958 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in write_gpio()
6038 status = write16(state, SIO_CC_PWD_MODE__A, in power_down_device()
6042 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in power_down_device()
6070 status = write16(state, SIO_CC_SOFT_RST__A, in init_drxk()
6076 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in init_drxk()
6115 status = write16(state, SCU_RAM_GPIO__A, in init_drxk()
6127 status = write16(state, AUD_COMM_EXEC__A, AUD_COMM_EXEC_STOP); in init_drxk()
6130 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_STOP); in init_drxk()
6135 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, in init_drxk()
6141 status = write16(state, SIO_BL_COMM_EXEC__A, in init_drxk()
6157 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, in init_drxk()
6163 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in init_drxk()
6188 status = write16(state, SCU_RAM_DRIVER_VER_HI__A, in init_drxk()
6197 status = write16(state, SCU_RAM_DRIVER_VER_LO__A, in init_drxk()
6217 status = write16(state, SCU_RAM_DRIVER_DEBUG__A, 0); in init_drxk()
6223 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_STOP); in init_drxk()
6615 write16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0); in drxk_get_stats()