Lines Matching refs:state
93 static void dib7090_setDibTxMux(struct dib7000p_state *state, int mode);
94 static void dib7090_setHostBusMux(struct dib7000p_state *state, int mode);
96 static u16 dib7000p_read_word(struct dib7000p_state *state, u16 reg) in dib7000p_read_word() argument
100 if (mutex_lock_interruptible(&state->i2c_buffer_lock) < 0) { in dib7000p_read_word()
105 state->i2c_write_buffer[0] = reg >> 8; in dib7000p_read_word()
106 state->i2c_write_buffer[1] = reg & 0xff; in dib7000p_read_word()
108 memset(state->msg, 0, 2 * sizeof(struct i2c_msg)); in dib7000p_read_word()
109 state->msg[0].addr = state->i2c_addr >> 1; in dib7000p_read_word()
110 state->msg[0].flags = 0; in dib7000p_read_word()
111 state->msg[0].buf = state->i2c_write_buffer; in dib7000p_read_word()
112 state->msg[0].len = 2; in dib7000p_read_word()
113 state->msg[1].addr = state->i2c_addr >> 1; in dib7000p_read_word()
114 state->msg[1].flags = I2C_M_RD; in dib7000p_read_word()
115 state->msg[1].buf = state->i2c_read_buffer; in dib7000p_read_word()
116 state->msg[1].len = 2; in dib7000p_read_word()
118 if (i2c_transfer(state->i2c_adap, state->msg, 2) != 2) in dib7000p_read_word()
121 ret = (state->i2c_read_buffer[0] << 8) | state->i2c_read_buffer[1]; in dib7000p_read_word()
122 mutex_unlock(&state->i2c_buffer_lock); in dib7000p_read_word()
126 static int dib7000p_write_word(struct dib7000p_state *state, u16 reg, u16 val) in dib7000p_write_word() argument
130 if (mutex_lock_interruptible(&state->i2c_buffer_lock) < 0) { in dib7000p_write_word()
135 state->i2c_write_buffer[0] = (reg >> 8) & 0xff; in dib7000p_write_word()
136 state->i2c_write_buffer[1] = reg & 0xff; in dib7000p_write_word()
137 state->i2c_write_buffer[2] = (val >> 8) & 0xff; in dib7000p_write_word()
138 state->i2c_write_buffer[3] = val & 0xff; in dib7000p_write_word()
140 memset(&state->msg[0], 0, sizeof(struct i2c_msg)); in dib7000p_write_word()
141 state->msg[0].addr = state->i2c_addr >> 1; in dib7000p_write_word()
142 state->msg[0].flags = 0; in dib7000p_write_word()
143 state->msg[0].buf = state->i2c_write_buffer; in dib7000p_write_word()
144 state->msg[0].len = 4; in dib7000p_write_word()
146 ret = (i2c_transfer(state->i2c_adap, state->msg, 1) != 1 ? in dib7000p_write_word()
148 mutex_unlock(&state->i2c_buffer_lock); in dib7000p_write_word()
152 static void dib7000p_write_tab(struct dib7000p_state *state, u16 * buf) in dib7000p_write_tab() argument
161 dib7000p_write_word(state, r, *n++); in dib7000p_write_tab()
168 static int dib7000p_set_output_mode(struct dib7000p_state *state, int mode) in dib7000p_set_output_mode() argument
175 smo_mode = (dib7000p_read_word(state, 235) & 0x0050) | (1 << 1); in dib7000p_set_output_mode()
177 dprintk("setting output mode for demod %p to %d", &state->demod, mode); in dib7000p_set_output_mode()
190 if (state->cfg.hostbus_diversity) in dib7000p_set_output_mode()
207 dprintk("Unhandled output_mode passed to be set for demod %p", &state->demod); in dib7000p_set_output_mode()
211 if (state->cfg.output_mpeg2_in_188_bytes) in dib7000p_set_output_mode()
214 ret |= dib7000p_write_word(state, 235, smo_mode); in dib7000p_set_output_mode()
215 ret |= dib7000p_write_word(state, 236, fifo_threshold); /* synchronous fread */ in dib7000p_set_output_mode()
216 if (state->version != SOC7090) in dib7000p_set_output_mode()
217 ret |= dib7000p_write_word(state, 1286, outreg); /* P_Div_active */ in dib7000p_set_output_mode()
224 struct dib7000p_state *state = demod->demodulator_priv; in dib7000p_set_diversity_in() local
226 if (state->div_force_off) { in dib7000p_set_diversity_in()
229 dib7000p_write_word(state, 207, 0); in dib7000p_set_diversity_in()
231 dib7000p_write_word(state, 207, (state->div_sync_wait << 4) | (1 << 2) | (2 << 0)); in dib7000p_set_diversity_in()
233 state->div_state = (u8) onoff; in dib7000p_set_diversity_in()
236 dib7000p_write_word(state, 204, 6); in dib7000p_set_diversity_in()
237 dib7000p_write_word(state, 205, 16); in dib7000p_set_diversity_in()
240 dib7000p_write_word(state, 204, 1); in dib7000p_set_diversity_in()
241 dib7000p_write_word(state, 205, 0); in dib7000p_set_diversity_in()
247 static int dib7000p_set_power_mode(struct dib7000p_state *state, enum dib7000p_power_mode mode) in dib7000p_set_power_mode() argument
250 …g_776 = 0x0007, reg_899 = 0x0003, reg_1280 = (0xfe00) | (dib7000p_read_word(state, 1280) & 0x01ff); in dib7000p_set_power_mode()
260 if (state->version == SOC7090) in dib7000p_set_power_mode()
272 if (state->version != SOC7090) in dib7000p_set_power_mode()
279 if (state->version == SOC7090) in dib7000p_set_power_mode()
288 dib7000p_write_word(state, 774, reg_774); in dib7000p_set_power_mode()
289 dib7000p_write_word(state, 775, reg_775); in dib7000p_set_power_mode()
290 dib7000p_write_word(state, 776, reg_776); in dib7000p_set_power_mode()
291 dib7000p_write_word(state, 1280, reg_1280); in dib7000p_set_power_mode()
292 if (state->version != SOC7090) in dib7000p_set_power_mode()
293 dib7000p_write_word(state, 899, reg_899); in dib7000p_set_power_mode()
298 static void dib7000p_set_adc_state(struct dib7000p_state *state, enum dibx000_adc_states no) in dib7000p_set_adc_state() argument
303 if (state->version != SOC7090) { in dib7000p_set_adc_state()
304 reg_908 = dib7000p_read_word(state, 908); in dib7000p_set_adc_state()
305 reg_909 = dib7000p_read_word(state, 909); in dib7000p_set_adc_state()
310 if (state->version == SOC7090) { in dib7000p_set_adc_state()
311 reg = dib7000p_read_word(state, 1925); in dib7000p_set_adc_state()
313 …dib7000p_write_word(state, 1925, reg | (1 << 4) | (1 << 2)); /* en_slowAdc = 1 & reset_sladc = 1 */ in dib7000p_set_adc_state()
315 reg = dib7000p_read_word(state, 1925); /* read acces to make it works... strange ... */ in dib7000p_set_adc_state()
317 dib7000p_write_word(state, 1925, reg & ~(1 << 4)); /* en_slowAdc = 1 & reset_sladc = 0 */ in dib7000p_set_adc_state()
319 reg = dib7000p_read_word(state, 72) & ~((0x3 << 14) | (0x3 << 12)); in dib7000p_set_adc_state()
320 …dib7000p_write_word(state, 72, reg | (1 << 14) | (3 << 12) | 524); /* ref = Vin1 => Vbg ; sel = Vi… in dib7000p_set_adc_state()
323 dib7000p_write_word(state, 909, reg_909); in dib7000p_set_adc_state()
329 if (state->version == SOC7090) { in dib7000p_set_adc_state()
330 reg = dib7000p_read_word(state, 1925); in dib7000p_set_adc_state()
331 …dib7000p_write_word(state, 1925, (reg & ~(1 << 2)) | (1 << 4)); /* reset_sladc = 1 en_slowAdc = 0 … in dib7000p_set_adc_state()
360 reg_909 |= (state->cfg.disable_sample_and_hold & 1) << 4; in dib7000p_set_adc_state()
361 reg_908 |= (state->cfg.enable_current_mirror & 1) << 7; in dib7000p_set_adc_state()
363 if (state->version != SOC7090) { in dib7000p_set_adc_state()
364 dib7000p_write_word(state, 908, reg_908); in dib7000p_set_adc_state()
365 dib7000p_write_word(state, 909, reg_909); in dib7000p_set_adc_state()
369 static int dib7000p_set_bandwidth(struct dib7000p_state *state, u32 bw) in dib7000p_set_bandwidth() argument
374 state->current_bandwidth = bw; in dib7000p_set_bandwidth()
376 if (state->timf == 0) { in dib7000p_set_bandwidth()
378 timf = state->cfg.bw->timf; in dib7000p_set_bandwidth()
381 timf = state->timf; in dib7000p_set_bandwidth()
386 dib7000p_write_word(state, 23, (u16) ((timf >> 16) & 0xffff)); in dib7000p_set_bandwidth()
387 dib7000p_write_word(state, 24, (u16) ((timf) & 0xffff)); in dib7000p_set_bandwidth()
392 static int dib7000p_sad_calib(struct dib7000p_state *state) in dib7000p_sad_calib() argument
395 dib7000p_write_word(state, 73, (0 << 1) | (0 << 0)); in dib7000p_sad_calib()
397 if (state->version == SOC7090) in dib7000p_sad_calib()
398 dib7000p_write_word(state, 74, 2048); in dib7000p_sad_calib()
400 dib7000p_write_word(state, 74, 776); in dib7000p_sad_calib()
403 dib7000p_write_word(state, 73, (1 << 0)); in dib7000p_sad_calib()
404 dib7000p_write_word(state, 73, (0 << 0)); in dib7000p_sad_calib()
413 struct dib7000p_state *state = demod->demodulator_priv; in dib7000p_set_wbd_ref() local
416 state->wbd_ref = value; in dib7000p_set_wbd_ref()
417 return dib7000p_write_word(state, 105, (dib7000p_read_word(state, 105) & 0xf000) | value); in dib7000p_set_wbd_ref()
423 struct dib7000p_state *state = fe->demodulator_priv; in dib7000p_get_agc_values() local
426 *agc_global = dib7000p_read_word(state, 394); in dib7000p_get_agc_values()
428 *agc1 = dib7000p_read_word(state, 392); in dib7000p_get_agc_values()
430 *agc2 = dib7000p_read_word(state, 393); in dib7000p_get_agc_values()
432 *wbd = dib7000p_read_word(state, 397); in dib7000p_get_agc_values()
439 struct dib7000p_state *state = fe->demodulator_priv; in dib7000p_set_agc1_min() local
440 return dib7000p_write_word(state, 108, v); in dib7000p_set_agc1_min()
443 static void dib7000p_reset_pll(struct dib7000p_state *state) in dib7000p_reset_pll() argument
445 struct dibx000_bandwidth_config *bw = &state->cfg.bw[0]; in dib7000p_reset_pll()
448 if (state->version == SOC7090) { in dib7000p_reset_pll()
449 …dib7000p_write_word(state, 1856, (!bw->pll_reset << 13) | (bw->pll_range << 12) | (bw->pll_ratio <… in dib7000p_reset_pll()
451 while (((dib7000p_read_word(state, 1856) >> 15) & 0x1) != 1) in dib7000p_reset_pll()
454 dib7000p_write_word(state, 1857, dib7000p_read_word(state, 1857) | (!bw->pll_bypass << 15)); in dib7000p_reset_pll()
460 dib7000p_write_word(state, 900, clk_cfg0); in dib7000p_reset_pll()
463 …dib7000p_write_word(state, 903, (bw->pll_prediv << 5) | (((bw->pll_ratio >> 6) & 0x3) << 3) | (bw-… in dib7000p_reset_pll()
465 dib7000p_write_word(state, 900, clk_cfg0); in dib7000p_reset_pll()
468 dib7000p_write_word(state, 18, (u16) (((bw->internal * 1000) >> 16) & 0xffff)); in dib7000p_reset_pll()
469 dib7000p_write_word(state, 19, (u16) ((bw->internal * 1000) & 0xffff)); in dib7000p_reset_pll()
470 dib7000p_write_word(state, 21, (u16) ((bw->ifreq >> 16) & 0xffff)); in dib7000p_reset_pll()
471 dib7000p_write_word(state, 22, (u16) ((bw->ifreq) & 0xffff)); in dib7000p_reset_pll()
473 dib7000p_write_word(state, 72, bw->sad_cfg); in dib7000p_reset_pll()
476 static u32 dib7000p_get_internal_freq(struct dib7000p_state *state) in dib7000p_get_internal_freq() argument
478 u32 internal = (u32) dib7000p_read_word(state, 18) << 16; in dib7000p_get_internal_freq()
479 internal |= (u32) dib7000p_read_word(state, 19); in dib7000p_get_internal_freq()
487 struct dib7000p_state *state = fe->demodulator_priv; in dib7000p_update_pll() local
488 u16 reg_1857, reg_1856 = dib7000p_read_word(state, 1856); in dib7000p_update_pll()
499 reg_1857 = dib7000p_read_word(state, 1857); in dib7000p_update_pll()
500 dib7000p_write_word(state, 1857, reg_1857 & ~(1 << 15)); in dib7000p_update_pll()
502 …dib7000p_write_word(state, 1856, reg_1856 | ((bw->pll_ratio & 0x3f) << 6) | (bw->pll_prediv & 0x3f… in dib7000p_update_pll()
505 internal = dib7000p_get_internal_freq(state); in dib7000p_update_pll()
508 dib7000p_write_word(state, 18, (u16) ((internal >> 16) & 0xffff)); in dib7000p_update_pll()
509 dib7000p_write_word(state, 19, (u16) (internal & 0xffff)); in dib7000p_update_pll()
511 dib7000p_write_word(state, 1857, reg_1857 | (1 << 15)); in dib7000p_update_pll()
513 while (((dib7000p_read_word(state, 1856) >> 15) & 0x1) != 1) in dib7000p_update_pll()
554 struct dib7000p_state *state = demod->demodulator_priv; in dib7000p_set_gpio() local
555 return dib7000p_cfg_gpio(state, num, dir, val); in dib7000p_set_gpio()
643 static int dib7000p_demod_reset(struct dib7000p_state *state) in dib7000p_demod_reset() argument
645 dib7000p_set_power_mode(state, DIB7000P_POWER_ALL); in dib7000p_demod_reset()
647 if (state->version == SOC7090) in dib7000p_demod_reset()
648 dibx000_reset_i2c_master(&state->i2c_master); in dib7000p_demod_reset()
650 dib7000p_set_adc_state(state, DIBX000_VBG_ENABLE); in dib7000p_demod_reset()
653 dib7000p_write_word(state, 770, 0xffff); in dib7000p_demod_reset()
654 dib7000p_write_word(state, 771, 0xffff); in dib7000p_demod_reset()
655 dib7000p_write_word(state, 772, 0x001f); in dib7000p_demod_reset()
656 dib7000p_write_word(state, 1280, 0x001f - ((1 << 4) | (1 << 3))); in dib7000p_demod_reset()
658 dib7000p_write_word(state, 770, 0); in dib7000p_demod_reset()
659 dib7000p_write_word(state, 771, 0); in dib7000p_demod_reset()
660 dib7000p_write_word(state, 772, 0); in dib7000p_demod_reset()
661 dib7000p_write_word(state, 1280, 0); in dib7000p_demod_reset()
663 if (state->version != SOC7090) { in dib7000p_demod_reset()
664 dib7000p_write_word(state, 898, 0x0003); in dib7000p_demod_reset()
665 dib7000p_write_word(state, 898, 0); in dib7000p_demod_reset()
669 dib7000p_reset_pll(state); in dib7000p_demod_reset()
671 if (dib7000p_reset_gpio(state) != 0) in dib7000p_demod_reset()
674 if (state->version == SOC7090) { in dib7000p_demod_reset()
675 dib7000p_write_word(state, 899, 0); in dib7000p_demod_reset()
678 dib7000p_write_word(state, 42, (1<<5) | 3); /* P_iqc_thsat_ipc = 1 ; P_iqc_win2 = 3 */ in dib7000p_demod_reset()
679 dib7000p_write_word(state, 43, 0x2d4); /*-300 fag P_iqc_dect_min = -280 */ in dib7000p_demod_reset()
680 dib7000p_write_word(state, 44, 300); /* 300 fag P_iqc_dect_min = +280 */ in dib7000p_demod_reset()
681 dib7000p_write_word(state, 273, (0<<6) | 30); in dib7000p_demod_reset()
683 if (dib7000p_set_output_mode(state, OUTMODE_HIGH_Z) != 0) in dib7000p_demod_reset()
686 dib7000p_set_adc_state(state, DIBX000_SLOW_ADC_ON); in dib7000p_demod_reset()
687 dib7000p_sad_calib(state); in dib7000p_demod_reset()
688 dib7000p_set_adc_state(state, DIBX000_SLOW_ADC_OFF); in dib7000p_demod_reset()
691 dib7000p_write_word(state, 1285, dib7000p_read_word(state, 1285) & ~(1 << 1)); in dib7000p_demod_reset()
693 dib7000p_set_bandwidth(state, 8000); in dib7000p_demod_reset()
695 if (state->version == SOC7090) { in dib7000p_demod_reset()
696 …dib7000p_write_word(state, 36, 0x0755);/* P_iqc_impnc_on =1 & P_iqc_corr_inh = 1 for impulsive noi… in dib7000p_demod_reset()
698 if (state->cfg.tuner_is_baseband) in dib7000p_demod_reset()
699 dib7000p_write_word(state, 36, 0x0755); in dib7000p_demod_reset()
701 dib7000p_write_word(state, 36, 0x1f55); in dib7000p_demod_reset()
704 dib7000p_write_tab(state, dib7000p_defaults); in dib7000p_demod_reset()
705 if (state->version != SOC7090) { in dib7000p_demod_reset()
706 dib7000p_write_word(state, 901, 0x0006); in dib7000p_demod_reset()
707 dib7000p_write_word(state, 902, (3 << 10) | (1 << 6)); in dib7000p_demod_reset()
708 dib7000p_write_word(state, 905, 0x2c8e); in dib7000p_demod_reset()
711 dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY); in dib7000p_demod_reset()
716 static void dib7000p_pll_clk_cfg(struct dib7000p_state *state) in dib7000p_pll_clk_cfg() argument
719 tmp = dib7000p_read_word(state, 903); in dib7000p_pll_clk_cfg()
720 dib7000p_write_word(state, 903, (tmp | 0x1)); in dib7000p_pll_clk_cfg()
721 tmp = dib7000p_read_word(state, 900); in dib7000p_pll_clk_cfg()
722 dib7000p_write_word(state, 900, (tmp & 0x7fff) | (1 << 6)); in dib7000p_pll_clk_cfg()
725 static void dib7000p_restart_agc(struct dib7000p_state *state) in dib7000p_restart_agc() argument
728 dib7000p_write_word(state, 770, (1 << 11) | (1 << 9)); in dib7000p_restart_agc()
729 dib7000p_write_word(state, 770, 0x0000); in dib7000p_restart_agc()
732 static int dib7000p_update_lna(struct dib7000p_state *state) in dib7000p_update_lna() argument
736 if (state->cfg.update_lna) { in dib7000p_update_lna()
737 dyn_gain = dib7000p_read_word(state, 394); in dib7000p_update_lna()
738 if (state->cfg.update_lna(&state->demod, dyn_gain)) { in dib7000p_update_lna()
739 dib7000p_restart_agc(state); in dib7000p_update_lna()
747 static int dib7000p_set_agc_config(struct dib7000p_state *state, u8 band) in dib7000p_set_agc_config() argument
751 if (state->current_band == band && state->current_agc != NULL) in dib7000p_set_agc_config()
753 state->current_band = band; in dib7000p_set_agc_config()
755 for (i = 0; i < state->cfg.agc_config_count; i++) in dib7000p_set_agc_config()
756 if (state->cfg.agc[i].band_caps & band) { in dib7000p_set_agc_config()
757 agc = &state->cfg.agc[i]; in dib7000p_set_agc_config()
766 state->current_agc = agc; in dib7000p_set_agc_config()
769 dib7000p_write_word(state, 75, agc->setup); in dib7000p_set_agc_config()
770 dib7000p_write_word(state, 76, agc->inv_gain); in dib7000p_set_agc_config()
771 dib7000p_write_word(state, 77, agc->time_stabiliz); in dib7000p_set_agc_config()
772 dib7000p_write_word(state, 100, (agc->alpha_level << 12) | agc->thlock); in dib7000p_set_agc_config()
775 dib7000p_write_word(state, 101, (agc->alpha_mant << 5) | agc->alpha_exp); in dib7000p_set_agc_config()
776 dib7000p_write_word(state, 102, (agc->beta_mant << 6) | agc->beta_exp); in dib7000p_set_agc_config()
780 …state->wbd_ref != 0 ? state->wbd_ref : agc->wbd_ref, agc->wbd_sel, !agc->perform_agc_softsplit, ag… in dib7000p_set_agc_config()
782 if (state->wbd_ref != 0) in dib7000p_set_agc_config()
783 dib7000p_write_word(state, 105, (agc->wbd_inv << 12) | state->wbd_ref); in dib7000p_set_agc_config()
785 dib7000p_write_word(state, 105, (agc->wbd_inv << 12) | agc->wbd_ref); in dib7000p_set_agc_config()
787 …dib7000p_write_word(state, 106, (agc->wbd_sel << 13) | (agc->wbd_alpha << 9) | (agc->perform_agc_s… in dib7000p_set_agc_config()
789 dib7000p_write_word(state, 107, agc->agc1_max); in dib7000p_set_agc_config()
790 dib7000p_write_word(state, 108, agc->agc1_min); in dib7000p_set_agc_config()
791 dib7000p_write_word(state, 109, agc->agc2_max); in dib7000p_set_agc_config()
792 dib7000p_write_word(state, 110, agc->agc2_min); in dib7000p_set_agc_config()
793 dib7000p_write_word(state, 111, (agc->agc1_pt1 << 8) | agc->agc1_pt2); in dib7000p_set_agc_config()
794 dib7000p_write_word(state, 112, agc->agc1_pt3); in dib7000p_set_agc_config()
795 dib7000p_write_word(state, 113, (agc->agc1_slope1 << 8) | agc->agc1_slope2); in dib7000p_set_agc_config()
796 dib7000p_write_word(state, 114, (agc->agc2_pt1 << 8) | agc->agc2_pt2); in dib7000p_set_agc_config()
797 dib7000p_write_word(state, 115, (agc->agc2_slope1 << 8) | agc->agc2_slope2); in dib7000p_set_agc_config()
801 static void dib7000p_set_dds(struct dib7000p_state *state, s32 offset_khz) in dib7000p_set_dds() argument
803 u32 internal = dib7000p_get_internal_freq(state); in dib7000p_set_dds()
806 u32 dds = state->cfg.bw->ifreq & 0x1ffffff; in dib7000p_set_dds()
807 u8 invert = !!(state->cfg.bw->ifreq & (1 << 25)); in dib7000p_set_dds()
821 dib7000p_write_word(state, 21, (u16) (((dds >> 16) & 0x1ff) | (0 << 10) | (invert << 9))); in dib7000p_set_dds()
822 dib7000p_write_word(state, 22, (u16) (dds & 0xffff)); in dib7000p_set_dds()
829 struct dib7000p_state *state = demod->demodulator_priv; in dib7000p_agc_startup() local
831 u8 *agc_state = &state->agc_state; in dib7000p_agc_startup()
837 switch (state->agc_state) { in dib7000p_agc_startup()
839 dib7000p_set_power_mode(state, DIB7000P_POWER_ALL); in dib7000p_agc_startup()
840 if (state->version == SOC7090) { in dib7000p_agc_startup()
841 reg = dib7000p_read_word(state, 0x79b) & 0xff00; in dib7000p_agc_startup()
842 dib7000p_write_word(state, 0x79a, upd_demod_gain_period & 0xFFFF); /* lsb */ in dib7000p_agc_startup()
843 dib7000p_write_word(state, 0x79b, reg | (1 << 14) | ((upd_demod_gain_period >> 16) & 0xFF)); in dib7000p_agc_startup()
846 reg = dib7000p_read_word(state, 0x780); in dib7000p_agc_startup()
847 dib7000p_write_word(state, 0x780, (reg | (0x3)) & (~(1 << 7))); in dib7000p_agc_startup()
849 dib7000p_set_adc_state(state, DIBX000_ADC_ON); in dib7000p_agc_startup()
850 dib7000p_pll_clk_cfg(state); in dib7000p_agc_startup()
853 if (dib7000p_set_agc_config(state, BAND_OF_FREQUENCY(ch->frequency / 1000)) != 0) in dib7000p_agc_startup()
863 dib7000p_set_dds(state, frequency_offset); in dib7000p_agc_startup()
869 if (state->cfg.agc_control) in dib7000p_agc_startup()
870 state->cfg.agc_control(&state->demod, 1); in dib7000p_agc_startup()
872 dib7000p_write_word(state, 78, 32768); in dib7000p_agc_startup()
873 if (!state->current_agc->perform_agc_softsplit) { in dib7000p_agc_startup()
876 …dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (state->current_agc->wbd_alp… in dib7000p_agc_startup()
886 dib7000p_restart_agc(state); in dib7000p_agc_startup()
890 dib7000p_write_word(state, 75, state->current_agc->setup | (1 << 4)); /* freeze AGC loop */ in dib7000p_agc_startup()
891 …dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (2 << 9) | (0 << 8)); /* fas… in dib7000p_agc_startup()
897 agc_split = (u8) dib7000p_read_word(state, 396); /* store the split value for the next time */ in dib7000p_agc_startup()
898 dib7000p_write_word(state, 78, dib7000p_read_word(state, 394)); /* set AGC gain start value */ in dib7000p_agc_startup()
900 dib7000p_write_word(state, 75, state->current_agc->setup); /* std AGC loop */ in dib7000p_agc_startup()
901 …dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (state->current_agc->wbd_alp… in dib7000p_agc_startup()
903 dib7000p_restart_agc(state); in dib7000p_agc_startup()
914 if (dib7000p_update_lna(state)) in dib7000p_agc_startup()
921 if (state->cfg.agc_control) in dib7000p_agc_startup()
922 state->cfg.agc_control(&state->demod, 0); in dib7000p_agc_startup()
931 static void dib7000p_update_timf(struct dib7000p_state *state) in dib7000p_update_timf() argument
933 u32 timf = (dib7000p_read_word(state, 427) << 16) | dib7000p_read_word(state, 428); in dib7000p_update_timf()
934 state->timf = timf * 160 / (state->current_bandwidth / 50); in dib7000p_update_timf()
935 dib7000p_write_word(state, 23, (u16) (timf >> 16)); in dib7000p_update_timf()
936 dib7000p_write_word(state, 24, (u16) (timf & 0xffff)); in dib7000p_update_timf()
937 dprintk("updated timf_frequency: %d (default: %d)", state->timf, state->cfg.bw->timf); in dib7000p_update_timf()
943 struct dib7000p_state *state = fe->demodulator_priv; in dib7000p_ctrl_timf() local
946 state->timf = timf; in dib7000p_ctrl_timf()
949 dib7000p_update_timf(state); in dib7000p_ctrl_timf()
954 dib7000p_set_bandwidth(state, state->current_bandwidth); in dib7000p_ctrl_timf()
955 return state->timf; in dib7000p_ctrl_timf()
958 static void dib7000p_set_channel(struct dib7000p_state *state, in dib7000p_set_channel() argument
963 dib7000p_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->bandwidth_hz)); in dib7000p_set_channel()
1018 dib7000p_write_word(state, 0, value); in dib7000p_set_channel()
1019 dib7000p_write_word(state, 5, (seq << 4) | 1); /* do not force tps, search list 0 */ in dib7000p_set_channel()
1047 dib7000p_write_word(state, 208, value); in dib7000p_set_channel()
1050 dib7000p_write_word(state, 26, 0x6680); in dib7000p_set_channel()
1051 dib7000p_write_word(state, 32, 0x0003); in dib7000p_set_channel()
1052 dib7000p_write_word(state, 29, 0x1273); in dib7000p_set_channel()
1053 dib7000p_write_word(state, 33, 0x0005); in dib7000p_set_channel()
1083 if (state->cfg.diversity_delay == 0) in dib7000p_set_channel()
1084 state->div_sync_wait = (value * 3) / 2 + 48; in dib7000p_set_channel()
1086 state->div_sync_wait = (value * 3) / 2 + state->cfg.diversity_delay; in dib7000p_set_channel()
1089 state->div_force_off = !1 && ch->transmission_mode != TRANSMISSION_MODE_8K; in dib7000p_set_channel()
1090 dib7000p_set_diversity_in(&state->demod, state->div_state); in dib7000p_set_channel()
1114 dib7000p_write_word(state, 187 + value, est[value]); in dib7000p_set_channel()
1120 struct dib7000p_state *state = demod->demodulator_priv; in dib7000p_autosearch_start() local
1123 u32 internal = dib7000p_get_internal_freq(state); in dib7000p_autosearch_start()
1133 dib7000p_set_channel(state, &schan, 7); in dib7000p_autosearch_start()
1137 if (state->version == SOC7090) in dib7000p_autosearch_start()
1145 dib7000p_write_word(state, 6, (u16) ((value >> 16) & 0xffff)); in dib7000p_autosearch_start()
1146 dib7000p_write_word(state, 7, (u16) (value & 0xffff)); in dib7000p_autosearch_start()
1148 dib7000p_write_word(state, 8, (u16) ((value >> 16) & 0xffff)); in dib7000p_autosearch_start()
1149 dib7000p_write_word(state, 9, (u16) (value & 0xffff)); in dib7000p_autosearch_start()
1151 dib7000p_write_word(state, 10, (u16) ((value >> 16) & 0xffff)); in dib7000p_autosearch_start()
1152 dib7000p_write_word(state, 11, (u16) (value & 0xffff)); in dib7000p_autosearch_start()
1154 value = dib7000p_read_word(state, 0); in dib7000p_autosearch_start()
1155 dib7000p_write_word(state, 0, (u16) ((1 << 9) | value)); in dib7000p_autosearch_start()
1156 dib7000p_read_word(state, 1284); in dib7000p_autosearch_start()
1157 dib7000p_write_word(state, 0, (u16) value); in dib7000p_autosearch_start()
1164 struct dib7000p_state *state = demod->demodulator_priv; in dib7000p_autosearch_is_irq() local
1165 u16 irq_pending = dib7000p_read_word(state, 1284); in dib7000p_autosearch_is_irq()
1176 static void dib7000p_spur_protect(struct dib7000p_state *state, u32 rf_khz, u32 bw) in dib7000p_spur_protect() argument
1198 u32 xtal = state->cfg.bw->xtal_hz / 1000; in dib7000p_spur_protect()
1212 dib7000p_write_word(state, 142, 0x0610); in dib7000p_spur_protect()
1257 dib7000p_write_word(state, 143, (0 << 14) | (k << 10) | (coef_re[k] & 0x3ff)); in dib7000p_spur_protect()
1258 dib7000p_write_word(state, 144, coef_im[k] & 0x3ff); in dib7000p_spur_protect()
1259 dib7000p_write_word(state, 143, (1 << 14) | (k << 10) | (coef_re[k] & 0x3ff)); in dib7000p_spur_protect()
1261 dib7000p_write_word(state, 143, 0); in dib7000p_spur_protect()
1267 struct dib7000p_state *state = demod->demodulator_priv; in dib7000p_tune() local
1271 dib7000p_set_channel(state, ch, 0); in dib7000p_tune()
1276 dib7000p_write_word(state, 770, 0x4000); in dib7000p_tune()
1277 dib7000p_write_word(state, 770, 0x0000); in dib7000p_tune()
1282 if (state->sfn_workaround_active) { in dib7000p_tune()
1285 dib7000p_write_word(state, 166, 0x4000); in dib7000p_tune()
1287 dib7000p_write_word(state, 166, 0x0000); in dib7000p_tune()
1289 dib7000p_write_word(state, 29, tmp); in dib7000p_tune()
1292 if (state->timf == 0) in dib7000p_tune()
1311 dib7000p_write_word(state, 26, tmp); /* timf_a(6xxx) */ in dib7000p_tune()
1327 dib7000p_write_word(state, 32, tmp); in dib7000p_tune()
1343 dib7000p_write_word(state, 33, tmp); in dib7000p_tune()
1345 tmp = dib7000p_read_word(state, 509); in dib7000p_tune()
1348 tmp = dib7000p_read_word(state, 771); in dib7000p_tune()
1349 dib7000p_write_word(state, 771, tmp | (1 << 1)); in dib7000p_tune()
1350 dib7000p_write_word(state, 771, tmp); in dib7000p_tune()
1352 tmp = dib7000p_read_word(state, 509); in dib7000p_tune()
1356 dib7000p_update_timf(state); in dib7000p_tune()
1358 tmp = dib7000p_read_word(state, 26); in dib7000p_tune()
1359 dib7000p_write_word(state, 26, (tmp & ~(0xf << 12)) | ((((tmp >> 12) & 0xf) + 5) << 12)); in dib7000p_tune()
1362 if (state->cfg.spur_protect) in dib7000p_tune()
1363 dib7000p_spur_protect(state, ch->frequency / 1000, BANDWIDTH_TO_KHZ(ch->bandwidth_hz)); in dib7000p_tune()
1365 dib7000p_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->bandwidth_hz)); in dib7000p_tune()
1374 struct dib7000p_state *state = demod->demodulator_priv; in dib7000p_wakeup() local
1375 dib7000p_set_power_mode(state, DIB7000P_POWER_ALL); in dib7000p_wakeup()
1376 dib7000p_set_adc_state(state, DIBX000_SLOW_ADC_ON); in dib7000p_wakeup()
1377 if (state->version == SOC7090) in dib7000p_wakeup()
1378 dib7000p_sad_calib(state); in dib7000p_wakeup()
1384 struct dib7000p_state *state = demod->demodulator_priv; in dib7000p_sleep() local
1385 if (state->version == SOC7090) in dib7000p_sleep()
1386 return dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY); in dib7000p_sleep()
1387 …return dib7000p_set_output_mode(state, OUTMODE_HIGH_Z) | dib7000p_set_power_mode(state, DIB7000P_P… in dib7000p_sleep()
1411 struct dib7000p_state *state = fe->demodulator_priv; in dib7000p_get_frontend() local
1412 u16 tps = dib7000p_read_word(state, 463); in dib7000p_get_frontend()
1416 fep->bandwidth_hz = BANDWIDTH_TO_HZ(state->current_bandwidth); in dib7000p_get_frontend()
1507 struct dib7000p_state *state = fe->demodulator_priv; in dib7000p_set_frontend() local
1510 if (state->version == SOC7090) in dib7000p_set_frontend()
1513 dib7000p_set_output_mode(state, OUTMODE_HIGH_Z); in dib7000p_set_frontend()
1516 state->sfn_workaround_active = buggy_sfn_workaround; in dib7000p_set_frontend()
1522 state->agc_state = 0; in dib7000p_set_frontend()
1549 if (state->version == SOC7090) { in dib7000p_set_frontend()
1550 dib7090_set_output_mode(fe, state->cfg.output_mode); in dib7000p_set_frontend()
1551 if (state->cfg.enMpegOutput == 0) { in dib7000p_set_frontend()
1552 dib7090_setDibTxMux(state, MPEG_ON_DIBTX); in dib7000p_set_frontend()
1553 dib7090_setHostBusMux(state, DIBTX_ON_HOSTBUS); in dib7000p_set_frontend()
1556 dib7000p_set_output_mode(state, state->cfg.output_mode); in dib7000p_set_frontend()
1565 struct dib7000p_state *state = fe->demodulator_priv; in dib7000p_read_status() local
1566 u16 lock = dib7000p_read_word(state, 509); in dib7000p_read_status()
1588 struct dib7000p_state *state = fe->demodulator_priv; in dib7000p_read_ber() local
1589 *ber = (dib7000p_read_word(state, 500) << 16) | dib7000p_read_word(state, 501); in dib7000p_read_ber()
1595 struct dib7000p_state *state = fe->demodulator_priv; in dib7000p_read_unc_blocks() local
1596 *unc = dib7000p_read_word(state, 506); in dib7000p_read_unc_blocks()
1602 struct dib7000p_state *state = fe->demodulator_priv; in dib7000p_read_signal_strength() local
1603 u16 val = dib7000p_read_word(state, 394); in dib7000p_read_signal_strength()
1610 struct dib7000p_state *state = fe->demodulator_priv; in dib7000p_get_snr() local
1615 val = dib7000p_read_word(state, 479); in dib7000p_get_snr()
1618 val = dib7000p_read_word(state, 480); in dib7000p_get_snr()
1653 struct dib7000p_state *state = demod->demodulator_priv; in dib7000p_reset_stats() local
1681 state->old_ucb = ucb; in dib7000p_reset_stats()
1682 state->ber_jiffies_stats = 0; in dib7000p_reset_stats()
1683 state->per_jiffies_stats = 0; in dib7000p_reset_stats()
1882 struct dib7000p_state *state = demod->demodulator_priv; in dib7000p_get_stats() local
1914 if (time_after(jiffies, state->per_jiffies_stats)) { in dib7000p_get_stats()
1915 state->per_jiffies_stats = jiffies + msecs_to_jiffies(1000); in dib7000p_get_stats()
1928 ucb = val - state->old_ucb; in dib7000p_get_stats()
1929 if (val < state->old_ucb) in dib7000p_get_stats()
1950 if (time_after(jiffies, state->ber_jiffies_stats)) { in dib7000p_get_stats()
1952 state->ber_jiffies_stats = jiffies + msecs_to_jiffies((time_us + 500) / 1000); in dib7000p_get_stats()
2050 struct dib7000p_state *state = fe->demodulator_priv; in dib7000p_pid_filter_ctrl() local
2051 u16 val = dib7000p_read_word(state, 235) & 0xffef; in dib7000p_pid_filter_ctrl()
2054 return dib7000p_write_word(state, 235, val); in dib7000p_pid_filter_ctrl()
2059 struct dib7000p_state *state = fe->demodulator_priv; in dib7000p_pid_filter() local
2061 return dib7000p_write_word(state, 241 + id, onoff ? (1 << 13) | pid : 0); in dib7000p_pid_filter()
2130 struct dib7000p_state *state = fe->demodulator_priv; in dib7000p_get_adc_power() local
2136 buf[0] = dib7000p_read_word(state, 0x184); in dib7000p_get_adc_power()
2137 buf[1] = dib7000p_read_word(state, 0x185); in dib7000p_get_adc_power()
2179 struct dib7000p_state *state = i2c_get_adapdata(i2c_adap); in w7090p_tuner_write_serpar() local
2185 n_overflow = (dib7000p_read_word(state, 1984) >> 1) & 0x1; in w7090p_tuner_write_serpar()
2190 dib7000p_write_word(state, 1985, (1 << 6) | (serpar_num & 0x3f)); in w7090p_tuner_write_serpar()
2191 dib7000p_write_word(state, 1986, (msg[0].buf[1] << 8) | msg[0].buf[2]); in w7090p_tuner_write_serpar()
2198 struct dib7000p_state *state = i2c_get_adapdata(i2c_adap); in w7090p_tuner_read_serpar() local
2205 n_overflow = (dib7000p_read_word(state, 1984) >> 1) & 0x1; in w7090p_tuner_read_serpar()
2210 dib7000p_write_word(state, 1985, (0 << 6) | (serpar_num & 0x3f)); in w7090p_tuner_read_serpar()
2214 n_empty = dib7000p_read_word(state, 1984) & 0x1; in w7090p_tuner_read_serpar()
2219 read_word = dib7000p_read_word(state, 1987); in w7090p_tuner_read_serpar()
2241 struct dib7000p_state *state = i2c_get_adapdata(i2c_adap); in dib7090p_rw_on_apb() local
2245 dib7000p_write_word(state, apb_address, ((msg[0].buf[1] << 8) | (msg[0].buf[2]))); in dib7090p_rw_on_apb()
2247 word = dib7000p_read_word(state, apb_address); in dib7090p_rw_on_apb()
2257 struct dib7000p_state *state = i2c_get_adapdata(i2c_adap); in dib7090_tuner_xfer() local
2347 i = ((dib7000p_read_word(state, 72) >> 12) & 0x3); in dib7090_tuner_xfer()
2348 word = dib7000p_read_word(state, 384 + i); in dib7090_tuner_xfer()
2356 word = (dib7000p_read_word(state, 72) & ~(3 << 12)) | (word << 12); in dib7090_tuner_xfer()
2357 dib7000p_write_word(state, 72, word); /* Set the proper input */ in dib7090_tuner_xfer()
2386 static int dib7090_host_bus_drive(struct dib7000p_state *state, u8 drive) in dib7090_host_bus_drive() argument
2391 reg = dib7000p_read_word(state, 1798) & ~((0x7) | (0x7 << 6) | (0x7 << 12)); in dib7090_host_bus_drive()
2393 dib7000p_write_word(state, 1798, reg); in dib7090_host_bus_drive()
2396 reg = dib7000p_read_word(state, 1799) & ~((0x7 << 2) | (0x7 << 8)); in dib7090_host_bus_drive()
2398 dib7000p_write_word(state, 1799, reg); in dib7090_host_bus_drive()
2401 reg = dib7000p_read_word(state, 1800) & ~((0x7) | (0x7 << 6) | (0x7 << 12)); in dib7090_host_bus_drive()
2403 dib7000p_write_word(state, 1800, reg); in dib7090_host_bus_drive()
2406 reg = dib7000p_read_word(state, 1801) & ~((0x7 << 2) | (0x7 << 8)); in dib7090_host_bus_drive()
2408 dib7000p_write_word(state, 1801, reg); in dib7090_host_bus_drive()
2411 reg = dib7000p_read_word(state, 1802) & ~((0x7) | (0x7 << 6) | (0x7 << 12)); in dib7090_host_bus_drive()
2413 dib7000p_write_word(state, 1802, reg); in dib7090_host_bus_drive()
2436 static int dib7090_cfg_DibTx(struct dib7000p_state *state, u32 P_Kin, u32 P_Kout, u32 insertExtSync… in dib7090_cfg_DibTx() argument
2440 dib7000p_write_word(state, 1615, 1); in dib7090_cfg_DibTx()
2441 dib7000p_write_word(state, 1603, P_Kin); in dib7090_cfg_DibTx()
2442 dib7000p_write_word(state, 1605, P_Kout); in dib7090_cfg_DibTx()
2443 dib7000p_write_word(state, 1606, insertExtSynchro); in dib7090_cfg_DibTx()
2444 dib7000p_write_word(state, 1608, synchroMode); in dib7090_cfg_DibTx()
2445 dib7000p_write_word(state, 1609, (syncWord >> 16) & 0xffff); in dib7090_cfg_DibTx()
2446 dib7000p_write_word(state, 1610, syncWord & 0xffff); in dib7090_cfg_DibTx()
2447 dib7000p_write_word(state, 1612, syncSize); in dib7090_cfg_DibTx()
2448 dib7000p_write_word(state, 1615, 0); in dib7090_cfg_DibTx()
2453 static int dib7090_cfg_DibRx(struct dib7000p_state *state, u32 P_Kin, u32 P_Kout, u32 synchroMode, … in dib7090_cfg_DibRx() argument
2461 dib7000p_write_word(state, 1542, syncFreq); in dib7090_cfg_DibRx()
2463 dib7000p_write_word(state, 1554, 1); in dib7090_cfg_DibRx()
2464 dib7000p_write_word(state, 1536, P_Kin); in dib7090_cfg_DibRx()
2465 dib7000p_write_word(state, 1537, P_Kout); in dib7090_cfg_DibRx()
2466 dib7000p_write_word(state, 1539, synchroMode); in dib7090_cfg_DibRx()
2467 dib7000p_write_word(state, 1540, (syncWord >> 16) & 0xffff); in dib7090_cfg_DibRx()
2468 dib7000p_write_word(state, 1541, syncWord & 0xffff); in dib7090_cfg_DibRx()
2469 dib7000p_write_word(state, 1543, syncSize); in dib7090_cfg_DibRx()
2470 dib7000p_write_word(state, 1544, dataOutRate); in dib7090_cfg_DibRx()
2471 dib7000p_write_word(state, 1554, 0); in dib7090_cfg_DibRx()
2476 static void dib7090_enMpegMux(struct dib7000p_state *state, int onoff) in dib7090_enMpegMux() argument
2478 u16 reg_1287 = dib7000p_read_word(state, 1287); in dib7090_enMpegMux()
2489 dib7000p_write_word(state, 1287, reg_1287); in dib7090_enMpegMux()
2492 static void dib7090_configMpegMux(struct dib7000p_state *state, in dib7090_configMpegMux() argument
2497 dib7090_enMpegMux(state, 0); in dib7090_configMpegMux()
2500 if ((enSerialMode == 1) && (state->input_mode_mpeg == 1)) in dib7090_configMpegMux()
2503 dib7000p_write_word(state, 1287, ((pulseWidth & 0x1f) << 2) in dib7090_configMpegMux()
2507 dib7090_enMpegMux(state, 1); in dib7090_configMpegMux()
2510 static void dib7090_setDibTxMux(struct dib7000p_state *state, int mode) in dib7090_setDibTxMux() argument
2512 u16 reg_1288 = dib7000p_read_word(state, 1288) & ~(0x7 << 7); in dib7090_setDibTxMux()
2517 dib7090_cfg_DibTx(state, 8, 5, 0, 0, 0, 0); in dib7090_setDibTxMux()
2522 dib7090_cfg_DibTx(state, 5, 5, 0, 0, 0, 0); in dib7090_setDibTxMux()
2527 dib7090_cfg_DibTx(state, 20, 5, 10, 0, 0, 0); in dib7090_setDibTxMux()
2533 dib7000p_write_word(state, 1288, reg_1288); in dib7090_setDibTxMux()
2536 static void dib7090_setHostBusMux(struct dib7000p_state *state, int mode) in dib7090_setHostBusMux() argument
2538 u16 reg_1288 = dib7000p_read_word(state, 1288) & ~(0x7 << 4); in dib7090_setHostBusMux()
2543 dib7090_enMpegMux(state, 0); in dib7090_setHostBusMux()
2548 dib7090_enMpegMux(state, 0); in dib7090_setHostBusMux()
2558 dib7000p_write_word(state, 1288, reg_1288); in dib7090_setHostBusMux()
2563 struct dib7000p_state *state = fe->demodulator_priv; in dib7090_set_diversity_in() local
2569 dib7090_cfg_DibRx(state, 8, 5, 0, 0, 0, 8, 0); in dib7090_set_diversity_in()
2573 reg_1287 = dib7000p_read_word(state, 1287); in dib7090_set_diversity_in()
2578 dib7000p_write_word(state, 1287, reg_1287); in dib7090_set_diversity_in()
2580 state->input_mode_mpeg = 1; in dib7090_set_diversity_in()
2585 dib7090_cfg_DibRx(state, 5, 5, 0, 0, 0, 0, 0); in dib7090_set_diversity_in()
2586 state->input_mode_mpeg = 0; in dib7090_set_diversity_in()
2590 dib7000p_set_diversity_in(&state->demod, onoff); in dib7090_set_diversity_in()
2596 struct dib7000p_state *state = fe->demodulator_priv; in dib7090_set_output_mode() local
2602 dib7090_host_bus_drive(state, 1); in dib7090_set_output_mode()
2605 smo_mode = (dib7000p_read_word(state, 235) & 0x0050) | (1 << 1); in dib7090_set_output_mode()
2606 outreg = dib7000p_read_word(state, 1286) & ~((1 << 10) | (0x7 << 6) | (1 << 1)); in dib7090_set_output_mode()
2616 dib7090_configMpegMux(state, 3, 1, 1); in dib7090_set_output_mode()
2617 dib7090_setHostBusMux(state, MPEG_ON_HOSTBUS); in dib7090_set_output_mode()
2620 dib7090_setHostBusMux(state, DEMOUT_ON_HOSTBUS); in dib7090_set_output_mode()
2628 dib7090_configMpegMux(state, 2, 0, 0); in dib7090_set_output_mode()
2629 dib7090_setHostBusMux(state, MPEG_ON_HOSTBUS); in dib7090_set_output_mode()
2632 dib7090_setHostBusMux(state, DEMOUT_ON_HOSTBUS); in dib7090_set_output_mode()
2639 dib7090_setHostBusMux(state, DEMOUT_ON_HOSTBUS); in dib7090_set_output_mode()
2645 dib7090_setHostBusMux(state, DEMOUT_ON_HOSTBUS); in dib7090_set_output_mode()
2653 dib7090_setDibTxMux(state, DIV_ON_DIBTX); in dib7090_set_output_mode()
2654 dib7090_setHostBusMux(state, DIBTX_ON_HOSTBUS); in dib7090_set_output_mode()
2659 dib7090_setDibTxMux(state, ADC_ON_DIBTX); in dib7090_set_output_mode()
2660 dib7090_setHostBusMux(state, DIBTX_ON_HOSTBUS); in dib7090_set_output_mode()
2666 if (state->cfg.output_mpeg2_in_188_bytes) in dib7090_set_output_mode()
2669 ret |= dib7000p_write_word(state, 235, smo_mode); in dib7090_set_output_mode()
2670 ret |= dib7000p_write_word(state, 236, fifo_threshold); /* synchronous fread */ in dib7090_set_output_mode()
2671 ret |= dib7000p_write_word(state, 1286, outreg); in dib7090_set_output_mode()
2678 struct dib7000p_state *state = fe->demodulator_priv; in dib7090_tuner_sleep() local
2683 en_cur_state = dib7000p_read_word(state, 1922); in dib7090_tuner_sleep()
2686 state->tuner_enable = en_cur_state; in dib7090_tuner_sleep()
2691 if (state->tuner_enable != 0) in dib7090_tuner_sleep()
2692 en_cur_state = state->tuner_enable; in dib7090_tuner_sleep()
2695 dib7000p_write_word(state, 1922, en_cur_state); in dib7090_tuner_sleep()
2707 struct dib7000p_state *state = fe->demodulator_priv; in dib7090_slave_reset() local
2710 reg = dib7000p_read_word(state, 1794); in dib7090_slave_reset()
2711 dib7000p_write_word(state, 1794, reg | (4 << 12)); in dib7090_slave_reset()
2713 dib7000p_write_word(state, 1032, 0xffff); in dib7090_slave_reset()