Lines Matching refs:dib7000p_write_word
126 static int dib7000p_write_word(struct dib7000p_state *state, u16 reg, u16 val) in dib7000p_write_word() function
161 dib7000p_write_word(state, r, *n++); in dib7000p_write_tab()
214 ret |= dib7000p_write_word(state, 235, smo_mode); in dib7000p_set_output_mode()
215 ret |= dib7000p_write_word(state, 236, fifo_threshold); /* synchronous fread */ in dib7000p_set_output_mode()
217 ret |= dib7000p_write_word(state, 1286, outreg); /* P_Div_active */ in dib7000p_set_output_mode()
229 dib7000p_write_word(state, 207, 0); in dib7000p_set_diversity_in()
231 dib7000p_write_word(state, 207, (state->div_sync_wait << 4) | (1 << 2) | (2 << 0)); in dib7000p_set_diversity_in()
236 dib7000p_write_word(state, 204, 6); in dib7000p_set_diversity_in()
237 dib7000p_write_word(state, 205, 16); in dib7000p_set_diversity_in()
240 dib7000p_write_word(state, 204, 1); in dib7000p_set_diversity_in()
241 dib7000p_write_word(state, 205, 0); in dib7000p_set_diversity_in()
288 dib7000p_write_word(state, 774, reg_774); in dib7000p_set_power_mode()
289 dib7000p_write_word(state, 775, reg_775); in dib7000p_set_power_mode()
290 dib7000p_write_word(state, 776, reg_776); in dib7000p_set_power_mode()
291 dib7000p_write_word(state, 1280, reg_1280); in dib7000p_set_power_mode()
293 dib7000p_write_word(state, 899, reg_899); in dib7000p_set_power_mode()
313 …dib7000p_write_word(state, 1925, reg | (1 << 4) | (1 << 2)); /* en_slowAdc = 1 & reset_sladc = 1 */ in dib7000p_set_adc_state()
317 dib7000p_write_word(state, 1925, reg & ~(1 << 4)); /* en_slowAdc = 1 & reset_sladc = 0 */ in dib7000p_set_adc_state()
320 …dib7000p_write_word(state, 72, reg | (1 << 14) | (3 << 12) | 524); /* ref = Vin1 => Vbg ; sel = Vi… in dib7000p_set_adc_state()
323 dib7000p_write_word(state, 909, reg_909); in dib7000p_set_adc_state()
331 …dib7000p_write_word(state, 1925, (reg & ~(1 << 2)) | (1 << 4)); /* reset_sladc = 1 en_slowAdc = 0 … in dib7000p_set_adc_state()
364 dib7000p_write_word(state, 908, reg_908); in dib7000p_set_adc_state()
365 dib7000p_write_word(state, 909, reg_909); in dib7000p_set_adc_state()
386 dib7000p_write_word(state, 23, (u16) ((timf >> 16) & 0xffff)); in dib7000p_set_bandwidth()
387 dib7000p_write_word(state, 24, (u16) ((timf) & 0xffff)); in dib7000p_set_bandwidth()
395 dib7000p_write_word(state, 73, (0 << 1) | (0 << 0)); in dib7000p_sad_calib()
398 dib7000p_write_word(state, 74, 2048); in dib7000p_sad_calib()
400 dib7000p_write_word(state, 74, 776); in dib7000p_sad_calib()
403 dib7000p_write_word(state, 73, (1 << 0)); in dib7000p_sad_calib()
404 dib7000p_write_word(state, 73, (0 << 0)); in dib7000p_sad_calib()
417 return dib7000p_write_word(state, 105, (dib7000p_read_word(state, 105) & 0xf000) | value); in dib7000p_set_wbd_ref()
440 return dib7000p_write_word(state, 108, v); in dib7000p_set_agc1_min()
449 …dib7000p_write_word(state, 1856, (!bw->pll_reset << 13) | (bw->pll_range << 12) | (bw->pll_ratio <… in dib7000p_reset_pll()
454 dib7000p_write_word(state, 1857, dib7000p_read_word(state, 1857) | (!bw->pll_bypass << 15)); in dib7000p_reset_pll()
460 dib7000p_write_word(state, 900, clk_cfg0); in dib7000p_reset_pll()
463 …dib7000p_write_word(state, 903, (bw->pll_prediv << 5) | (((bw->pll_ratio >> 6) & 0x3) << 3) | (bw-… in dib7000p_reset_pll()
465 dib7000p_write_word(state, 900, clk_cfg0); in dib7000p_reset_pll()
468 dib7000p_write_word(state, 18, (u16) (((bw->internal * 1000) >> 16) & 0xffff)); in dib7000p_reset_pll()
469 dib7000p_write_word(state, 19, (u16) ((bw->internal * 1000) & 0xffff)); in dib7000p_reset_pll()
470 dib7000p_write_word(state, 21, (u16) ((bw->ifreq >> 16) & 0xffff)); in dib7000p_reset_pll()
471 dib7000p_write_word(state, 22, (u16) ((bw->ifreq) & 0xffff)); in dib7000p_reset_pll()
473 dib7000p_write_word(state, 72, bw->sad_cfg); in dib7000p_reset_pll()
500 dib7000p_write_word(state, 1857, reg_1857 & ~(1 << 15)); in dib7000p_update_pll()
502 …dib7000p_write_word(state, 1856, reg_1856 | ((bw->pll_ratio & 0x3f) << 6) | (bw->pll_prediv & 0x3f… in dib7000p_update_pll()
508 dib7000p_write_word(state, 18, (u16) ((internal >> 16) & 0xffff)); in dib7000p_update_pll()
509 dib7000p_write_word(state, 19, (u16) (internal & 0xffff)); in dib7000p_update_pll()
511 dib7000p_write_word(state, 1857, reg_1857 | (1 << 15)); in dib7000p_update_pll()
526 dib7000p_write_word(st, 1029, st->gpio_dir); in dib7000p_reset_gpio()
527 dib7000p_write_word(st, 1030, st->gpio_val); in dib7000p_reset_gpio()
531 dib7000p_write_word(st, 1032, st->cfg.gpio_pwm_pos); in dib7000p_reset_gpio()
533 dib7000p_write_word(st, 1037, st->cfg.pwm_freq_div); in dib7000p_reset_gpio()
542 dib7000p_write_word(st, 1029, st->gpio_dir); in dib7000p_cfg_gpio()
547 dib7000p_write_word(st, 1030, st->gpio_val); in dib7000p_cfg_gpio()
653 dib7000p_write_word(state, 770, 0xffff); in dib7000p_demod_reset()
654 dib7000p_write_word(state, 771, 0xffff); in dib7000p_demod_reset()
655 dib7000p_write_word(state, 772, 0x001f); in dib7000p_demod_reset()
656 dib7000p_write_word(state, 1280, 0x001f - ((1 << 4) | (1 << 3))); in dib7000p_demod_reset()
658 dib7000p_write_word(state, 770, 0); in dib7000p_demod_reset()
659 dib7000p_write_word(state, 771, 0); in dib7000p_demod_reset()
660 dib7000p_write_word(state, 772, 0); in dib7000p_demod_reset()
661 dib7000p_write_word(state, 1280, 0); in dib7000p_demod_reset()
664 dib7000p_write_word(state, 898, 0x0003); in dib7000p_demod_reset()
665 dib7000p_write_word(state, 898, 0); in dib7000p_demod_reset()
675 dib7000p_write_word(state, 899, 0); in dib7000p_demod_reset()
678 dib7000p_write_word(state, 42, (1<<5) | 3); /* P_iqc_thsat_ipc = 1 ; P_iqc_win2 = 3 */ in dib7000p_demod_reset()
679 dib7000p_write_word(state, 43, 0x2d4); /*-300 fag P_iqc_dect_min = -280 */ in dib7000p_demod_reset()
680 dib7000p_write_word(state, 44, 300); /* 300 fag P_iqc_dect_min = +280 */ in dib7000p_demod_reset()
681 dib7000p_write_word(state, 273, (0<<6) | 30); in dib7000p_demod_reset()
691 dib7000p_write_word(state, 1285, dib7000p_read_word(state, 1285) & ~(1 << 1)); in dib7000p_demod_reset()
696 …dib7000p_write_word(state, 36, 0x0755);/* P_iqc_impnc_on =1 & P_iqc_corr_inh = 1 for impulsive noi… in dib7000p_demod_reset()
699 dib7000p_write_word(state, 36, 0x0755); in dib7000p_demod_reset()
701 dib7000p_write_word(state, 36, 0x1f55); in dib7000p_demod_reset()
706 dib7000p_write_word(state, 901, 0x0006); in dib7000p_demod_reset()
707 dib7000p_write_word(state, 902, (3 << 10) | (1 << 6)); in dib7000p_demod_reset()
708 dib7000p_write_word(state, 905, 0x2c8e); in dib7000p_demod_reset()
720 dib7000p_write_word(state, 903, (tmp | 0x1)); in dib7000p_pll_clk_cfg()
722 dib7000p_write_word(state, 900, (tmp & 0x7fff) | (1 << 6)); in dib7000p_pll_clk_cfg()
728 dib7000p_write_word(state, 770, (1 << 11) | (1 << 9)); in dib7000p_restart_agc()
729 dib7000p_write_word(state, 770, 0x0000); in dib7000p_restart_agc()
769 dib7000p_write_word(state, 75, agc->setup); in dib7000p_set_agc_config()
770 dib7000p_write_word(state, 76, agc->inv_gain); in dib7000p_set_agc_config()
771 dib7000p_write_word(state, 77, agc->time_stabiliz); in dib7000p_set_agc_config()
772 dib7000p_write_word(state, 100, (agc->alpha_level << 12) | agc->thlock); in dib7000p_set_agc_config()
775 dib7000p_write_word(state, 101, (agc->alpha_mant << 5) | agc->alpha_exp); in dib7000p_set_agc_config()
776 dib7000p_write_word(state, 102, (agc->beta_mant << 6) | agc->beta_exp); in dib7000p_set_agc_config()
783 dib7000p_write_word(state, 105, (agc->wbd_inv << 12) | state->wbd_ref); in dib7000p_set_agc_config()
785 dib7000p_write_word(state, 105, (agc->wbd_inv << 12) | agc->wbd_ref); in dib7000p_set_agc_config()
787 …dib7000p_write_word(state, 106, (agc->wbd_sel << 13) | (agc->wbd_alpha << 9) | (agc->perform_agc_s… in dib7000p_set_agc_config()
789 dib7000p_write_word(state, 107, agc->agc1_max); in dib7000p_set_agc_config()
790 dib7000p_write_word(state, 108, agc->agc1_min); in dib7000p_set_agc_config()
791 dib7000p_write_word(state, 109, agc->agc2_max); in dib7000p_set_agc_config()
792 dib7000p_write_word(state, 110, agc->agc2_min); in dib7000p_set_agc_config()
793 dib7000p_write_word(state, 111, (agc->agc1_pt1 << 8) | agc->agc1_pt2); in dib7000p_set_agc_config()
794 dib7000p_write_word(state, 112, agc->agc1_pt3); in dib7000p_set_agc_config()
795 dib7000p_write_word(state, 113, (agc->agc1_slope1 << 8) | agc->agc1_slope2); in dib7000p_set_agc_config()
796 dib7000p_write_word(state, 114, (agc->agc2_pt1 << 8) | agc->agc2_pt2); in dib7000p_set_agc_config()
797 dib7000p_write_word(state, 115, (agc->agc2_slope1 << 8) | agc->agc2_slope2); in dib7000p_set_agc_config()
821 dib7000p_write_word(state, 21, (u16) (((dds >> 16) & 0x1ff) | (0 << 10) | (invert << 9))); in dib7000p_set_dds()
822 dib7000p_write_word(state, 22, (u16) (dds & 0xffff)); in dib7000p_set_dds()
842 dib7000p_write_word(state, 0x79a, upd_demod_gain_period & 0xFFFF); /* lsb */ in dib7000p_agc_startup()
843 dib7000p_write_word(state, 0x79b, reg | (1 << 14) | ((upd_demod_gain_period >> 16) & 0xFF)); in dib7000p_agc_startup()
847 dib7000p_write_word(state, 0x780, (reg | (0x3)) & (~(1 << 7))); in dib7000p_agc_startup()
872 dib7000p_write_word(state, 78, 32768); in dib7000p_agc_startup()
876 …dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (state->current_agc->wbd_alp… in dib7000p_agc_startup()
890 dib7000p_write_word(state, 75, state->current_agc->setup | (1 << 4)); /* freeze AGC loop */ in dib7000p_agc_startup()
891 …dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (2 << 9) | (0 << 8)); /* fas… in dib7000p_agc_startup()
898 dib7000p_write_word(state, 78, dib7000p_read_word(state, 394)); /* set AGC gain start value */ in dib7000p_agc_startup()
900 dib7000p_write_word(state, 75, state->current_agc->setup); /* std AGC loop */ in dib7000p_agc_startup()
901 …dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (state->current_agc->wbd_alp… in dib7000p_agc_startup()
935 dib7000p_write_word(state, 23, (u16) (timf >> 16)); in dib7000p_update_timf()
936 dib7000p_write_word(state, 24, (u16) (timf & 0xffff)); in dib7000p_update_timf()
1018 dib7000p_write_word(state, 0, value); in dib7000p_set_channel()
1019 dib7000p_write_word(state, 5, (seq << 4) | 1); /* do not force tps, search list 0 */ in dib7000p_set_channel()
1047 dib7000p_write_word(state, 208, value); in dib7000p_set_channel()
1050 dib7000p_write_word(state, 26, 0x6680); in dib7000p_set_channel()
1051 dib7000p_write_word(state, 32, 0x0003); in dib7000p_set_channel()
1052 dib7000p_write_word(state, 29, 0x1273); in dib7000p_set_channel()
1053 dib7000p_write_word(state, 33, 0x0005); in dib7000p_set_channel()
1114 dib7000p_write_word(state, 187 + value, est[value]); in dib7000p_set_channel()
1145 dib7000p_write_word(state, 6, (u16) ((value >> 16) & 0xffff)); in dib7000p_autosearch_start()
1146 dib7000p_write_word(state, 7, (u16) (value & 0xffff)); in dib7000p_autosearch_start()
1148 dib7000p_write_word(state, 8, (u16) ((value >> 16) & 0xffff)); in dib7000p_autosearch_start()
1149 dib7000p_write_word(state, 9, (u16) (value & 0xffff)); in dib7000p_autosearch_start()
1151 dib7000p_write_word(state, 10, (u16) ((value >> 16) & 0xffff)); in dib7000p_autosearch_start()
1152 dib7000p_write_word(state, 11, (u16) (value & 0xffff)); in dib7000p_autosearch_start()
1155 dib7000p_write_word(state, 0, (u16) ((1 << 9) | value)); in dib7000p_autosearch_start()
1157 dib7000p_write_word(state, 0, (u16) value); in dib7000p_autosearch_start()
1212 dib7000p_write_word(state, 142, 0x0610); in dib7000p_spur_protect()
1257 dib7000p_write_word(state, 143, (0 << 14) | (k << 10) | (coef_re[k] & 0x3ff)); in dib7000p_spur_protect()
1258 dib7000p_write_word(state, 144, coef_im[k] & 0x3ff); in dib7000p_spur_protect()
1259 dib7000p_write_word(state, 143, (1 << 14) | (k << 10) | (coef_re[k] & 0x3ff)); in dib7000p_spur_protect()
1261 dib7000p_write_word(state, 143, 0); in dib7000p_spur_protect()
1276 dib7000p_write_word(state, 770, 0x4000); in dib7000p_tune()
1277 dib7000p_write_word(state, 770, 0x0000); in dib7000p_tune()
1285 dib7000p_write_word(state, 166, 0x4000); in dib7000p_tune()
1287 dib7000p_write_word(state, 166, 0x0000); in dib7000p_tune()
1289 dib7000p_write_word(state, 29, tmp); in dib7000p_tune()
1311 dib7000p_write_word(state, 26, tmp); /* timf_a(6xxx) */ in dib7000p_tune()
1327 dib7000p_write_word(state, 32, tmp); in dib7000p_tune()
1343 dib7000p_write_word(state, 33, tmp); in dib7000p_tune()
1349 dib7000p_write_word(state, 771, tmp | (1 << 1)); in dib7000p_tune()
1350 dib7000p_write_word(state, 771, tmp); in dib7000p_tune()
1359 dib7000p_write_word(state, 26, (tmp & ~(0xf << 12)) | ((((tmp >> 12) & 0xf) + 5) << 12)); in dib7000p_tune()
2054 return dib7000p_write_word(state, 235, val); in dib7000p_pid_filter_ctrl()
2061 return dib7000p_write_word(state, 241 + id, onoff ? (1 << 13) | pid : 0); in dib7000p_pid_filter()
2086 dib7000p_write_word(dpst, 1287, 0x0003); /* sram lead in, rdy */ in dib7000p_i2c_enumeration()
2089 dib7000p_write_word(dpst, 1287, 0x0003); /* sram lead in, rdy */ in dib7000p_i2c_enumeration()
2101 dib7000p_write_word(dpst, 1285, (new_addr << 2) | 0x2); in dib7000p_i2c_enumeration()
2114 dib7000p_write_word(dpst, 1285, dpst->i2c_addr << 2); in dib7000p_i2c_enumeration()
2190 dib7000p_write_word(state, 1985, (1 << 6) | (serpar_num & 0x3f)); in w7090p_tuner_write_serpar()
2191 dib7000p_write_word(state, 1986, (msg[0].buf[1] << 8) | msg[0].buf[2]); in w7090p_tuner_write_serpar()
2210 dib7000p_write_word(state, 1985, (0 << 6) | (serpar_num & 0x3f)); in w7090p_tuner_read_serpar()
2245 dib7000p_write_word(state, apb_address, ((msg[0].buf[1] << 8) | (msg[0].buf[2]))); in dib7090p_rw_on_apb()
2357 dib7000p_write_word(state, 72, word); /* Set the proper input */ in dib7090_tuner_xfer()
2393 dib7000p_write_word(state, 1798, reg); in dib7090_host_bus_drive()
2398 dib7000p_write_word(state, 1799, reg); in dib7090_host_bus_drive()
2403 dib7000p_write_word(state, 1800, reg); in dib7090_host_bus_drive()
2408 dib7000p_write_word(state, 1801, reg); in dib7090_host_bus_drive()
2413 dib7000p_write_word(state, 1802, reg); in dib7090_host_bus_drive()
2440 dib7000p_write_word(state, 1615, 1); in dib7090_cfg_DibTx()
2441 dib7000p_write_word(state, 1603, P_Kin); in dib7090_cfg_DibTx()
2442 dib7000p_write_word(state, 1605, P_Kout); in dib7090_cfg_DibTx()
2443 dib7000p_write_word(state, 1606, insertExtSynchro); in dib7090_cfg_DibTx()
2444 dib7000p_write_word(state, 1608, synchroMode); in dib7090_cfg_DibTx()
2445 dib7000p_write_word(state, 1609, (syncWord >> 16) & 0xffff); in dib7090_cfg_DibTx()
2446 dib7000p_write_word(state, 1610, syncWord & 0xffff); in dib7090_cfg_DibTx()
2447 dib7000p_write_word(state, 1612, syncSize); in dib7090_cfg_DibTx()
2448 dib7000p_write_word(state, 1615, 0); in dib7090_cfg_DibTx()
2461 dib7000p_write_word(state, 1542, syncFreq); in dib7090_cfg_DibRx()
2463 dib7000p_write_word(state, 1554, 1); in dib7090_cfg_DibRx()
2464 dib7000p_write_word(state, 1536, P_Kin); in dib7090_cfg_DibRx()
2465 dib7000p_write_word(state, 1537, P_Kout); in dib7090_cfg_DibRx()
2466 dib7000p_write_word(state, 1539, synchroMode); in dib7090_cfg_DibRx()
2467 dib7000p_write_word(state, 1540, (syncWord >> 16) & 0xffff); in dib7090_cfg_DibRx()
2468 dib7000p_write_word(state, 1541, syncWord & 0xffff); in dib7090_cfg_DibRx()
2469 dib7000p_write_word(state, 1543, syncSize); in dib7090_cfg_DibRx()
2470 dib7000p_write_word(state, 1544, dataOutRate); in dib7090_cfg_DibRx()
2471 dib7000p_write_word(state, 1554, 0); in dib7090_cfg_DibRx()
2489 dib7000p_write_word(state, 1287, reg_1287); in dib7090_enMpegMux()
2503 dib7000p_write_word(state, 1287, ((pulseWidth & 0x1f) << 2) in dib7090_configMpegMux()
2533 dib7000p_write_word(state, 1288, reg_1288); in dib7090_setDibTxMux()
2558 dib7000p_write_word(state, 1288, reg_1288); in dib7090_setHostBusMux()
2578 dib7000p_write_word(state, 1287, reg_1287); in dib7090_set_diversity_in()
2669 ret |= dib7000p_write_word(state, 235, smo_mode); in dib7090_set_output_mode()
2670 ret |= dib7000p_write_word(state, 236, fifo_threshold); /* synchronous fread */ in dib7090_set_output_mode()
2671 ret |= dib7000p_write_word(state, 1286, outreg); in dib7090_set_output_mode()
2695 dib7000p_write_word(state, 1922, en_cur_state); in dib7090_tuner_sleep()
2711 dib7000p_write_word(state, 1794, reg | (4 << 12)); in dib7090_slave_reset()
2713 dib7000p_write_word(state, 1032, 0xffff); in dib7090_slave_reset()
2743 dib7000p_write_word(st, 1287, 0x0003); /* sram lead in, rdy */ in dib7000p_init()