Lines Matching refs:bcs
166 if (cs->bcs[0].mode && (cs->bcs[0].channel == channel)) in Sel_BCS()
167 return (&cs->bcs[0]); in Sel_BCS()
168 else if (cs->bcs[1].mode && (cs->bcs[1].channel == channel)) in Sel_BCS()
169 return (&cs->bcs[1]); in Sel_BCS()
175 write_ctrl(struct BCState *bcs, int which) { in write_ctrl() argument
177 if (bcs->cs->debug & L1_DEB_HSCX) in write_ctrl()
178 debugl1(bcs->cs, "hdlc %c wr%x ctrl %x", in write_ctrl()
179 'A' + bcs->channel, which, bcs->hw.hdlc.ctrl.ctrl); in write_ctrl()
180 if (bcs->cs->subtyp == AVM_FRITZ_PCI) { in write_ctrl()
181 WriteHDLCPCI(bcs->cs, bcs->channel, HDLC_STATUS, bcs->hw.hdlc.ctrl.ctrl); in write_ctrl()
184 WriteHDLCPnP(bcs->cs, bcs->channel, HDLC_STATUS + 2, in write_ctrl()
185 bcs->hw.hdlc.ctrl.sr.mode); in write_ctrl()
187 WriteHDLCPnP(bcs->cs, bcs->channel, HDLC_STATUS + 1, in write_ctrl()
188 bcs->hw.hdlc.ctrl.sr.xml); in write_ctrl()
190 WriteHDLCPnP(bcs->cs, bcs->channel, HDLC_STATUS, in write_ctrl()
191 bcs->hw.hdlc.ctrl.sr.cmd); in write_ctrl()
196 modehdlc(struct BCState *bcs, int mode, int bc) in modehdlc() argument
198 struct IsdnCardState *cs = bcs->cs; in modehdlc()
199 int hdlc = bcs->channel; in modehdlc()
203 'A' + hdlc, bcs->mode, mode, hdlc, bc); in modehdlc()
204 bcs->hw.hdlc.ctrl.ctrl = 0; in modehdlc()
207 bcs->mode = 1; in modehdlc()
208 bcs->channel = bc; in modehdlc()
211 if (bcs->mode == L1_MODE_NULL) in modehdlc()
213 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS; in modehdlc()
214 bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_TRANS; in modehdlc()
215 write_ctrl(bcs, 5); in modehdlc()
216 bcs->mode = L1_MODE_NULL; in modehdlc()
217 bcs->channel = bc; in modehdlc()
220 bcs->mode = mode; in modehdlc()
221 bcs->channel = bc; in modehdlc()
222 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS; in modehdlc()
223 bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_TRANS; in modehdlc()
224 write_ctrl(bcs, 5); in modehdlc()
225 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS; in modehdlc()
226 write_ctrl(bcs, 1); in modehdlc()
227 bcs->hw.hdlc.ctrl.sr.cmd = 0; in modehdlc()
228 schedule_event(bcs, B_XMTBUFREADY); in modehdlc()
231 bcs->mode = mode; in modehdlc()
232 bcs->channel = bc; in modehdlc()
233 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS; in modehdlc()
234 bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_ITF_FLG; in modehdlc()
235 write_ctrl(bcs, 5); in modehdlc()
236 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS; in modehdlc()
237 write_ctrl(bcs, 1); in modehdlc()
238 bcs->hw.hdlc.ctrl.sr.cmd = 0; in modehdlc()
239 schedule_event(bcs, B_XMTBUFREADY); in modehdlc()
245 hdlc_empty_fifo(struct BCState *bcs, int count) in hdlc_empty_fifo() argument
249 u_char idx = bcs->channel ? AVM_HDLC_2 : AVM_HDLC_1; in hdlc_empty_fifo()
251 struct IsdnCardState *cs = bcs->cs; in hdlc_empty_fifo()
255 if (bcs->hw.hdlc.rcvidx + count > HSCX_BUFMAX) { in hdlc_empty_fifo()
260 p = bcs->hw.hdlc.rcvbuf + bcs->hw.hdlc.rcvidx; in hdlc_empty_fifo()
262 bcs->hw.hdlc.rcvidx += count; in hdlc_empty_fifo()
281 char *t = bcs->blog; in hdlc_empty_fifo()
286 bcs->channel ? 'B' : 'A', count); in hdlc_empty_fifo()
288 debugl1(cs, "%s", bcs->blog); in hdlc_empty_fifo()
293 hdlc_fill_fifo(struct BCState *bcs) in hdlc_fill_fifo() argument
295 struct IsdnCardState *cs = bcs->cs; in hdlc_fill_fifo()
303 if (!bcs->tx_skb) in hdlc_fill_fifo()
305 if (bcs->tx_skb->len <= 0) in hdlc_fill_fifo()
308 bcs->hw.hdlc.ctrl.sr.cmd &= ~HDLC_CMD_XME; in hdlc_fill_fifo()
309 if (bcs->tx_skb->len > fifo_size) { in hdlc_fill_fifo()
312 count = bcs->tx_skb->len; in hdlc_fill_fifo()
313 if (bcs->mode != L1_MODE_TRANS) in hdlc_fill_fifo()
314 bcs->hw.hdlc.ctrl.sr.cmd |= HDLC_CMD_XME; in hdlc_fill_fifo()
317 debugl1(cs, "hdlc_fill_fifo %d/%u", count, bcs->tx_skb->len); in hdlc_fill_fifo()
318 p = bcs->tx_skb->data; in hdlc_fill_fifo()
320 skb_pull(bcs->tx_skb, count); in hdlc_fill_fifo()
321 bcs->tx_cnt -= count; in hdlc_fill_fifo()
322 bcs->hw.hdlc.count += count; in hdlc_fill_fifo()
323 bcs->hw.hdlc.ctrl.sr.xml = ((count == fifo_size) ? 0 : count); in hdlc_fill_fifo()
324 write_ctrl(bcs, 3); /* sets the correct index too */ in hdlc_fill_fifo()
341 char *t = bcs->blog; in hdlc_fill_fifo()
346 bcs->channel ? 'B' : 'A', count); in hdlc_fill_fifo()
348 debugl1(cs, "%s", bcs->blog); in hdlc_fill_fifo()
353 HDLC_irq(struct BCState *bcs, u_int stat) { in HDLC_irq() argument
357 if (bcs->cs->debug & L1_DEB_HSCX) in HDLC_irq()
358 debugl1(bcs->cs, "ch%d stat %#x", bcs->channel, stat); in HDLC_irq()
361 if (bcs->cs->debug & L1_DEB_HSCX) in HDLC_irq()
362 debugl1(bcs->cs, "RDO"); in HDLC_irq()
364 debugl1(bcs->cs, "ch%d stat %#x", bcs->channel, stat); in HDLC_irq()
365 bcs->hw.hdlc.ctrl.sr.xml = 0; in HDLC_irq()
366 bcs->hw.hdlc.ctrl.sr.cmd |= HDLC_CMD_RRS; in HDLC_irq()
367 write_ctrl(bcs, 1); in HDLC_irq()
368 bcs->hw.hdlc.ctrl.sr.cmd &= ~HDLC_CMD_RRS; in HDLC_irq()
369 write_ctrl(bcs, 1); in HDLC_irq()
370 bcs->hw.hdlc.rcvidx = 0; in HDLC_irq()
374 hdlc_empty_fifo(bcs, len); in HDLC_irq()
375 if ((stat & HDLC_STAT_RME) || (bcs->mode == L1_MODE_TRANS)) { in HDLC_irq()
377 (bcs->mode == L1_MODE_TRANS)) { in HDLC_irq()
378 if (!(skb = dev_alloc_skb(bcs->hw.hdlc.rcvidx))) in HDLC_irq()
381 memcpy(skb_put(skb, bcs->hw.hdlc.rcvidx), in HDLC_irq()
382 bcs->hw.hdlc.rcvbuf, bcs->hw.hdlc.rcvidx); in HDLC_irq()
383 skb_queue_tail(&bcs->rqueue, skb); in HDLC_irq()
385 bcs->hw.hdlc.rcvidx = 0; in HDLC_irq()
386 schedule_event(bcs, B_RCVBUFREADY); in HDLC_irq()
388 if (bcs->cs->debug & L1_DEB_HSCX) in HDLC_irq()
389 debugl1(bcs->cs, "invalid frame"); in HDLC_irq()
391 debugl1(bcs->cs, "ch%d invalid frame %#x", bcs->channel, stat); in HDLC_irq()
392 bcs->hw.hdlc.rcvidx = 0; in HDLC_irq()
401 if (bcs->tx_skb) { in HDLC_irq()
402 skb_push(bcs->tx_skb, bcs->hw.hdlc.count); in HDLC_irq()
403 bcs->tx_cnt += bcs->hw.hdlc.count; in HDLC_irq()
404 bcs->hw.hdlc.count = 0; in HDLC_irq()
405 if (bcs->cs->debug & L1_DEB_WARN) in HDLC_irq()
406 debugl1(bcs->cs, "ch%d XDU", bcs->channel); in HDLC_irq()
407 } else if (bcs->cs->debug & L1_DEB_WARN) in HDLC_irq()
408 debugl1(bcs->cs, "ch%d XDU without skb", bcs->channel); in HDLC_irq()
409 bcs->hw.hdlc.ctrl.sr.xml = 0; in HDLC_irq()
410 bcs->hw.hdlc.ctrl.sr.cmd |= HDLC_CMD_XRS; in HDLC_irq()
411 write_ctrl(bcs, 1); in HDLC_irq()
412 bcs->hw.hdlc.ctrl.sr.cmd &= ~HDLC_CMD_XRS; in HDLC_irq()
413 write_ctrl(bcs, 1); in HDLC_irq()
414 hdlc_fill_fifo(bcs); in HDLC_irq()
416 if (bcs->tx_skb) { in HDLC_irq()
417 if (bcs->tx_skb->len) { in HDLC_irq()
418 hdlc_fill_fifo(bcs); in HDLC_irq()
421 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) && in HDLC_irq()
422 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { in HDLC_irq()
424 spin_lock_irqsave(&bcs->aclock, flags); in HDLC_irq()
425 bcs->ackcnt += bcs->hw.hdlc.count; in HDLC_irq()
426 spin_unlock_irqrestore(&bcs->aclock, flags); in HDLC_irq()
427 schedule_event(bcs, B_ACKPENDING); in HDLC_irq()
429 dev_kfree_skb_irq(bcs->tx_skb); in HDLC_irq()
430 bcs->hw.hdlc.count = 0; in HDLC_irq()
431 bcs->tx_skb = NULL; in HDLC_irq()
434 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) { in HDLC_irq()
435 bcs->hw.hdlc.count = 0; in HDLC_irq()
436 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); in HDLC_irq()
437 hdlc_fill_fifo(bcs); in HDLC_irq()
439 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); in HDLC_irq()
440 schedule_event(bcs, B_XMTBUFREADY); in HDLC_irq()
449 struct BCState *bcs; in HDLC_irq_main() local
459 if (!(bcs = Sel_BCS(cs, 0))) { in HDLC_irq_main()
463 HDLC_irq(bcs, stat); in HDLC_irq_main()
473 if (!(bcs = Sel_BCS(cs, 1))) { in HDLC_irq_main()
477 HDLC_irq(bcs, stat); in HDLC_irq_main()
484 struct BCState *bcs = st->l1.bcs; in hdlc_l2l1() local
490 spin_lock_irqsave(&bcs->cs->lock, flags); in hdlc_l2l1()
491 if (bcs->tx_skb) { in hdlc_l2l1()
492 skb_queue_tail(&bcs->squeue, skb); in hdlc_l2l1()
494 bcs->tx_skb = skb; in hdlc_l2l1()
495 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); in hdlc_l2l1()
496 bcs->hw.hdlc.count = 0; in hdlc_l2l1()
497 bcs->cs->BC_Send_Data(bcs); in hdlc_l2l1()
499 spin_unlock_irqrestore(&bcs->cs->lock, flags); in hdlc_l2l1()
502 spin_lock_irqsave(&bcs->cs->lock, flags); in hdlc_l2l1()
503 if (bcs->tx_skb) { in hdlc_l2l1()
506 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); in hdlc_l2l1()
507 bcs->tx_skb = skb; in hdlc_l2l1()
508 bcs->hw.hdlc.count = 0; in hdlc_l2l1()
509 bcs->cs->BC_Send_Data(bcs); in hdlc_l2l1()
511 spin_unlock_irqrestore(&bcs->cs->lock, flags); in hdlc_l2l1()
514 if (!bcs->tx_skb) { in hdlc_l2l1()
521 spin_lock_irqsave(&bcs->cs->lock, flags); in hdlc_l2l1()
522 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag); in hdlc_l2l1()
523 modehdlc(bcs, st->l1.mode, st->l1.bc); in hdlc_l2l1()
524 spin_unlock_irqrestore(&bcs->cs->lock, flags); in hdlc_l2l1()
531 spin_lock_irqsave(&bcs->cs->lock, flags); in hdlc_l2l1()
532 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag); in hdlc_l2l1()
533 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); in hdlc_l2l1()
534 modehdlc(bcs, 0, st->l1.bc); in hdlc_l2l1()
535 spin_unlock_irqrestore(&bcs->cs->lock, flags); in hdlc_l2l1()
542 close_hdlcstate(struct BCState *bcs) in close_hdlcstate() argument
544 modehdlc(bcs, 0, 0); in close_hdlcstate()
545 if (test_and_clear_bit(BC_FLG_INIT, &bcs->Flag)) { in close_hdlcstate()
546 kfree(bcs->hw.hdlc.rcvbuf); in close_hdlcstate()
547 bcs->hw.hdlc.rcvbuf = NULL; in close_hdlcstate()
548 kfree(bcs->blog); in close_hdlcstate()
549 bcs->blog = NULL; in close_hdlcstate()
550 skb_queue_purge(&bcs->rqueue); in close_hdlcstate()
551 skb_queue_purge(&bcs->squeue); in close_hdlcstate()
552 if (bcs->tx_skb) { in close_hdlcstate()
553 dev_kfree_skb_any(bcs->tx_skb); in close_hdlcstate()
554 bcs->tx_skb = NULL; in close_hdlcstate()
555 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); in close_hdlcstate()
561 open_hdlcstate(struct IsdnCardState *cs, struct BCState *bcs) in open_hdlcstate() argument
563 if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) { in open_hdlcstate()
564 if (!(bcs->hw.hdlc.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) { in open_hdlcstate()
569 if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) { in open_hdlcstate()
572 test_and_clear_bit(BC_FLG_INIT, &bcs->Flag); in open_hdlcstate()
573 kfree(bcs->hw.hdlc.rcvbuf); in open_hdlcstate()
574 bcs->hw.hdlc.rcvbuf = NULL; in open_hdlcstate()
577 skb_queue_head_init(&bcs->rqueue); in open_hdlcstate()
578 skb_queue_head_init(&bcs->squeue); in open_hdlcstate()
580 bcs->tx_skb = NULL; in open_hdlcstate()
581 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); in open_hdlcstate()
582 bcs->event = 0; in open_hdlcstate()
583 bcs->hw.hdlc.rcvidx = 0; in open_hdlcstate()
584 bcs->tx_cnt = 0; in open_hdlcstate()
589 setstack_hdlc(struct PStack *st, struct BCState *bcs) in setstack_hdlc() argument
591 bcs->channel = st->l1.bc; in setstack_hdlc()
592 if (open_hdlcstate(st->l1.hardware, bcs)) in setstack_hdlc()
594 st->l1.bcs = bcs; in setstack_hdlc()
597 bcs->st = st; in setstack_hdlc()
637 cs->bcs[0].BC_SetStack = setstack_hdlc; in inithdlc()
638 cs->bcs[1].BC_SetStack = setstack_hdlc; in inithdlc()
639 cs->bcs[0].BC_Close = close_hdlcstate; in inithdlc()
640 cs->bcs[1].BC_Close = close_hdlcstate; in inithdlc()
641 modehdlc(cs->bcs, -1, 0); in inithdlc()
642 modehdlc(cs->bcs + 1, -1, 1); in inithdlc()