Lines Matching refs:hc
255 #define HFC_outb(hc, reg, val) \ argument
256 (hc->HFC_outb(hc, reg, val, __func__, __LINE__))
257 #define HFC_outb_nodebug(hc, reg, val) \ argument
258 (hc->HFC_outb_nodebug(hc, reg, val, __func__, __LINE__))
259 #define HFC_inb(hc, reg) \ argument
260 (hc->HFC_inb(hc, reg, __func__, __LINE__))
261 #define HFC_inb_nodebug(hc, reg) \ argument
262 (hc->HFC_inb_nodebug(hc, reg, __func__, __LINE__))
263 #define HFC_inw(hc, reg) \ argument
264 (hc->HFC_inw(hc, reg, __func__, __LINE__))
265 #define HFC_inw_nodebug(hc, reg) \ argument
266 (hc->HFC_inw_nodebug(hc, reg, __func__, __LINE__))
267 #define HFC_wait(hc) \ argument
268 (hc->HFC_wait(hc, __func__, __LINE__))
269 #define HFC_wait_nodebug(hc) \ argument
270 (hc->HFC_wait_nodebug(hc, __func__, __LINE__))
272 #define HFC_outb(hc, reg, val) (hc->HFC_outb(hc, reg, val)) argument
273 #define HFC_outb_nodebug(hc, reg, val) (hc->HFC_outb_nodebug(hc, reg, val)) argument
274 #define HFC_inb(hc, reg) (hc->HFC_inb(hc, reg)) argument
275 #define HFC_inb_nodebug(hc, reg) (hc->HFC_inb_nodebug(hc, reg)) argument
276 #define HFC_inw(hc, reg) (hc->HFC_inw(hc, reg)) argument
277 #define HFC_inw_nodebug(hc, reg) (hc->HFC_inw_nodebug(hc, reg)) argument
278 #define HFC_wait(hc) (hc->HFC_wait(hc)) argument
279 #define HFC_wait_nodebug(hc) (hc->HFC_wait_nodebug(hc)) argument
289 HFC_outb_pcimem(struct hfc_multi *hc, u_char reg, u_char val, in HFC_outb_pcimem() argument
292 HFC_outb_pcimem(struct hfc_multi *hc, u_char reg, u_char val) in HFC_outb_pcimem()
295 writeb(val, hc->pci_membase + reg); in HFC_outb_pcimem()
299 HFC_inb_pcimem(struct hfc_multi *hc, u_char reg, const char *function, int line) in HFC_inb_pcimem() argument
301 HFC_inb_pcimem(struct hfc_multi *hc, u_char reg) in HFC_inb_pcimem()
304 return readb(hc->pci_membase + reg); in HFC_inb_pcimem()
308 HFC_inw_pcimem(struct hfc_multi *hc, u_char reg, const char *function, int line) in HFC_inw_pcimem() argument
310 HFC_inw_pcimem(struct hfc_multi *hc, u_char reg) in HFC_inw_pcimem()
313 return readw(hc->pci_membase + reg); in HFC_inw_pcimem()
317 HFC_wait_pcimem(struct hfc_multi *hc, const char *function, int line) in HFC_wait_pcimem() argument
319 HFC_wait_pcimem(struct hfc_multi *hc) in HFC_wait_pcimem()
322 while (readb(hc->pci_membase + R_STATUS) & V_BUSY) in HFC_wait_pcimem()
329 HFC_outb_regio(struct hfc_multi *hc, u_char reg, u_char val, in HFC_outb_regio() argument
332 HFC_outb_regio(struct hfc_multi *hc, u_char reg, u_char val) in HFC_outb_regio()
335 outb(reg, hc->pci_iobase + 4); in HFC_outb_regio()
336 outb(val, hc->pci_iobase); in HFC_outb_regio()
340 HFC_inb_regio(struct hfc_multi *hc, u_char reg, const char *function, int line) in HFC_inb_regio() argument
342 HFC_inb_regio(struct hfc_multi *hc, u_char reg) in HFC_inb_regio()
345 outb(reg, hc->pci_iobase + 4); in HFC_inb_regio()
346 return inb(hc->pci_iobase); in HFC_inb_regio()
350 HFC_inw_regio(struct hfc_multi *hc, u_char reg, const char *function, int line) in HFC_inw_regio() argument
352 HFC_inw_regio(struct hfc_multi *hc, u_char reg) in HFC_inw_regio()
355 outb(reg, hc->pci_iobase + 4); in HFC_inw_regio()
356 return inw(hc->pci_iobase); in HFC_inw_regio()
360 HFC_wait_regio(struct hfc_multi *hc, const char *function, int line) in HFC_wait_regio() argument
362 HFC_wait_regio(struct hfc_multi *hc) in HFC_wait_regio()
365 outb(R_STATUS, hc->pci_iobase + 4); in HFC_wait_regio()
366 while (inb(hc->pci_iobase) & V_BUSY) in HFC_wait_regio()
372 HFC_outb_debug(struct hfc_multi *hc, u_char reg, u_char val, in HFC_outb_debug() argument
396 hc->id, reg, regname, val, bits, function, line); in HFC_outb_debug()
397 HFC_outb_nodebug(hc, reg, val); in HFC_outb_debug()
400 HFC_inb_debug(struct hfc_multi *hc, u_char reg, const char *function, int line) in HFC_inb_debug() argument
403 u_char val = HFC_inb_nodebug(hc, reg); in HFC_inb_debug()
426 hc->id, reg, regname, val, bits, function, line); in HFC_inb_debug()
430 HFC_inw_debug(struct hfc_multi *hc, u_char reg, const char *function, int line) in HFC_inw_debug() argument
433 u_short val = HFC_inw_nodebug(hc, reg); in HFC_inw_debug()
448 hc->id, reg, regname, val, function, line); in HFC_inw_debug()
452 HFC_wait_debug(struct hfc_multi *hc, const char *function, int line) in HFC_wait_debug() argument
455 hc->id, function, line); in HFC_wait_debug()
456 HFC_wait_nodebug(hc); in HFC_wait_debug()
462 write_fifo_regio(struct hfc_multi *hc, u_char *data, int len) in write_fifo_regio() argument
464 outb(A_FIFO_DATA0, (hc->pci_iobase) + 4); in write_fifo_regio()
466 outl(cpu_to_le32(*(u32 *)data), hc->pci_iobase); in write_fifo_regio()
471 outw(cpu_to_le16(*(u16 *)data), hc->pci_iobase); in write_fifo_regio()
476 outb(*data, hc->pci_iobase); in write_fifo_regio()
483 write_fifo_pcimem(struct hfc_multi *hc, u_char *data, int len) in write_fifo_pcimem() argument
487 hc->pci_membase + A_FIFO_DATA0); in write_fifo_pcimem()
493 hc->pci_membase + A_FIFO_DATA0); in write_fifo_pcimem()
498 writeb(*data, hc->pci_membase + A_FIFO_DATA0); in write_fifo_pcimem()
506 read_fifo_regio(struct hfc_multi *hc, u_char *data, int len) in read_fifo_regio() argument
508 outb(A_FIFO_DATA0, (hc->pci_iobase) + 4); in read_fifo_regio()
510 *(u32 *)data = le32_to_cpu(inl(hc->pci_iobase)); in read_fifo_regio()
515 *(u16 *)data = le16_to_cpu(inw(hc->pci_iobase)); in read_fifo_regio()
520 *data = inb(hc->pci_iobase); in read_fifo_regio()
528 read_fifo_pcimem(struct hfc_multi *hc, u_char *data, int len) in read_fifo_pcimem() argument
532 le32_to_cpu(readl(hc->pci_membase + A_FIFO_DATA0)); in read_fifo_pcimem()
538 le16_to_cpu(readw(hc->pci_membase + A_FIFO_DATA0)); in read_fifo_pcimem()
543 *data = readb(hc->pci_membase + A_FIFO_DATA0); in read_fifo_pcimem()
550 enable_hwirq(struct hfc_multi *hc) in enable_hwirq() argument
552 hc->hw.r_irq_ctrl |= V_GLOB_IRQ_EN; in enable_hwirq()
553 HFC_outb(hc, R_IRQ_CTRL, hc->hw.r_irq_ctrl); in enable_hwirq()
557 disable_hwirq(struct hfc_multi *hc) in disable_hwirq() argument
559 hc->hw.r_irq_ctrl &= ~((u_char)V_GLOB_IRQ_EN); in disable_hwirq()
560 HFC_outb(hc, R_IRQ_CTRL, hc->hw.r_irq_ctrl); in disable_hwirq()
580 readpcibridge(struct hfc_multi *hc, unsigned char address) in readpcibridge() argument
585 if (!hc->pci_iobase) in readpcibridge()
589 HFC_outb(hc, R_CTRL, 0x4); /*was _io before*/ in readpcibridge()
598 outw(cipv, hc->pci_iobase + 4); in readpcibridge()
599 data = inb(hc->pci_iobase); in readpcibridge()
602 HFC_outb(hc, R_CTRL, 0x0); /* was _io before */ in readpcibridge()
608 writepcibridge(struct hfc_multi *hc, unsigned char address, unsigned char data) in writepcibridge() argument
613 if (!hc->pci_iobase) in writepcibridge()
622 outw(cipv, hc->pci_iobase + 4); in writepcibridge()
634 outl(datav, hc->pci_iobase); in writepcibridge()
638 cpld_set_reg(struct hfc_multi *hc, unsigned char reg) in cpld_set_reg() argument
641 HFC_outb(hc, R_GPIO_OUT1, reg); in cpld_set_reg()
645 cpld_write_reg(struct hfc_multi *hc, unsigned char reg, unsigned char val) in cpld_write_reg() argument
647 cpld_set_reg(hc, reg); in cpld_write_reg()
649 enablepcibridge(hc); in cpld_write_reg()
650 writepcibridge(hc, 1, val); in cpld_write_reg()
651 disablepcibridge(hc); in cpld_write_reg()
657 cpld_read_reg(struct hfc_multi *hc, unsigned char reg) in cpld_read_reg() argument
661 cpld_set_reg(hc, reg); in cpld_read_reg()
664 HFC_outb(hc, R_GPIO_OUT1, reg); in cpld_read_reg()
666 enablepcibridge(hc); in cpld_read_reg()
667 bytein = readpcibridge(hc, 1); in cpld_read_reg()
668 disablepcibridge(hc); in cpld_read_reg()
674 vpm_write_address(struct hfc_multi *hc, unsigned short addr) in vpm_write_address() argument
676 cpld_write_reg(hc, 0, 0xff & addr); in vpm_write_address()
677 cpld_write_reg(hc, 1, 0x01 & (addr >> 8)); in vpm_write_address()
854 vpm_echocan_on(struct hfc_multi *hc, int ch, int taps) in vpm_echocan_on() argument
858 struct bchannel *bch = hc->chan[ch].bch; in vpm_echocan_on()
863 if (hc->chan[ch].protocol != ISDN_P_B_RAW) in vpm_echocan_on()
882 vpm_out(hc, unit, timeslot, 0x7e); in vpm_echocan_on()
886 vpm_echocan_off(struct hfc_multi *hc, int ch) in vpm_echocan_off() argument
890 struct bchannel *bch = hc->chan[ch].bch; in vpm_echocan_off()
896 if (hc->chan[ch].protocol != ISDN_P_B_RAW) in vpm_echocan_off()
915 vpm_out(hc, unit, timeslot, 0x01); in vpm_echocan_off()
928 struct hfc_multi *hc, *next, *pcmmaster = NULL; in hfcmulti_resync() local
945 list_for_each_entry_safe(hc, next, &HFClist, list) { in hfcmulti_resync()
946 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_resync()
947 if (hc->syncronized) { in hfcmulti_resync()
948 newmaster = hc; in hfcmulti_resync()
956 list_for_each_entry_safe(hc, next, &HFClist, list) { in hfcmulti_resync()
957 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_resync()
958 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in hfcmulti_resync()
962 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) { in hfcmulti_resync()
963 pcmmaster = hc; in hfcmulti_resync()
964 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_resync()
968 hc->e1_resync |= 1; /* get SYNC_I */ in hfcmulti_resync()
975 hc = newmaster; in hfcmulti_resync()
978 "interface.\n", hc->id, hc); in hfcmulti_resync()
980 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in hfcmulti_resync()
985 if (hc->ctype == HFC_TYPE_E1 in hfcmulti_resync()
986 && !test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) { in hfcmulti_resync()
989 hc->e1_resync |= 2; /* switch to jatt */ in hfcmulti_resync()
993 hc = pcmmaster; in hfcmulti_resync()
997 "with QUARTZ\n", hc->id, hc); in hfcmulti_resync()
998 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_resync()
1004 hc->e1_resync |= 4; /* switch quartz */ in hfcmulti_resync()
1009 "enabled by HFC-%dS\n", hc->ctype); in hfcmulti_resync()
1011 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in hfcmulti_resync()
1028 plxsd_checksync(struct hfc_multi *hc, int rm) in plxsd_checksync() argument
1030 if (hc->syncronized) { in plxsd_checksync()
1034 " (id=%d)\n", __func__, hc->id + 1, in plxsd_checksync()
1035 hc->id); in plxsd_checksync()
1036 hfcmulti_resync(hc, hc, rm); in plxsd_checksync()
1039 if (syncmaster == hc) { in plxsd_checksync()
1042 " (id=%d)\n", __func__, hc->id + 1, in plxsd_checksync()
1043 hc->id); in plxsd_checksync()
1044 hfcmulti_resync(hc, NULL, rm); in plxsd_checksync()
1054 release_io_hfcmulti(struct hfc_multi *hc) in release_io_hfcmulti() argument
1064 hc->hw.r_cirm |= V_SRES; in release_io_hfcmulti()
1065 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in release_io_hfcmulti()
1067 hc->hw.r_cirm &= ~V_SRES; in release_io_hfcmulti()
1068 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in release_io_hfcmulti()
1072 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) && hc->plx_membase) { in release_io_hfcmulti()
1075 __func__, hc->id + 1); in release_io_hfcmulti()
1077 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in release_io_hfcmulti()
1096 test_and_clear_bit(HFC_CHIP_PLXSD, &hc->chip); /* prevent resync */ in release_io_hfcmulti()
1097 if (hc->pci_dev) in release_io_hfcmulti()
1098 pci_write_config_word(hc->pci_dev, PCI_COMMAND, 0); in release_io_hfcmulti()
1099 if (hc->pci_membase) in release_io_hfcmulti()
1100 iounmap(hc->pci_membase); in release_io_hfcmulti()
1101 if (hc->plx_membase) in release_io_hfcmulti()
1102 iounmap(hc->plx_membase); in release_io_hfcmulti()
1103 if (hc->pci_iobase) in release_io_hfcmulti()
1104 release_region(hc->pci_iobase, 8); in release_io_hfcmulti()
1105 if (hc->xhfc_membase) in release_io_hfcmulti()
1106 iounmap((void *)hc->xhfc_membase); in release_io_hfcmulti()
1108 if (hc->pci_dev) { in release_io_hfcmulti()
1109 pci_disable_device(hc->pci_dev); in release_io_hfcmulti()
1110 pci_set_drvdata(hc->pci_dev, NULL); in release_io_hfcmulti()
1122 init_chip(struct hfc_multi *hc) in init_chip() argument
1133 spin_lock_irqsave(&hc->lock, flags); in init_chip()
1135 memset(&hc->hw, 0, sizeof(struct hfcm_hw)); in init_chip()
1140 val = HFC_inb(hc, R_CHIP_ID); in init_chip()
1147 rev = HFC_inb(hc, R_CHIP_RV); in init_chip()
1150 val, rev, (rev == 0 && (hc->ctype != HFC_TYPE_XHFC)) ? in init_chip()
1152 if (hc->ctype != HFC_TYPE_XHFC && rev == 0) { in init_chip()
1153 test_and_set_bit(HFC_CHIP_REVISION0, &hc->chip); in init_chip()
1168 hc->Flen = 0x10; in init_chip()
1169 hc->Zmin = 0x80; in init_chip()
1170 hc->Zlen = 384; in init_chip()
1171 hc->DTMFbase = 0x1000; in init_chip()
1172 if (test_bit(HFC_CHIP_EXRAM_128, &hc->chip)) { in init_chip()
1176 hc->hw.r_ctrl |= V_EXT_RAM; in init_chip()
1177 hc->hw.r_ram_sz = 1; in init_chip()
1178 hc->Flen = 0x20; in init_chip()
1179 hc->Zmin = 0xc0; in init_chip()
1180 hc->Zlen = 1856; in init_chip()
1181 hc->DTMFbase = 0x2000; in init_chip()
1183 if (test_bit(HFC_CHIP_EXRAM_512, &hc->chip)) { in init_chip()
1187 hc->hw.r_ctrl |= V_EXT_RAM; in init_chip()
1188 hc->hw.r_ram_sz = 2; in init_chip()
1189 hc->Flen = 0x20; in init_chip()
1190 hc->Zmin = 0xc0; in init_chip()
1191 hc->Zlen = 8000; in init_chip()
1192 hc->DTMFbase = 0x2000; in init_chip()
1194 if (hc->ctype == HFC_TYPE_XHFC) { in init_chip()
1195 hc->Flen = 0x8; in init_chip()
1196 hc->Zmin = 0x0; in init_chip()
1197 hc->Zlen = 64; in init_chip()
1198 hc->DTMFbase = 0x0; in init_chip()
1200 hc->max_trans = poll << 1; in init_chip()
1201 if (hc->max_trans > hc->Zlen) in init_chip()
1202 hc->max_trans = hc->Zlen; in init_chip()
1205 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1208 __func__, hc->id + 1); in init_chip()
1210 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1236 if (pos != hc) in init_chip()
1257 hc->hw.r_pcm_md0 = V_F0_LEN; /* shift clock for DSP */ in init_chip()
1260 if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) in init_chip()
1261 hc->hw.r_pcm_md0 = V_F0_LEN; /* shift clock for DSP */ in init_chip()
1264 if (!test_bit(HFC_CHIP_REVISION0, &hc->chip)) in init_chip()
1265 hc->hw.r_ram_sz |= V_FZ_MD; in init_chip()
1268 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in init_chip()
1273 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip) && !plxsd_master) { in init_chip()
1277 hc->hw.r_pcm_md0 |= V_PCM_MD; in init_chip()
1285 HFC_outb(hc, R_CTRL, hc->hw.r_ctrl); in init_chip()
1286 if (hc->ctype == HFC_TYPE_XHFC) in init_chip()
1287 HFC_outb(hc, 0x0C /* R_FIFO_THRES */, in init_chip()
1290 HFC_outb(hc, R_RAM_SZ, hc->hw.r_ram_sz); in init_chip()
1291 HFC_outb(hc, R_FIFO_MD, 0); in init_chip()
1292 if (hc->ctype == HFC_TYPE_XHFC) in init_chip()
1293 hc->hw.r_cirm = V_SRES | V_HFCRES | V_PCMRES | V_STRES; in init_chip()
1295 hc->hw.r_cirm = V_SRES | V_HFCRES | V_PCMRES | V_STRES in init_chip()
1297 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in init_chip()
1299 hc->hw.r_cirm = 0; in init_chip()
1300 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in init_chip()
1302 if (hc->ctype != HFC_TYPE_XHFC) in init_chip()
1303 HFC_outb(hc, R_RAM_SZ, hc->hw.r_ram_sz); in init_chip()
1306 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1308 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1311 if (hc->hw.r_pcm_md0 & V_PCM_MD) { in init_chip()
1329 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x90); in init_chip()
1330 if (hc->slots == 32) in init_chip()
1331 HFC_outb(hc, R_PCM_MD1, 0x00); in init_chip()
1332 if (hc->slots == 64) in init_chip()
1333 HFC_outb(hc, R_PCM_MD1, 0x10); in init_chip()
1334 if (hc->slots == 128) in init_chip()
1335 HFC_outb(hc, R_PCM_MD1, 0x20); in init_chip()
1336 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0xa0); in init_chip()
1337 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) in init_chip()
1338 HFC_outb(hc, R_PCM_MD2, V_SYNC_SRC); /* sync via SYNC_I / O */ in init_chip()
1339 else if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) in init_chip()
1340 HFC_outb(hc, R_PCM_MD2, 0x10); /* V_C2O_EN */ in init_chip()
1342 HFC_outb(hc, R_PCM_MD2, 0x00); /* sync from interface */ in init_chip()
1343 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x00); in init_chip()
1345 HFC_outb_nodebug(hc, R_SLOT, i); in init_chip()
1346 HFC_outb_nodebug(hc, A_SL_CFG, 0); in init_chip()
1347 if (hc->ctype != HFC_TYPE_XHFC) in init_chip()
1348 HFC_outb_nodebug(hc, A_CONF, 0); in init_chip()
1349 hc->slot_owner[i] = -1; in init_chip()
1353 if (test_bit(HFC_CHIP_CLOCK2, &hc->chip)) { in init_chip()
1357 HFC_outb(hc, R_BRG_PCM_CFG, V_PCM_CLK); in init_chip()
1360 if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) in init_chip()
1361 HFC_outb(hc, 0x02 /* R_CLK_CFG */, 0x40 /* V_CLKO_OFF */); in init_chip()
1364 if (test_bit(HFC_CHIP_B410P, &hc->chip)) { in init_chip()
1366 HFC_outb(hc, R_GPIO_SEL, 0x30); in init_chip()
1367 HFC_outb(hc, R_GPIO_EN1, 0x3); in init_chip()
1370 vpm_init(hc); in init_chip()
1374 val = HFC_inb(hc, R_F0_CNTL); in init_chip()
1375 val += HFC_inb(hc, R_F0_CNTH) << 8; in init_chip()
1379 spin_unlock_irqrestore(&hc->lock, flags); in init_chip()
1382 spin_lock_irqsave(&hc->lock, flags); in init_chip()
1383 val2 = HFC_inb(hc, R_F0_CNTL); in init_chip()
1384 val2 += HFC_inb(hc, R_F0_CNTH) << 8; in init_chip()
1391 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) in init_chip()
1394 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) in init_chip()
1397 test_and_set_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in init_chip()
1403 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) { in init_chip()
1410 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in init_chip()
1415 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) in init_chip()
1424 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1426 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1436 hc->hw.r_pcm_md0 |= V_PCM_MD; in init_chip()
1437 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x00); in init_chip()
1438 spin_unlock_irqrestore(&hc->lock, flags); in init_chip()
1441 spin_lock_irqsave(&hc->lock, flags); in init_chip()
1442 val2 = HFC_inb(hc, R_F0_CNTL); in init_chip()
1443 val2 += HFC_inb(hc, R_F0_CNTH) << 8; in init_chip()
1449 &hc->chip); in init_chip()
1458 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1459 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) in init_chip()
1462 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1473 if (hc->pcm) in init_chip()
1475 hc->pcm); in init_chip()
1477 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip) in init_chip()
1478 || test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1481 hc->pcm = PCM_cnt; in init_chip()
1483 "(auto selected)\n", hc->pcm); in init_chip()
1487 HFC_outb(hc, R_TI_WD, poll_timer); in init_chip()
1488 hc->hw.r_irqmsk_misc |= V_TI_IRQMSK; in init_chip()
1491 if (hc->ctype == HFC_TYPE_E1) in init_chip()
1492 hc->hw.r_irqmsk_misc |= V_STA_IRQMSK; in init_chip()
1495 if (test_bit(HFC_CHIP_DTMF, &hc->chip)) { in init_chip()
1499 hc->hw.r_dtmf = V_DTMF_EN | V_DTMF_STOP; in init_chip()
1500 if (test_bit(HFC_CHIP_ULAW, &hc->chip)) in init_chip()
1501 hc->hw.r_dtmf |= V_ULAW_SEL; in init_chip()
1502 HFC_outb(hc, R_DTMF_N, 102 - 1); in init_chip()
1503 hc->hw.r_irqmsk_misc |= V_DTMF_IRQMSK; in init_chip()
1507 if (test_bit(HFC_CHIP_ULAW, &hc->chip)) in init_chip()
1511 if (hc->ctype != HFC_TYPE_XHFC) in init_chip()
1512 HFC_outb(hc, R_CONF_EN, r_conf_en); in init_chip()
1515 switch (hc->leds) { in init_chip()
1517 if (test_bit(HFC_CHIP_WATCHDOG, &hc->chip)) in init_chip()
1518 HFC_outb(hc, R_GPIO_SEL, 0x32); in init_chip()
1520 HFC_outb(hc, R_GPIO_SEL, 0x30); in init_chip()
1522 HFC_outb(hc, R_GPIO_EN1, 0x0f); in init_chip()
1523 HFC_outb(hc, R_GPIO_OUT1, 0x00); in init_chip()
1525 HFC_outb(hc, R_GPIO_EN0, V_GPIO_EN2 | V_GPIO_EN3); in init_chip()
1530 HFC_outb(hc, R_GPIO_SEL, 0xf0); in init_chip()
1531 HFC_outb(hc, R_GPIO_EN1, 0xff); in init_chip()
1532 HFC_outb(hc, R_GPIO_OUT1, 0x00); in init_chip()
1536 if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) { in init_chip()
1537 hc->hw.r_st_sync = 0x10; /* V_AUTO_SYNCI */ in init_chip()
1538 HFC_outb(hc, R_ST_SYNC, hc->hw.r_st_sync); in init_chip()
1542 if (hc->masterclk >= 0) { in init_chip()
1546 __func__, hc->masterclk, hc->ports - 1); in init_chip()
1547 hc->hw.r_st_sync |= (hc->masterclk | V_AUTO_SYNC); in init_chip()
1548 HFC_outb(hc, R_ST_SYNC, hc->hw.r_st_sync); in init_chip()
1554 HFC_outb(hc, R_IRQMSK_MISC, hc->hw.r_irqmsk_misc); in init_chip()
1557 hc->hw.r_irqmsk_misc); in init_chip()
1560 HFC_outb(hc, R_RAM_ADDR0, 0); in init_chip()
1561 HFC_outb(hc, R_RAM_ADDR1, 0); in init_chip()
1562 HFC_outb(hc, R_RAM_ADDR2, 0); in init_chip()
1564 HFC_outb_nodebug(hc, R_RAM_ADDR0, i); in init_chip()
1565 HFC_outb_nodebug(hc, R_RAM_DATA, ((i * 3) & 0xff)); in init_chip()
1568 HFC_outb_nodebug(hc, R_RAM_ADDR0, i); in init_chip()
1569 HFC_inb_nodebug(hc, R_RAM_DATA); in init_chip()
1570 rval = HFC_inb_nodebug(hc, R_INT_DATA); in init_chip()
1587 spin_unlock_irqrestore(&hc->lock, flags); in init_chip()
1596 hfcmulti_watchdog(struct hfc_multi *hc) in hfcmulti_watchdog() argument
1598 hc->wdcount++; in hfcmulti_watchdog()
1600 if (hc->wdcount > 10) { in hfcmulti_watchdog()
1601 hc->wdcount = 0; in hfcmulti_watchdog()
1602 hc->wdbyte = hc->wdbyte == V_GPIO_OUT2 ? in hfcmulti_watchdog()
1606 HFC_outb(hc, R_GPIO_EN0, V_GPIO_EN2 | V_GPIO_EN3); in hfcmulti_watchdog()
1607 HFC_outb(hc, R_GPIO_OUT0, hc->wdbyte); in hfcmulti_watchdog()
1617 hfcmulti_leds(struct hfc_multi *hc) in hfcmulti_leds() argument
1625 switch (hc->leds) { in hfcmulti_leds()
1637 dch = hc->chan[hc->dnum[0]].dch; in hfcmulti_leds()
1639 if (hc->chan[hc->dnum[0]].los) in hfcmulti_leds()
1641 if (hc->e1_state != 1) { in hfcmulti_leds()
1643 hc->flash[2] = 0; in hfcmulti_leds()
1644 hc->flash[3] = 0; in hfcmulti_leds()
1648 if (!hc->flash[2] && hc->activity_tx) in hfcmulti_leds()
1649 hc->flash[2] = poll; in hfcmulti_leds()
1650 if (!hc->flash[3] && hc->activity_rx) in hfcmulti_leds()
1651 hc->flash[3] = poll; in hfcmulti_leds()
1652 if (hc->flash[2] && hc->flash[2] < 1024) in hfcmulti_leds()
1654 if (hc->flash[3] && hc->flash[3] < 1024) in hfcmulti_leds()
1656 if (hc->flash[2] >= 2048) in hfcmulti_leds()
1657 hc->flash[2] = 0; in hfcmulti_leds()
1658 if (hc->flash[3] >= 2048) in hfcmulti_leds()
1659 hc->flash[3] = 0; in hfcmulti_leds()
1660 if (hc->flash[2]) in hfcmulti_leds()
1661 hc->flash[2] += poll; in hfcmulti_leds()
1662 if (hc->flash[3]) in hfcmulti_leds()
1663 hc->flash[3] += poll; in hfcmulti_leds()
1668 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1669 HFC_outb_nodebug(hc, R_GPIO_OUT1, leds); in hfcmulti_leds()
1670 hc->ledstate = leds; in hfcmulti_leds()
1682 dch = hc->chan[(i << 2) | 2].dch; in hfcmulti_leds()
1693 hc->activity_tx |= hc->activity_rx; in hfcmulti_leds()
1694 if (!hc->flash[i] && in hfcmulti_leds()
1695 (hc->activity_tx & (1 << i))) in hfcmulti_leds()
1696 hc->flash[i] = poll; in hfcmulti_leds()
1697 if (hc->flash[i] && hc->flash[i] < 1024) in hfcmulti_leds()
1699 if (hc->flash[i] >= 2048) in hfcmulti_leds()
1700 hc->flash[i] = 0; in hfcmulti_leds()
1701 if (hc->flash[i]) in hfcmulti_leds()
1702 hc->flash[i] += poll; in hfcmulti_leds()
1705 hc->flash[i] = 0; in hfcmulti_leds()
1710 if (test_bit(HFC_CHIP_B410P, &hc->chip)) { in hfcmulti_leds()
1721 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1722 vpm_out(hc, 0, 0x1a8 + 3, leds); in hfcmulti_leds()
1723 hc->ledstate = leds; in hfcmulti_leds()
1730 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1731 HFC_outb_nodebug(hc, R_GPIO_EN1, leds & 0x0F); in hfcmulti_leds()
1732 HFC_outb_nodebug(hc, R_GPIO_OUT1, leds >> 4); in hfcmulti_leds()
1733 hc->ledstate = leds; in hfcmulti_leds()
1746 dch = hc->chan[(i << 2) | 2].dch; in hfcmulti_leds()
1757 hc->activity_tx |= hc->activity_rx; in hfcmulti_leds()
1758 if (!hc->flash[i] && in hfcmulti_leds()
1759 (hc->activity_tx & (1 << i))) in hfcmulti_leds()
1760 hc->flash[i] = poll; in hfcmulti_leds()
1761 if (hc->flash[i] < 1024) in hfcmulti_leds()
1763 if (hc->flash[i] >= 2048) in hfcmulti_leds()
1764 hc->flash[i] = 0; in hfcmulti_leds()
1765 if (hc->flash[i]) in hfcmulti_leds()
1766 hc->flash[i] += poll; in hfcmulti_leds()
1769 hc->flash[i] = 0; in hfcmulti_leds()
1776 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1777 HFC_outb_nodebug(hc, R_GPIO_EN1, in hfcmulti_leds()
1779 HFC_outb_nodebug(hc, R_GPIO_OUT1, in hfcmulti_leds()
1781 hc->ledstate = leds; in hfcmulti_leds()
1793 dch = hc->chan[(i << 2) | 2].dch; in hfcmulti_leds()
1804 hc->activity_tx |= hc->activity_rx; in hfcmulti_leds()
1805 if (!hc->flash[i] && in hfcmulti_leds()
1806 (hc->activity_tx & (1 << i))) in hfcmulti_leds()
1807 hc->flash[i] = poll; in hfcmulti_leds()
1808 if (hc->flash[i] < 1024) in hfcmulti_leds()
1810 if (hc->flash[i] >= 2048) in hfcmulti_leds()
1811 hc->flash[i] = 0; in hfcmulti_leds()
1812 if (hc->flash[i]) in hfcmulti_leds()
1813 hc->flash[i] += poll; in hfcmulti_leds()
1815 hc->flash[i] = 0; in hfcmulti_leds()
1819 if (leddw != hc->ledstate) { in hfcmulti_leds()
1823 HFC_outb_nodebug(hc, R_BRG_PCM_CFG, 1 | V_PCM_CLK); in hfcmulti_leds()
1824 outw(0x4000, hc->pci_iobase + 4); in hfcmulti_leds()
1825 outl(leddw, hc->pci_iobase); in hfcmulti_leds()
1826 HFC_outb_nodebug(hc, R_BRG_PCM_CFG, V_PCM_CLK); in hfcmulti_leds()
1827 hc->ledstate = leddw; in hfcmulti_leds()
1831 hc->activity_tx = 0; in hfcmulti_leds()
1832 hc->activity_rx = 0; in hfcmulti_leds()
1839 hfcmulti_dtmf(struct hfc_multi *hc) in hfcmulti_dtmf() argument
1856 bch = hc->chan[ch].bch; in hfcmulti_dtmf()
1859 if (!hc->created[hc->chan[ch].port]) in hfcmulti_dtmf()
1866 coeff = &(hc->chan[ch].coeff[hc->chan[ch].coeff_count * 16]); in hfcmulti_dtmf()
1870 addr = hc->DTMFbase + ((co << 7) | (ch << 2)); in hfcmulti_dtmf()
1871 HFC_outb_nodebug(hc, R_RAM_ADDR0, addr); in hfcmulti_dtmf()
1872 HFC_outb_nodebug(hc, R_RAM_ADDR1, addr >> 8); in hfcmulti_dtmf()
1873 HFC_outb_nodebug(hc, R_RAM_ADDR2, (addr >> 16) in hfcmulti_dtmf()
1875 w_float = HFC_inb_nodebug(hc, R_RAM_DATA); in hfcmulti_dtmf()
1876 w_float |= (HFC_inb_nodebug(hc, R_RAM_DATA) << 8); in hfcmulti_dtmf()
1894 w_float = HFC_inb_nodebug(hc, R_RAM_DATA); in hfcmulti_dtmf()
1895 w_float |= (HFC_inb_nodebug(hc, R_RAM_DATA) << 8); in hfcmulti_dtmf()
1917 hc->chan[ch].coeff_count++; in hfcmulti_dtmf()
1918 if (hc->chan[ch].coeff_count == 8) { in hfcmulti_dtmf()
1919 hc->chan[ch].coeff_count = 0; in hfcmulti_dtmf()
1929 memcpy(skb_put(skb, 512), hc->chan[ch].coeff, 512); in hfcmulti_dtmf()
1935 hc->dtmf = dtmf; in hfcmulti_dtmf()
1937 HFC_outb_nodebug(hc, R_DTMF, hc->hw.r_dtmf | V_RST_DTMF); in hfcmulti_dtmf()
1946 hfcmulti_tx(struct hfc_multi *hc, int ch) in hfcmulti_tx() argument
1958 bch = hc->chan[ch].bch; in hfcmulti_tx()
1959 dch = hc->chan[ch].dch; in hfcmulti_tx()
1963 txpending = &hc->chan[ch].txpending; in hfcmulti_tx()
1964 slot_tx = hc->chan[ch].slot_tx; in hfcmulti_tx()
1982 if (test_bit(HFC_CHIP_B410P, &hc->chip) && in hfcmulti_tx()
1983 (hc->chan[ch].protocol == ISDN_P_B_RAW) && in hfcmulti_tx()
1984 (hc->chan[ch].slot_rx < 0) && in hfcmulti_tx()
1985 (hc->chan[ch].slot_tx < 0)) in hfcmulti_tx()
1986 HFC_outb_nodebug(hc, R_FIFO, 0x20 | (ch << 1)); in hfcmulti_tx()
1988 HFC_outb_nodebug(hc, R_FIFO, ch << 1); in hfcmulti_tx()
1989 HFC_wait_nodebug(hc); in hfcmulti_tx()
1993 HFC_outb_nodebug(hc, R_INC_RES_FIFO, V_RES_F); in hfcmulti_tx()
1994 HFC_wait_nodebug(hc); in hfcmulti_tx()
1995 HFC_outb(hc, A_SUBCH_CFG, 0); in hfcmulti_tx()
2000 f1 = HFC_inb_nodebug(hc, A_F1); in hfcmulti_tx()
2001 f2 = HFC_inb_nodebug(hc, A_F2); in hfcmulti_tx()
2002 while (f2 != (temp = HFC_inb_nodebug(hc, A_F2))) { in hfcmulti_tx()
2006 __func__, hc->id + 1, temp, f2); in hfcmulti_tx()
2011 Fspace += hc->Flen; in hfcmulti_tx()
2018 if (test_bit(HFC_CHIP_REVISION0, &hc->chip)) { in hfcmulti_tx()
2025 if (hc->ctype != HFC_TYPE_E1 && dch) { in hfcmulti_tx()
2033 z1 = HFC_inw_nodebug(hc, A_Z1) - hc->Zmin; in hfcmulti_tx()
2034 z2 = HFC_inw_nodebug(hc, A_Z2) - hc->Zmin; in hfcmulti_tx()
2035 while (z2 != (temp = (HFC_inw_nodebug(hc, A_Z2) - hc->Zmin))) { in hfcmulti_tx()
2038 "%d!=%d\n", __func__, hc->id + 1, temp, z2); in hfcmulti_tx()
2041 hc->chan[ch].Zfill = z1 - z2; in hfcmulti_tx()
2042 if (hc->chan[ch].Zfill < 0) in hfcmulti_tx()
2043 hc->chan[ch].Zfill += hc->Zlen; in hfcmulti_tx()
2046 Zspace += hc->Zlen; in hfcmulti_tx()
2050 Zspace = Zspace - hc->Zlen + hc->max_trans; in hfcmulti_tx()
2067 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2068 HFC_outb(hc, A_CON_HDLC, 0xc0 in hfcmulti_tx()
2072 HFC_outb(hc, A_CON_HDLC, 0xc0 | 0x00 | in hfcmulti_tx()
2074 HFC_outb_nodebug(hc, R_FIFO, ch << 1 | 1); in hfcmulti_tx()
2075 HFC_wait_nodebug(hc); in hfcmulti_tx()
2076 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2077 HFC_outb(hc, A_CON_HDLC, 0xc0 in hfcmulti_tx()
2081 HFC_outb(hc, A_CON_HDLC, 0xc0 | 0x00 | in hfcmulti_tx()
2083 HFC_outb_nodebug(hc, R_FIFO, ch << 1); in hfcmulti_tx()
2084 HFC_wait_nodebug(hc); in hfcmulti_tx()
2098 hc->write_fifo(hc, hc->silence_data, poll >> 1); in hfcmulti_tx()
2110 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2111 HFC_outb(hc, A_CON_HDLC, 0x80 in hfcmulti_tx()
2115 HFC_outb(hc, A_CON_HDLC, 0x80 | 0x00 | in hfcmulti_tx()
2117 HFC_outb_nodebug(hc, R_FIFO, ch << 1 | 1); in hfcmulti_tx()
2118 HFC_wait_nodebug(hc); in hfcmulti_tx()
2119 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2120 HFC_outb(hc, A_CON_HDLC, 0x80 in hfcmulti_tx()
2124 HFC_outb(hc, A_CON_HDLC, 0x80 | 0x00 | in hfcmulti_tx()
2126 HFC_outb_nodebug(hc, R_FIFO, ch << 1); in hfcmulti_tx()
2127 HFC_wait_nodebug(hc); in hfcmulti_tx()
2133 hc->activity_tx |= 1 << hc->chan[ch].port; in hfcmulti_tx()
2148 __func__, hc->id + 1, ch, Zspace, z1, z2, ii-i, len-i, in hfcmulti_tx()
2152 hc->write_fifo(hc, d, ii - i); in hfcmulti_tx()
2153 hc->chan[ch].Zfill += ii - i; in hfcmulti_tx()
2165 HFC_outb_nodebug(hc, R_INC_RES_FIFO, V_INC_F); in hfcmulti_tx()
2166 HFC_wait_nodebug(hc); in hfcmulti_tx()
2186 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence); in hfcmulti_tx()
2192 hfcmulti_rx(struct hfc_multi *hc, int ch) in hfcmulti_rx() argument
2203 bch = hc->chan[ch].bch; in hfcmulti_rx()
2207 } else if (hc->chan[ch].dch) { in hfcmulti_rx()
2208 dch = hc->chan[ch].dch; in hfcmulti_rx()
2217 if (test_bit(HFC_CHIP_B410P, &hc->chip) && in hfcmulti_rx()
2218 (hc->chan[ch].protocol == ISDN_P_B_RAW) && in hfcmulti_rx()
2219 (hc->chan[ch].slot_rx < 0) && in hfcmulti_rx()
2220 (hc->chan[ch].slot_tx < 0)) in hfcmulti_rx()
2221 HFC_outb_nodebug(hc, R_FIFO, 0x20 | (ch << 1) | 1); in hfcmulti_rx()
2223 HFC_outb_nodebug(hc, R_FIFO, (ch << 1) | 1); in hfcmulti_rx()
2224 HFC_wait_nodebug(hc); in hfcmulti_rx()
2227 if (hc->chan[ch].rx_off) { in hfcmulti_rx()
2234 f1 = HFC_inb_nodebug(hc, A_F1); in hfcmulti_rx()
2235 while (f1 != (temp = HFC_inb_nodebug(hc, A_F1))) { in hfcmulti_rx()
2239 __func__, hc->id + 1, temp, f1); in hfcmulti_rx()
2242 f2 = HFC_inb_nodebug(hc, A_F2); in hfcmulti_rx()
2244 z1 = HFC_inw_nodebug(hc, A_Z1) - hc->Zmin; in hfcmulti_rx()
2245 while (z1 != (temp = (HFC_inw_nodebug(hc, A_Z1) - hc->Zmin))) { in hfcmulti_rx()
2248 "%d!=%d\n", __func__, hc->id + 1, temp, z2); in hfcmulti_rx()
2251 z2 = HFC_inw_nodebug(hc, A_Z2) - hc->Zmin; in hfcmulti_rx()
2257 Zsize += hc->Zlen; in hfcmulti_rx()
2266 hc->id + 1, bch->nr, Zsize); in hfcmulti_rx()
2278 hc->id + 1); in hfcmulti_rx()
2285 hc->activity_rx |= 1 << hc->chan[ch].port; in hfcmulti_rx()
2292 "got=%d (again %d)\n", __func__, hc->id + 1, ch, in hfcmulti_rx()
2300 __func__, hc->id + 1); in hfcmulti_rx()
2302 HFC_outb_nodebug(hc, R_INC_RES_FIFO, V_RES_F); in hfcmulti_rx()
2303 HFC_wait_nodebug(hc); in hfcmulti_rx()
2307 hc->read_fifo(hc, skb_put(*sp, Zsize), Zsize); in hfcmulti_rx()
2311 HFC_outb_nodebug(hc, R_INC_RES_FIFO, V_INC_F); in hfcmulti_rx()
2312 HFC_wait_nodebug(hc); in hfcmulti_rx()
2318 "size\n", __func__, hc->id + 1); in hfcmulti_rx()
2349 __func__, hc->id + 1); in hfcmulti_rx()
2366 hc->read_fifo(hc, skb_put(*sp, Zsize), Zsize); in hfcmulti_rx()
2371 __func__, hc->id + 1, ch, Zsize, z1, z2); in hfcmulti_rx()
2373 recv_Bchannel(bch, hc->chan[ch].Zfill, false); in hfcmulti_rx()
2400 handle_timer_irq(struct hfc_multi *hc) in handle_timer_irq() argument
2407 if (hc->e1_resync) { in handle_timer_irq()
2410 if (hc->e1_resync & 1) { in handle_timer_irq()
2413 HFC_outb(hc, R_SYNC_CTRL, V_EXT_CLK_SYNC); in handle_timer_irq()
2415 if (test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) in handle_timer_irq()
2416 HFC_outb(hc, R_SYNC_OUT, V_SYNC_E1_RX); in handle_timer_irq()
2418 if (hc->e1_resync & 2) { in handle_timer_irq()
2421 HFC_outb(hc, R_SYNC_CTRL, V_SYNC_OFFS); in handle_timer_irq()
2423 if (hc->e1_resync & 4) { in handle_timer_irq()
2428 HFC_outb(hc, R_SYNC_CTRL, V_EXT_CLK_SYNC in handle_timer_irq()
2431 HFC_outb(hc, R_SYNC_OUT, 0); in handle_timer_irq()
2433 hc->e1_resync = 0; in handle_timer_irq()
2437 if (hc->ctype != HFC_TYPE_E1 || hc->e1_state == 1) in handle_timer_irq()
2439 if (hc->created[hc->chan[ch].port]) { in handle_timer_irq()
2440 hfcmulti_tx(hc, ch); in handle_timer_irq()
2442 hfcmulti_rx(hc, ch); in handle_timer_irq()
2443 if (hc->chan[ch].dch && in handle_timer_irq()
2444 hc->chan[ch].nt_timer > -1) { in handle_timer_irq()
2445 dch = hc->chan[ch].dch; in handle_timer_irq()
2446 if (!(--hc->chan[ch].nt_timer)) { in handle_timer_irq()
2460 if (hc->ctype == HFC_TYPE_E1 && hc->created[0]) { in handle_timer_irq()
2461 dch = hc->chan[hc->dnum[0]].dch; in handle_timer_irq()
2463 temp = HFC_inb_nodebug(hc, R_SYNC_STA) & V_SIG_LOS; in handle_timer_irq()
2464 hc->chan[hc->dnum[0]].los = temp; in handle_timer_irq()
2465 if (test_bit(HFC_CFG_REPORT_LOS, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2466 if (!temp && hc->chan[hc->dnum[0]].los) in handle_timer_irq()
2469 if (temp && !hc->chan[hc->dnum[0]].los) in handle_timer_irq()
2473 if (test_bit(HFC_CFG_REPORT_AIS, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2475 temp = HFC_inb_nodebug(hc, R_SYNC_STA) & V_AIS; in handle_timer_irq()
2476 if (!temp && hc->chan[hc->dnum[0]].ais) in handle_timer_irq()
2479 if (temp && !hc->chan[hc->dnum[0]].ais) in handle_timer_irq()
2482 hc->chan[hc->dnum[0]].ais = temp; in handle_timer_irq()
2484 if (test_bit(HFC_CFG_REPORT_SLIP, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2486 temp = HFC_inb_nodebug(hc, R_SLIP) & V_FOSLIP_RX; in handle_timer_irq()
2487 if (!temp && hc->chan[hc->dnum[0]].slip_rx) in handle_timer_irq()
2490 hc->chan[hc->dnum[0]].slip_rx = temp; in handle_timer_irq()
2491 temp = HFC_inb_nodebug(hc, R_SLIP) & V_FOSLIP_TX; in handle_timer_irq()
2492 if (!temp && hc->chan[hc->dnum[0]].slip_tx) in handle_timer_irq()
2495 hc->chan[hc->dnum[0]].slip_tx = temp; in handle_timer_irq()
2497 if (test_bit(HFC_CFG_REPORT_RDI, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2499 temp = HFC_inb_nodebug(hc, R_RX_SL0_0) & V_A; in handle_timer_irq()
2500 if (!temp && hc->chan[hc->dnum[0]].rdi) in handle_timer_irq()
2503 if (temp && !hc->chan[hc->dnum[0]].rdi) in handle_timer_irq()
2506 hc->chan[hc->dnum[0]].rdi = temp; in handle_timer_irq()
2508 temp = HFC_inb_nodebug(hc, R_JATT_DIR); in handle_timer_irq()
2509 switch (hc->chan[hc->dnum[0]].sync) { in handle_timer_irq()
2516 __func__, hc->id); in handle_timer_irq()
2517 HFC_outb(hc, R_RX_OFF, in handle_timer_irq()
2518 hc->chan[hc->dnum[0]].jitter | V_RX_INIT); in handle_timer_irq()
2519 HFC_outb(hc, R_TX_OFF, in handle_timer_irq()
2520 hc->chan[hc->dnum[0]].jitter | V_RX_INIT); in handle_timer_irq()
2521 hc->chan[hc->dnum[0]].sync = 1; in handle_timer_irq()
2531 __func__, hc->id); in handle_timer_irq()
2532 hc->chan[hc->dnum[0]].sync = 0; in handle_timer_irq()
2536 temp = HFC_inb_nodebug(hc, R_SYNC_STA); in handle_timer_irq()
2542 __func__, hc->id); in handle_timer_irq()
2543 hc->chan[hc->dnum[0]].sync = 2; in handle_timer_irq()
2552 __func__, hc->id); in handle_timer_irq()
2553 hc->chan[hc->dnum[0]].sync = 0; in handle_timer_irq()
2556 temp = HFC_inb_nodebug(hc, R_SYNC_STA); in handle_timer_irq()
2562 __func__, hc->id); in handle_timer_irq()
2563 hc->chan[hc->dnum[0]].sync = 1; in handle_timer_irq()
2569 if (test_bit(HFC_CHIP_WATCHDOG, &hc->chip)) in handle_timer_irq()
2570 hfcmulti_watchdog(hc); in handle_timer_irq()
2572 if (hc->leds) in handle_timer_irq()
2573 hfcmulti_leds(hc); in handle_timer_irq()
2577 ph_state_irq(struct hfc_multi *hc, u_char r_irq_statech) in ph_state_irq() argument
2586 if (hc->chan[ch].dch) { in ph_state_irq()
2587 dch = hc->chan[ch].dch; in ph_state_irq()
2589 HFC_outb_nodebug(hc, R_ST_SEL, in ph_state_irq()
2590 hc->chan[ch].port); in ph_state_irq()
2594 st_status = HFC_inb_nodebug(hc, A_ST_RD_STATE); in ph_state_irq()
2596 HFC_inb_nodebug(hc, A_ST_RD_STATE))) { in ph_state_irq()
2606 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) && in ph_state_irq()
2609 hc->syncronized |= in ph_state_irq()
2610 (1 << hc->chan[ch].port); in ph_state_irq()
2612 hc->syncronized &= in ph_state_irq()
2613 ~(1 << hc->chan[ch].port); in ph_state_irq()
2621 HFC_outb_nodebug(hc, R_FIFO, in ph_state_irq()
2623 HFC_wait_nodebug(hc); in ph_state_irq()
2624 HFC_outb_nodebug(hc, in ph_state_irq()
2626 HFC_wait_nodebug(hc); in ph_state_irq()
2634 hc->chan[ch].port); in ph_state_irq()
2639 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) in ph_state_irq()
2640 plxsd_checksync(hc, 0); in ph_state_irq()
2644 fifo_irq(struct hfc_multi *hc, int block) in fifo_irq() argument
2651 r_irq_fifo_bl = HFC_inb_nodebug(hc, R_IRQ_FIFO_BL0 + block); in fifo_irq()
2655 dch = hc->chan[ch].dch; in fifo_irq()
2656 bch = hc->chan[ch].bch; in fifo_irq()
2657 if (((!dch) && (!bch)) || (!hc->created[hc->chan[ch].port])) { in fifo_irq()
2663 hfcmulti_tx(hc, ch); in fifo_irq()
2665 HFC_outb_nodebug(hc, R_FIFO, 0); in fifo_irq()
2666 HFC_wait_nodebug(hc); in fifo_irq()
2670 hfcmulti_tx(hc, ch); in fifo_irq()
2672 HFC_outb_nodebug(hc, R_FIFO, 0); in fifo_irq()
2673 HFC_wait_nodebug(hc); in fifo_irq()
2678 hfcmulti_rx(hc, ch); in fifo_irq()
2682 hfcmulti_rx(hc, ch); in fifo_irq()
2698 struct hfc_multi *hc = dev_id; in hfcmulti_interrupt() local
2707 if (!hc) { in hfcmulti_interrupt()
2712 spin_lock(&hc->lock); in hfcmulti_interrupt()
2717 "card %d, this is no bug.\n", hc->id + 1, irqsem); in hfcmulti_interrupt()
2718 irqsem = hc->id + 1; in hfcmulti_interrupt()
2721 if (hc->immap->im_cpm.cp_pbdat & hc->pb_irqmsk) in hfcmulti_interrupt()
2724 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_interrupt()
2726 plx_acc = hc->plx_membase + PLX_INTCSR; in hfcmulti_interrupt()
2733 status = HFC_inb_nodebug(hc, R_STATUS); in hfcmulti_interrupt()
2734 r_irq_statech = HFC_inb_nodebug(hc, R_IRQ_STATECH); in hfcmulti_interrupt()
2761 hc->irqcnt++; in hfcmulti_interrupt()
2763 if (hc->ctype != HFC_TYPE_E1) in hfcmulti_interrupt()
2764 ph_state_irq(hc, r_irq_statech); in hfcmulti_interrupt()
2770 HFC_outb(hc, R_INC_RES_FIFO, V_RES_LOST); /* clear irq! */ in hfcmulti_interrupt()
2774 r_irq_misc = HFC_inb_nodebug(hc, R_IRQ_MISC); in hfcmulti_interrupt()
2775 r_irq_misc &= hc->hw.r_irqmsk_misc; /* ignore disabled irqs */ in hfcmulti_interrupt()
2777 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_interrupt()
2779 dch = hc->chan[hc->dnum[0]].dch; in hfcmulti_interrupt()
2780 e1_syncsta = HFC_inb_nodebug(hc, R_SYNC_STA); in hfcmulti_interrupt()
2781 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) in hfcmulti_interrupt()
2782 && hc->e1_getclock) { in hfcmulti_interrupt()
2784 hc->syncronized = 1; in hfcmulti_interrupt()
2786 hc->syncronized = 0; in hfcmulti_interrupt()
2789 temp = HFC_inb_nodebug(hc, R_E1_RD_STA); in hfcmulti_interrupt()
2791 HFC_inb_nodebug(hc, R_E1_RD_STA))) { in hfcmulti_interrupt()
2802 __func__, hc->id, temp & 0x7); in hfcmulti_interrupt()
2803 for (i = 0; i < hc->ports; i++) { in hfcmulti_interrupt()
2804 dch = hc->chan[hc->dnum[i]].dch; in hfcmulti_interrupt()
2809 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) in hfcmulti_interrupt()
2810 plxsd_checksync(hc, 0); in hfcmulti_interrupt()
2814 if (hc->iclock_on) in hfcmulti_interrupt()
2815 mISDN_clock_update(hc->iclock, poll, NULL); in hfcmulti_interrupt()
2816 handle_timer_irq(hc); in hfcmulti_interrupt()
2820 hfcmulti_dtmf(hc); in hfcmulti_interrupt()
2832 r_irq_oview = HFC_inb_nodebug(hc, R_IRQ_OVIEW); in hfcmulti_interrupt()
2835 fifo_irq(hc, i); in hfcmulti_interrupt()
2842 spin_unlock(&hc->lock); in hfcmulti_interrupt()
2849 spin_unlock(&hc->lock); in hfcmulti_interrupt()
2859 hfcmulti_dbusy_timer(struct hfc_multi *hc) in hfcmulti_dbusy_timer() argument
2874 mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx, in mode_hfcmulti() argument
2883 oslot_tx = hc->chan[ch].slot_tx; in mode_hfcmulti()
2884 oslot_rx = hc->chan[ch].slot_rx; in mode_hfcmulti()
2885 conf = hc->chan[ch].conf; in mode_hfcmulti()
2891 __func__, hc->id, ch, protocol, oslot_tx, slot_tx, in mode_hfcmulti()
2899 if (hc->slot_owner[oslot_tx << 1] == ch) { in mode_hfcmulti()
2900 HFC_outb(hc, R_SLOT, oslot_tx << 1); in mode_hfcmulti()
2901 HFC_outb(hc, A_SL_CFG, 0); in mode_hfcmulti()
2902 if (hc->ctype != HFC_TYPE_XHFC) in mode_hfcmulti()
2903 HFC_outb(hc, A_CONF, 0); in mode_hfcmulti()
2904 hc->slot_owner[oslot_tx << 1] = -1; in mode_hfcmulti()
2910 __func__, hc->slot_owner[oslot_tx << 1]); in mode_hfcmulti()
2920 if (hc->slot_owner[(oslot_rx << 1) | 1] == ch) { in mode_hfcmulti()
2921 HFC_outb(hc, R_SLOT, (oslot_rx << 1) | V_SL_DIR); in mode_hfcmulti()
2922 HFC_outb(hc, A_SL_CFG, 0); in mode_hfcmulti()
2923 hc->slot_owner[(oslot_rx << 1) | 1] = -1; in mode_hfcmulti()
2930 hc->slot_owner[(oslot_rx << 1) | 1]); in mode_hfcmulti()
2937 hc->chan[ch].slot_tx = -1; in mode_hfcmulti()
2938 hc->chan[ch].bank_tx = 0; in mode_hfcmulti()
2941 if (hc->chan[ch].txpending) in mode_hfcmulti()
2954 HFC_outb(hc, R_SLOT, slot_tx << 1); in mode_hfcmulti()
2955 HFC_outb(hc, A_SL_CFG, (ch << 1) | routing); in mode_hfcmulti()
2956 if (hc->ctype != HFC_TYPE_XHFC) in mode_hfcmulti()
2957 HFC_outb(hc, A_CONF, in mode_hfcmulti()
2959 hc->slot_owner[slot_tx << 1] = ch; in mode_hfcmulti()
2960 hc->chan[ch].slot_tx = slot_tx; in mode_hfcmulti()
2961 hc->chan[ch].bank_tx = bank_tx; in mode_hfcmulti()
2966 hc->chan[ch].slot_rx = -1; in mode_hfcmulti()
2967 hc->chan[ch].bank_rx = 0; in mode_hfcmulti()
2970 if (hc->chan[ch].txpending) in mode_hfcmulti()
2983 HFC_outb(hc, R_SLOT, (slot_rx << 1) | V_SL_DIR); in mode_hfcmulti()
2984 HFC_outb(hc, A_SL_CFG, (ch << 1) | V_CH_DIR | routing); in mode_hfcmulti()
2985 hc->slot_owner[(slot_rx << 1) | 1] = ch; in mode_hfcmulti()
2986 hc->chan[ch].slot_rx = slot_rx; in mode_hfcmulti()
2987 hc->chan[ch].bank_rx = bank_rx; in mode_hfcmulti()
2993 HFC_outb(hc, R_FIFO, ch << 1); in mode_hfcmulti()
2994 HFC_wait(hc); in mode_hfcmulti()
2995 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x00 | V_IFF); in mode_hfcmulti()
2996 HFC_outb(hc, A_SUBCH_CFG, 0); in mode_hfcmulti()
2997 HFC_outb(hc, A_IRQ_MSK, 0); in mode_hfcmulti()
2998 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); in mode_hfcmulti()
2999 HFC_wait(hc); in mode_hfcmulti()
3001 HFC_outb(hc, R_FIFO, (ch << 1) | 1); in mode_hfcmulti()
3002 HFC_wait(hc); in mode_hfcmulti()
3003 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x00); in mode_hfcmulti()
3004 HFC_outb(hc, A_SUBCH_CFG, 0); in mode_hfcmulti()
3005 HFC_outb(hc, A_IRQ_MSK, 0); in mode_hfcmulti()
3006 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); in mode_hfcmulti()
3007 HFC_wait(hc); in mode_hfcmulti()
3008 if (hc->chan[ch].bch && hc->ctype != HFC_TYPE_E1) { in mode_hfcmulti()
3009 hc->hw.a_st_ctrl0[hc->chan[ch].port] &= in mode_hfcmulti()
3011 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); in mode_hfcmulti()
3014 HFC_outb(hc, A_ST_CTRL0, in mode_hfcmulti()
3015 hc->hw.a_st_ctrl0[hc->chan[ch].port]); in mode_hfcmulti()
3017 if (hc->chan[ch].bch) { in mode_hfcmulti()
3018 test_and_clear_bit(FLG_HDLC, &hc->chan[ch].bch->Flags); in mode_hfcmulti()
3020 &hc->chan[ch].bch->Flags); in mode_hfcmulti()
3025 if (test_bit(HFC_CHIP_B410P, &hc->chip) && in mode_hfcmulti()
3026 (hc->chan[ch].slot_rx < 0) && in mode_hfcmulti()
3027 (hc->chan[ch].slot_tx < 0)) { in mode_hfcmulti()
3035 vpm_out(hc, ch, ((ch / 4) * 8) + in mode_hfcmulti()
3039 HFC_outb(hc, R_FIFO, (ch << 1)); in mode_hfcmulti()
3040 HFC_wait(hc); in mode_hfcmulti()
3041 HFC_outb(hc, A_CON_HDLC, 0xc0 | V_HDLC_TRP | V_IFF); in mode_hfcmulti()
3042 HFC_outb(hc, R_SLOT, (((ch / 4) * 8) + in mode_hfcmulti()
3044 HFC_outb(hc, A_SL_CFG, 0x80 | (ch << 1)); in mode_hfcmulti()
3047 HFC_outb(hc, R_FIFO, 0x20 | (ch << 1) | 1); in mode_hfcmulti()
3048 HFC_wait(hc); in mode_hfcmulti()
3049 HFC_outb(hc, A_CON_HDLC, 0x20 | V_HDLC_TRP | V_IFF); in mode_hfcmulti()
3050 HFC_outb(hc, A_SUBCH_CFG, 0); in mode_hfcmulti()
3051 HFC_outb(hc, A_IRQ_MSK, 0); in mode_hfcmulti()
3052 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3053 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); in mode_hfcmulti()
3054 HFC_wait(hc); in mode_hfcmulti()
3056 HFC_outb(hc, R_SLOT, ((((ch / 4) * 8) + in mode_hfcmulti()
3058 HFC_outb(hc, A_SL_CFG, 0x80 | 0x20 | (ch << 1) | 1); in mode_hfcmulti()
3062 HFC_outb(hc, R_FIFO, (ch << 1) | 1); in mode_hfcmulti()
3063 HFC_wait(hc); in mode_hfcmulti()
3064 HFC_outb(hc, A_CON_HDLC, 0xc0 | V_HDLC_TRP | V_IFF); in mode_hfcmulti()
3065 HFC_outb(hc, R_SLOT, ((((ch / 4) * 8) + in mode_hfcmulti()
3067 HFC_outb(hc, A_SL_CFG, 0x80 | 0x40 | (ch << 1) | 1); in mode_hfcmulti()
3070 HFC_outb(hc, R_FIFO, 0x20 | (ch << 1)); in mode_hfcmulti()
3071 HFC_wait(hc); in mode_hfcmulti()
3072 HFC_outb(hc, A_CON_HDLC, 0x20 | V_HDLC_TRP | V_IFF); in mode_hfcmulti()
3073 HFC_outb(hc, A_SUBCH_CFG, 0); in mode_hfcmulti()
3074 HFC_outb(hc, A_IRQ_MSK, 0); in mode_hfcmulti()
3075 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3076 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); in mode_hfcmulti()
3077 HFC_wait(hc); in mode_hfcmulti()
3080 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence); in mode_hfcmulti()
3081 HFC_outb(hc, R_SLOT, (((ch / 4) * 8) + in mode_hfcmulti()
3083 HFC_outb(hc, A_SL_CFG, 0x80 | 0x20 | (ch << 1)); in mode_hfcmulti()
3086 HFC_outb(hc, R_FIFO, ch << 1); in mode_hfcmulti()
3087 HFC_wait(hc); in mode_hfcmulti()
3088 if (hc->ctype == HFC_TYPE_XHFC) in mode_hfcmulti()
3089 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x07 << 2 | in mode_hfcmulti()
3093 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x00 | in mode_hfcmulti()
3095 HFC_outb(hc, A_SUBCH_CFG, 0); in mode_hfcmulti()
3096 HFC_outb(hc, A_IRQ_MSK, 0); in mode_hfcmulti()
3097 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3098 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); in mode_hfcmulti()
3099 HFC_wait(hc); in mode_hfcmulti()
3102 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence); in mode_hfcmulti()
3104 HFC_outb(hc, R_FIFO, (ch << 1) | 1); in mode_hfcmulti()
3105 HFC_wait(hc); in mode_hfcmulti()
3106 if (hc->ctype == HFC_TYPE_XHFC) in mode_hfcmulti()
3107 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x07 << 2 | in mode_hfcmulti()
3111 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x00 | in mode_hfcmulti()
3113 HFC_outb(hc, A_SUBCH_CFG, 0); in mode_hfcmulti()
3114 HFC_outb(hc, A_IRQ_MSK, 0); in mode_hfcmulti()
3115 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3116 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); in mode_hfcmulti()
3117 HFC_wait(hc); in mode_hfcmulti()
3120 if (hc->ctype != HFC_TYPE_E1) { in mode_hfcmulti()
3121 hc->hw.a_st_ctrl0[hc->chan[ch].port] |= in mode_hfcmulti()
3123 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); in mode_hfcmulti()
3126 HFC_outb(hc, A_ST_CTRL0, in mode_hfcmulti()
3127 hc->hw.a_st_ctrl0[hc->chan[ch].port]); in mode_hfcmulti()
3129 if (hc->chan[ch].bch) in mode_hfcmulti()
3131 &hc->chan[ch].bch->Flags); in mode_hfcmulti()
3139 HFC_outb(hc, R_FIFO, ch << 1); in mode_hfcmulti()
3140 HFC_wait(hc); in mode_hfcmulti()
3141 if (hc->ctype == HFC_TYPE_E1 || hc->chan[ch].bch) { in mode_hfcmulti()
3143 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x04); in mode_hfcmulti()
3144 HFC_outb(hc, A_SUBCH_CFG, 0); in mode_hfcmulti()
3147 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x04 | V_IFF); in mode_hfcmulti()
3148 HFC_outb(hc, A_SUBCH_CFG, 2); in mode_hfcmulti()
3150 HFC_outb(hc, A_IRQ_MSK, V_IRQ); in mode_hfcmulti()
3151 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); in mode_hfcmulti()
3152 HFC_wait(hc); in mode_hfcmulti()
3154 HFC_outb(hc, R_FIFO, (ch << 1) | 1); in mode_hfcmulti()
3155 HFC_wait(hc); in mode_hfcmulti()
3156 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x04); in mode_hfcmulti()
3157 if (hc->ctype == HFC_TYPE_E1 || hc->chan[ch].bch) in mode_hfcmulti()
3158 HFC_outb(hc, A_SUBCH_CFG, 0); /* full 8 bits */ in mode_hfcmulti()
3160 HFC_outb(hc, A_SUBCH_CFG, 2); /* 2 bits dchannel */ in mode_hfcmulti()
3161 HFC_outb(hc, A_IRQ_MSK, V_IRQ); in mode_hfcmulti()
3162 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); in mode_hfcmulti()
3163 HFC_wait(hc); in mode_hfcmulti()
3164 if (hc->chan[ch].bch) { in mode_hfcmulti()
3165 test_and_set_bit(FLG_HDLC, &hc->chan[ch].bch->Flags); in mode_hfcmulti()
3166 if (hc->ctype != HFC_TYPE_E1) { in mode_hfcmulti()
3167 hc->hw.a_st_ctrl0[hc->chan[ch].port] |= in mode_hfcmulti()
3169 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); in mode_hfcmulti()
3172 HFC_outb(hc, A_ST_CTRL0, in mode_hfcmulti()
3173 hc->hw.a_st_ctrl0[hc->chan[ch].port]); in mode_hfcmulti()
3180 hc->chan[ch].protocol = ISDN_P_NONE; in mode_hfcmulti()
3183 hc->chan[ch].protocol = protocol; in mode_hfcmulti()
3193 hfcmulti_pcm(struct hfc_multi *hc, int ch, int slot_tx, int bank_tx, in hfcmulti_pcm() argument
3198 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, -1, 0, -1, 0); in hfcmulti_pcm()
3203 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, slot_tx, bank_tx, in hfcmulti_pcm()
3212 hfcmulti_conf(struct hfc_multi *hc, int ch, int num) in hfcmulti_conf() argument
3215 hc->chan[ch].conf = num; in hfcmulti_conf()
3217 hc->chan[ch].conf = -1; in hfcmulti_conf()
3218 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, hc->chan[ch].slot_tx, in hfcmulti_conf()
3219 hc->chan[ch].bank_tx, hc->chan[ch].slot_rx, in hfcmulti_conf()
3220 hc->chan[ch].bank_rx); in hfcmulti_conf()
3236 struct hfc_multi *hc = dch->hw; in hfcm_l1callback() local
3245 spin_lock_irqsave(&hc->lock, flags); in hfcm_l1callback()
3246 if (hc->ctype == HFC_TYPE_E1) { in hfcm_l1callback()
3252 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); in hfcm_l1callback()
3255 HFC_outb(hc, A_ST_WR_STATE, V_ST_LD_STA | 3); /* F3 */ in hfcm_l1callback()
3257 HFC_outb(hc, A_ST_WR_STATE, 3); in hfcm_l1callback()
3258 HFC_outb(hc, A_ST_WR_STATE, 3 | (V_ST_ACT * 3)); in hfcm_l1callback()
3261 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_l1callback()
3266 spin_lock_irqsave(&hc->lock, flags); in hfcm_l1callback()
3267 if (hc->ctype == HFC_TYPE_E1) { in hfcm_l1callback()
3273 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); in hfcm_l1callback()
3276 HFC_outb(hc, A_ST_WR_STATE, V_ST_ACT * 2); in hfcm_l1callback()
3278 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcm_l1callback()
3279 hc->syncronized &= in hfcm_l1callback()
3280 ~(1 << hc->chan[dch->slot].port); in hfcm_l1callback()
3281 plxsd_checksync(hc, 0); in hfcm_l1callback()
3297 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_l1callback()
3300 spin_lock_irqsave(&hc->lock, flags); in hfcm_l1callback()
3301 if (hc->ctype == HFC_TYPE_E1) { in hfcm_l1callback()
3307 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); in hfcm_l1callback()
3310 HFC_outb(hc, A_ST_WR_STATE, 3 | 0x10); /* activate */ in hfcm_l1callback()
3312 HFC_outb(hc, A_ST_WR_STATE, 3); /* activate */ in hfcm_l1callback()
3314 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_l1callback()
3344 struct hfc_multi *hc = dch->hw; in handle_dmsg() local
3354 spin_lock_irqsave(&hc->lock, flags); in handle_dmsg()
3358 hfcmulti_tx(hc, dch->slot); in handle_dmsg()
3361 HFC_outb(hc, R_FIFO, 0); in handle_dmsg()
3362 HFC_wait(hc); in handle_dmsg()
3363 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3366 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3370 spin_lock_irqsave(&hc->lock, flags); in handle_dmsg()
3375 __func__, hc->chan[dch->slot].port, in handle_dmsg()
3376 hc->ports - 1); in handle_dmsg()
3378 if (hc->ctype == HFC_TYPE_E1) { in handle_dmsg()
3385 HFC_outb(hc, R_ST_SEL, in handle_dmsg()
3386 hc->chan[dch->slot].port); in handle_dmsg()
3389 HFC_outb(hc, A_ST_WR_STATE, V_ST_LD_STA | 1); in handle_dmsg()
3392 HFC_outb(hc, A_ST_WR_STATE, 1); in handle_dmsg()
3393 HFC_outb(hc, A_ST_WR_STATE, 1 | in handle_dmsg()
3397 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3404 spin_lock_irqsave(&hc->lock, flags); in handle_dmsg()
3408 __func__, hc->chan[dch->slot].port, in handle_dmsg()
3409 hc->ports - 1); in handle_dmsg()
3411 if (hc->ctype == HFC_TYPE_E1) { in handle_dmsg()
3417 HFC_outb(hc, R_ST_SEL, in handle_dmsg()
3418 hc->chan[dch->slot].port); in handle_dmsg()
3421 HFC_outb(hc, A_ST_WR_STATE, V_ST_ACT * 2); in handle_dmsg()
3440 dchannel_sched_event(&hc->dch, D_CLEARBUSY); in handle_dmsg()
3443 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3456 struct hfc_multi *hc = bch->hw; in deactivate_bchannel() local
3459 spin_lock_irqsave(&hc->lock, flags); in deactivate_bchannel()
3461 hc->chan[bch->slot].coeff_count = 0; in deactivate_bchannel()
3462 hc->chan[bch->slot].rx_off = 0; in deactivate_bchannel()
3463 hc->chan[bch->slot].conf = -1; in deactivate_bchannel()
3464 mode_hfcmulti(hc, bch->slot, ISDN_P_NONE, -1, 0, -1, 0); in deactivate_bchannel()
3465 spin_unlock_irqrestore(&hc->lock, flags); in deactivate_bchannel()
3472 struct hfc_multi *hc = bch->hw; in handle_bmsg() local
3481 spin_lock_irqsave(&hc->lock, flags); in handle_bmsg()
3484 hfcmulti_tx(hc, bch->slot); in handle_bmsg()
3487 HFC_outb_nodebug(hc, R_FIFO, 0); in handle_bmsg()
3488 HFC_wait_nodebug(hc); in handle_bmsg()
3490 spin_unlock_irqrestore(&hc->lock, flags); in handle_bmsg()
3496 spin_lock_irqsave(&hc->lock, flags); in handle_bmsg()
3499 hc->chan[bch->slot].txpending = 0; in handle_bmsg()
3500 ret = mode_hfcmulti(hc, bch->slot, in handle_bmsg()
3502 hc->chan[bch->slot].slot_tx, in handle_bmsg()
3503 hc->chan[bch->slot].bank_tx, in handle_bmsg()
3504 hc->chan[bch->slot].slot_rx, in handle_bmsg()
3505 hc->chan[bch->slot].bank_rx); in handle_bmsg()
3507 if (ch->protocol == ISDN_P_B_RAW && !hc->dtmf in handle_bmsg()
3508 && test_bit(HFC_CHIP_DTMF, &hc->chip)) { in handle_bmsg()
3510 hc->dtmf = 1; in handle_bmsg()
3515 HFC_outb(hc, R_DTMF, hc->hw.r_dtmf | in handle_bmsg()
3521 spin_unlock_irqrestore(&hc->lock, flags); in handle_bmsg()
3527 spin_lock_irqsave(&hc->lock, flags); in handle_bmsg()
3548 spin_unlock_irqrestore(&hc->lock, flags); in handle_bmsg()
3571 struct hfc_multi *hc = bch->hw; in channel_bctrl() local
3585 hc->chan[bch->slot].rx_off = !!cq->p1; in channel_bctrl()
3586 if (!hc->chan[bch->slot].rx_off) { in channel_bctrl()
3588 HFC_outb_nodebug(hc, R_FIFO, (bch->slot << 1) | 1); in channel_bctrl()
3589 HFC_wait_nodebug(hc); in channel_bctrl()
3590 HFC_outb_nodebug(hc, R_INC_RES_FIFO, V_RES_F); in channel_bctrl()
3591 HFC_wait_nodebug(hc); in channel_bctrl()
3595 __func__, bch->nr, hc->chan[bch->slot].rx_off); in channel_bctrl()
3599 hc->silence = bch->fill[0]; in channel_bctrl()
3600 memset(hc->silence_data, hc->silence, sizeof(hc->silence_data)); in channel_bctrl()
3607 features->hfc_id = hc->id; in channel_bctrl()
3608 if (test_bit(HFC_CHIP_DTMF, &hc->chip)) in channel_bctrl()
3610 if (test_bit(HFC_CHIP_CONF, &hc->chip)) in channel_bctrl()
3613 if (test_bit(HFC_CHIP_B410P, &hc->chip)) { in channel_bctrl()
3616 features->pcm_id = hc->pcm; in channel_bctrl()
3617 features->pcm_slots = hc->slots; in channel_bctrl()
3632 if (slot_tx < hc->slots && bank_tx <= 2 && in channel_bctrl()
3633 slot_rx < hc->slots && bank_rx <= 2) in channel_bctrl()
3634 hfcmulti_pcm(hc, bch->slot, in channel_bctrl()
3649 hfcmulti_pcm(hc, bch->slot, -1, 0, -1, 0); in channel_bctrl()
3657 hfcmulti_conf(hc, bch->slot, num); in channel_bctrl()
3668 hfcmulti_conf(hc, bch->slot, -1); in channel_bctrl()
3673 if (test_bit(HFC_CHIP_B410P, &hc->chip)) in channel_bctrl()
3674 vpm_echocan_on(hc, bch->slot, cq->p1); in channel_bctrl()
3683 if (test_bit(HFC_CHIP_B410P, &hc->chip)) in channel_bctrl()
3684 vpm_echocan_off(hc, bch->slot); in channel_bctrl()
3699 struct hfc_multi *hc = bch->hw; in hfcm_bctrl() local
3716 spin_lock_irqsave(&hc->lock, flags); in hfcm_bctrl()
3718 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_bctrl()
3735 struct hfc_multi *hc; in ph_state_change() local
3742 hc = dch->hw; in ph_state_change()
3745 if (hc->ctype == HFC_TYPE_E1) { in ph_state_change()
3750 __func__, hc->id, dch->state); in ph_state_change()
3755 __func__, hc->id, dch->state); in ph_state_change()
3759 if (hc->e1_state != 1) { in ph_state_change()
3762 HFC_outb_nodebug(hc, R_FIFO, in ph_state_change()
3764 HFC_wait_nodebug(hc); in ph_state_change()
3765 HFC_outb_nodebug(hc, R_INC_RES_FIFO, in ph_state_change()
3767 HFC_wait_nodebug(hc); in ph_state_change()
3776 if (hc->e1_state != 1) in ph_state_change()
3782 hc->e1_state = dch->state; in ph_state_change()
3813 if (hc->chan[ch].nt_timer == 0) { in ph_state_change()
3814 hc->chan[ch].nt_timer = -1; in ph_state_change()
3815 HFC_outb(hc, R_ST_SEL, in ph_state_change()
3816 hc->chan[ch].port); in ph_state_change()
3819 HFC_outb(hc, A_ST_WR_STATE, 4 | in ph_state_change()
3822 HFC_outb(hc, A_ST_WR_STATE, 4); in ph_state_change()
3826 hc->chan[ch].nt_timer = in ph_state_change()
3828 HFC_outb(hc, R_ST_SEL, in ph_state_change()
3829 hc->chan[ch].port); in ph_state_change()
3833 HFC_outb(hc, A_ST_WR_STATE, 2 | in ph_state_change()
3838 hc->chan[ch].nt_timer = -1; in ph_state_change()
3844 hc->chan[ch].nt_timer = -1; in ph_state_change()
3847 hc->chan[ch].nt_timer = -1; in ph_state_change()
3864 struct hfc_multi *hc = dch->hw; in hfcmulti_initmode() local
3872 pt = hc->chan[i].port; in hfcmulti_initmode()
3873 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_initmode()
3875 hc->chan[hc->dnum[pt]].slot_tx = -1; in hfcmulti_initmode()
3876 hc->chan[hc->dnum[pt]].slot_rx = -1; in hfcmulti_initmode()
3877 hc->chan[hc->dnum[pt]].conf = -1; in hfcmulti_initmode()
3878 if (hc->dnum[pt]) { in hfcmulti_initmode()
3879 mode_hfcmulti(hc, dch->slot, dch->dev.D.protocol, in hfcmulti_initmode()
3886 if (!((1 << i) & hc->bmask[pt])) /* skip unused chan */ in hfcmulti_initmode()
3888 hc->chan[i].slot_tx = -1; in hfcmulti_initmode()
3889 hc->chan[i].slot_rx = -1; in hfcmulti_initmode()
3890 hc->chan[i].conf = -1; in hfcmulti_initmode()
3891 mode_hfcmulti(hc, i, ISDN_P_NONE, -1, 0, -1, 0); in hfcmulti_initmode()
3894 if (hc->ctype == HFC_TYPE_E1 && pt == 0) { in hfcmulti_initmode()
3896 dch = hc->chan[hc->dnum[0]].dch; in hfcmulti_initmode()
3897 if (test_bit(HFC_CFG_REPORT_LOS, &hc->chan[hc->dnum[0]].cfg)) { in hfcmulti_initmode()
3898 HFC_outb(hc, R_LOS0, 255); /* 2 ms */ in hfcmulti_initmode()
3899 HFC_outb(hc, R_LOS1, 255); /* 512 ms */ in hfcmulti_initmode()
3901 if (test_bit(HFC_CFG_OPTICAL, &hc->chan[hc->dnum[0]].cfg)) { in hfcmulti_initmode()
3902 HFC_outb(hc, R_RX0, 0); in hfcmulti_initmode()
3903 hc->hw.r_tx0 = 0 | V_OUT_EN; in hfcmulti_initmode()
3905 HFC_outb(hc, R_RX0, 1); in hfcmulti_initmode()
3906 hc->hw.r_tx0 = 1 | V_OUT_EN; in hfcmulti_initmode()
3908 hc->hw.r_tx1 = V_ATX | V_NTRI; in hfcmulti_initmode()
3909 HFC_outb(hc, R_TX0, hc->hw.r_tx0); in hfcmulti_initmode()
3910 HFC_outb(hc, R_TX1, hc->hw.r_tx1); in hfcmulti_initmode()
3911 HFC_outb(hc, R_TX_FR0, 0x00); in hfcmulti_initmode()
3912 HFC_outb(hc, R_TX_FR1, 0xf8); in hfcmulti_initmode()
3914 if (test_bit(HFC_CFG_CRC4, &hc->chan[hc->dnum[0]].cfg)) in hfcmulti_initmode()
3915 HFC_outb(hc, R_TX_FR2, V_TX_MF | V_TX_E | V_NEG_E); in hfcmulti_initmode()
3917 HFC_outb(hc, R_RX_FR0, V_AUTO_RESYNC | V_AUTO_RECO | 0); in hfcmulti_initmode()
3919 if (test_bit(HFC_CFG_CRC4, &hc->chan[hc->dnum[0]].cfg)) in hfcmulti_initmode()
3920 HFC_outb(hc, R_RX_FR1, V_RX_MF | V_RX_MF_SYNC); in hfcmulti_initmode()
3927 hc->e1_getclock = 0; in hfcmulti_initmode()
3933 hc->e1_getclock = 1; in hfcmulti_initmode()
3935 if (test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) in hfcmulti_initmode()
3936 HFC_outb(hc, R_SYNC_OUT, V_SYNC_E1_RX); in hfcmulti_initmode()
3938 HFC_outb(hc, R_SYNC_OUT, 0); in hfcmulti_initmode()
3939 if (test_bit(HFC_CHIP_E1CLOCK_GET, &hc->chip)) in hfcmulti_initmode()
3940 hc->e1_getclock = 1; in hfcmulti_initmode()
3941 if (test_bit(HFC_CHIP_E1CLOCK_PUT, &hc->chip)) in hfcmulti_initmode()
3942 hc->e1_getclock = 0; in hfcmulti_initmode()
3943 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in hfcmulti_initmode()
3949 HFC_outb(hc, R_SYNC_CTRL, V_EXT_CLK_SYNC | V_PCM_SYNC); in hfcmulti_initmode()
3951 if (hc->e1_getclock) { in hfcmulti_initmode()
3957 HFC_outb(hc, R_SYNC_CTRL, V_SYNC_OFFS); in hfcmulti_initmode()
3965 HFC_outb(hc, R_SYNC_CTRL, V_EXT_CLK_SYNC | in hfcmulti_initmode()
3967 HFC_outb(hc, R_SYNC_OUT, 0); in hfcmulti_initmode()
3970 HFC_outb(hc, R_JATT_ATT, 0x9c); /* undoc register */ in hfcmulti_initmode()
3971 HFC_outb(hc, R_PWM_MD, V_PWM0_MD); in hfcmulti_initmode()
3972 HFC_outb(hc, R_PWM0, 0x50); in hfcmulti_initmode()
3973 HFC_outb(hc, R_PWM1, 0xff); in hfcmulti_initmode()
3975 HFC_outb(hc, R_E1_WR_STA, r_e1_wr_sta | V_E1_LD_STA); in hfcmulti_initmode()
3977 HFC_outb(hc, R_E1_WR_STA, r_e1_wr_sta); in hfcmulti_initmode()
3978 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_initmode()
3979 hc->syncronized = 0; in hfcmulti_initmode()
3980 plxsd_checksync(hc, 0); in hfcmulti_initmode()
3983 if (hc->ctype != HFC_TYPE_E1) { in hfcmulti_initmode()
3985 hc->chan[i].slot_tx = -1; in hfcmulti_initmode()
3986 hc->chan[i].slot_rx = -1; in hfcmulti_initmode()
3987 hc->chan[i].conf = -1; in hfcmulti_initmode()
3988 mode_hfcmulti(hc, i, dch->dev.D.protocol, -1, 0, -1, 0); in hfcmulti_initmode()
3992 hc->chan[i - 2].slot_tx = -1; in hfcmulti_initmode()
3993 hc->chan[i - 2].slot_rx = -1; in hfcmulti_initmode()
3994 hc->chan[i - 2].conf = -1; in hfcmulti_initmode()
3995 mode_hfcmulti(hc, i - 2, ISDN_P_NONE, -1, 0, -1, 0); in hfcmulti_initmode()
3996 hc->chan[i - 1].slot_tx = -1; in hfcmulti_initmode()
3997 hc->chan[i - 1].slot_rx = -1; in hfcmulti_initmode()
3998 hc->chan[i - 1].conf = -1; in hfcmulti_initmode()
3999 mode_hfcmulti(hc, i - 1, ISDN_P_NONE, -1, 0, -1, 0); in hfcmulti_initmode()
4001 HFC_outb(hc, R_ST_SEL, pt); in hfcmulti_initmode()
4010 HFC_outb(hc, A_ST_CLK_DLY, clockdelay_nt); in hfcmulti_initmode()
4012 hc->hw.a_st_ctrl0[pt] = V_ST_MD; in hfcmulti_initmode()
4019 HFC_outb(hc, A_ST_CLK_DLY, clockdelay_te); in hfcmulti_initmode()
4021 hc->hw.a_st_ctrl0[pt] = 0; in hfcmulti_initmode()
4023 if (!test_bit(HFC_CFG_NONCAP_TX, &hc->chan[i].cfg)) in hfcmulti_initmode()
4024 hc->hw.a_st_ctrl0[pt] |= V_TX_LI; in hfcmulti_initmode()
4025 if (hc->ctype == HFC_TYPE_XHFC) { in hfcmulti_initmode()
4026 hc->hw.a_st_ctrl0[pt] |= 0x40 /* V_ST_PU_CTRL */; in hfcmulti_initmode()
4027 HFC_outb(hc, 0x35 /* A_ST_CTRL3 */, in hfcmulti_initmode()
4031 HFC_outb(hc, A_ST_CTRL0, hc->hw.a_st_ctrl0[pt]); in hfcmulti_initmode()
4034 test_bit(HFC_CFG_DIS_ECHANNEL, &hc->chan[i].cfg)) in hfcmulti_initmode()
4035 HFC_outb(hc, A_ST_CTRL1, V_E_IGNO); in hfcmulti_initmode()
4037 HFC_outb(hc, A_ST_CTRL1, 0); in hfcmulti_initmode()
4039 HFC_outb(hc, A_ST_CTRL2, V_B1_RX_EN | V_B2_RX_EN); in hfcmulti_initmode()
4041 HFC_outb(hc, A_ST_WR_STATE, a_st_wr_state | V_ST_LD_STA); in hfcmulti_initmode()
4043 HFC_outb(hc, A_ST_WR_STATE, a_st_wr_state); in hfcmulti_initmode()
4044 hc->hw.r_sci_msk |= 1 << pt; in hfcmulti_initmode()
4046 HFC_outb(hc, R_SCI_MSK, hc->hw.r_sci_msk); in hfcmulti_initmode()
4048 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_initmode()
4049 hc->syncronized &= in hfcmulti_initmode()
4050 ~(1 << hc->chan[dch->slot].port); in hfcmulti_initmode()
4051 plxsd_checksync(hc, 0); in hfcmulti_initmode()
4060 open_dchannel(struct hfc_multi *hc, struct dchannel *dch, in open_dchannel() argument
4087 spin_lock_irqsave(&hc->lock, flags); in open_dchannel()
4089 spin_unlock_irqrestore(&hc->lock, flags); in open_dchannel()
4101 open_bchannel(struct hfc_multi *hc, struct dchannel *dch, in open_bchannel() argument
4111 if (hc->ctype == HFC_TYPE_E1) in open_bchannel()
4115 bch = hc->chan[ch].bch; in open_bchannel()
4124 hc->chan[ch].rx_off = 0; in open_bchannel()
4137 struct hfc_multi *hc = dch->hw; in channel_dctrl() local
4153 HFC_outb(hc, R_TI_WD, poll_timer | (wd_cnt << 4)); in channel_dctrl()
4154 hc->hw.r_bert_wd_md = (wd_mode ? V_AUTO_WD_RES : 0); in channel_dctrl()
4155 if (hc->ctype == HFC_TYPE_XHFC) in channel_dctrl()
4156 hc->hw.r_bert_wd_md |= 0x40 /* V_WD_EN */; in channel_dctrl()
4158 HFC_outb(hc, R_BERT_WD_MD, hc->hw.r_bert_wd_md | V_WD_RES); in channel_dctrl()
4159 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in channel_dctrl()
4161 HFC_outb(hc, R_GPIO_SEL, V_GPIO_SEL7); in channel_dctrl()
4162 HFC_outb(hc, R_GPIO_EN1, V_GPIO_EN15); in channel_dctrl()
4163 HFC_outb(hc, R_GPIO_OUT1, 0); in channel_dctrl()
4164 HFC_outb(hc, R_GPIO_OUT1, V_GPIO_OUT15); in channel_dctrl()
4171 HFC_outb(hc, R_BERT_WD_MD, hc->hw.r_bert_wd_md | V_WD_RES); in channel_dctrl()
4190 struct hfc_multi *hc = dch->hw; in hfcm_dctrl() local
4204 if (hc->ctype == HFC_TYPE_E1) { in hfcm_dctrl()
4208 err = open_dchannel(hc, dch, rq); /* locked there */ in hfcm_dctrl()
4212 if (hc->ctype != HFC_TYPE_E1) { in hfcm_dctrl()
4216 err = open_dchannel(hc, dch, rq); /* locked there */ in hfcm_dctrl()
4219 spin_lock_irqsave(&hc->lock, flags); in hfcm_dctrl()
4220 err = open_bchannel(hc, dch, rq); in hfcm_dctrl()
4221 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_dctrl()
4232 spin_lock_irqsave(&hc->lock, flags); in hfcm_dctrl()
4234 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_dctrl()
4248 struct hfc_multi *hc = priv; in clockctl() local
4250 hc->iclock_on = enable; in clockctl()
4263 init_card(struct hfc_multi *hc) in init_card() argument
4273 spin_lock_irqsave(&hc->lock, flags); in init_card()
4275 hc->hw.r_irq_ctrl = V_FIFO_IRQ; in init_card()
4276 disable_hwirq(hc); in init_card()
4277 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
4279 if (request_irq(hc->irq, hfcmulti_interrupt, IRQF_SHARED, in init_card()
4280 "HFC-multi", hc)) { in init_card()
4282 hc->irq); in init_card()
4283 hc->irq = 0; in init_card()
4287 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_card()
4289 plx_acc = hc->plx_membase + PLX_INTCSR; in init_card()
4297 __func__, hc->irq, hc->irqcnt); in init_card()
4298 err = init_chip(hc); in init_card()
4306 spin_lock_irqsave(&hc->lock, flags); in init_card()
4307 enable_hwirq(hc); in init_card()
4308 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
4313 spin_lock_irqsave(&hc->lock, flags); in init_card()
4314 disable_hwirq(hc); in init_card()
4315 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
4318 __func__, hc->irq, hc->irqcnt); in init_card()
4319 if (hc->irqcnt) { in init_card()
4325 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in init_card()
4331 hc->irq); in init_card()
4336 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_card()
4338 plx_acc = hc->plx_membase + PLX_INTCSR; in init_card()
4344 printk(KERN_DEBUG "%s: free irq %d\n", __func__, hc->irq); in init_card()
4345 if (hc->irq) { in init_card()
4346 free_irq(hc->irq, hc); in init_card()
4347 hc->irq = 0; in init_card()
4360 setup_pci(struct hfc_multi *hc, struct pci_dev *pdev, in setup_pci() argument
4369 hc->pci_dev = pdev; in setup_pci()
4371 test_and_set_bit(HFC_CHIP_CLOCK2, &hc->chip); in setup_pci()
4374 test_and_set_bit(HFC_CHIP_B410P, &hc->chip); in setup_pci()
4375 test_and_set_bit(HFC_CHIP_PCM_MASTER, &hc->chip); in setup_pci()
4376 test_and_clear_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in setup_pci()
4377 hc->slots = 32; in setup_pci()
4380 if (hc->pci_dev->irq <= 0) { in setup_pci()
4384 if (pci_enable_device(hc->pci_dev)) { in setup_pci()
4388 hc->leds = m->leds; in setup_pci()
4389 hc->ledstate = 0xAFFEAFFE; in setup_pci()
4390 hc->opticalsupport = m->opticalsupport; in setup_pci()
4392 hc->pci_iobase = 0; in setup_pci()
4393 hc->pci_membase = NULL; in setup_pci()
4394 hc->plx_membase = NULL; in setup_pci()
4398 hc->io_mode = m->io_mode; in setup_pci()
4399 switch (hc->io_mode) { in setup_pci()
4401 test_and_set_bit(HFC_CHIP_PLXSD, &hc->chip); in setup_pci()
4402 hc->slots = 128; /* required */ in setup_pci()
4403 hc->HFC_outb = HFC_outb_pcimem; in setup_pci()
4404 hc->HFC_inb = HFC_inb_pcimem; in setup_pci()
4405 hc->HFC_inw = HFC_inw_pcimem; in setup_pci()
4406 hc->HFC_wait = HFC_wait_pcimem; in setup_pci()
4407 hc->read_fifo = read_fifo_pcimem; in setup_pci()
4408 hc->write_fifo = write_fifo_pcimem; in setup_pci()
4409 hc->plx_origmembase = hc->pci_dev->resource[0].start; in setup_pci()
4412 if (!hc->plx_origmembase) { in setup_pci()
4415 pci_disable_device(hc->pci_dev); in setup_pci()
4419 hc->plx_membase = ioremap(hc->plx_origmembase, 0x80); in setup_pci()
4420 if (!hc->plx_membase) { in setup_pci()
4424 pci_disable_device(hc->pci_dev); in setup_pci()
4429 (u_long)hc->plx_membase, hc->plx_origmembase); in setup_pci()
4431 hc->pci_origmembase = hc->pci_dev->resource[2].start; in setup_pci()
4433 if (!hc->pci_origmembase) { in setup_pci()
4436 pci_disable_device(hc->pci_dev); in setup_pci()
4440 hc->pci_membase = ioremap(hc->pci_origmembase, 0x400); in setup_pci()
4441 if (!hc->pci_membase) { in setup_pci()
4444 pci_disable_device(hc->pci_dev); in setup_pci()
4451 hc->id, (u_long)hc->pci_membase, hc->pci_origmembase, in setup_pci()
4452 hc->pci_dev->irq, HZ, hc->leds); in setup_pci()
4453 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO); in setup_pci()
4456 hc->HFC_outb = HFC_outb_pcimem; in setup_pci()
4457 hc->HFC_inb = HFC_inb_pcimem; in setup_pci()
4458 hc->HFC_inw = HFC_inw_pcimem; in setup_pci()
4459 hc->HFC_wait = HFC_wait_pcimem; in setup_pci()
4460 hc->read_fifo = read_fifo_pcimem; in setup_pci()
4461 hc->write_fifo = write_fifo_pcimem; in setup_pci()
4462 hc->pci_origmembase = hc->pci_dev->resource[1].start; in setup_pci()
4463 if (!hc->pci_origmembase) { in setup_pci()
4466 pci_disable_device(hc->pci_dev); in setup_pci()
4470 hc->pci_membase = ioremap(hc->pci_origmembase, 256); in setup_pci()
4471 if (!hc->pci_membase) { in setup_pci()
4475 pci_disable_device(hc->pci_dev); in setup_pci()
4479 "%d HZ %d leds-type %d\n", hc->id, (u_long)hc->pci_membase, in setup_pci()
4480 hc->pci_origmembase, hc->pci_dev->irq, HZ, hc->leds); in setup_pci()
4481 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO); in setup_pci()
4484 hc->HFC_outb = HFC_outb_regio; in setup_pci()
4485 hc->HFC_inb = HFC_inb_regio; in setup_pci()
4486 hc->HFC_inw = HFC_inw_regio; in setup_pci()
4487 hc->HFC_wait = HFC_wait_regio; in setup_pci()
4488 hc->read_fifo = read_fifo_regio; in setup_pci()
4489 hc->write_fifo = write_fifo_regio; in setup_pci()
4490 hc->pci_iobase = (u_int) hc->pci_dev->resource[0].start; in setup_pci()
4491 if (!hc->pci_iobase) { in setup_pci()
4494 pci_disable_device(hc->pci_dev); in setup_pci()
4498 if (!request_region(hc->pci_iobase, 8, "hfcmulti")) { in setup_pci()
4501 hc->pci_iobase); in setup_pci()
4502 pci_disable_device(hc->pci_dev); in setup_pci()
4508 m->vendor_name, m->card_name, (u_int) hc->pci_iobase, in setup_pci()
4509 hc->pci_dev->irq, HZ, hc->leds); in setup_pci()
4510 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_REGIO); in setup_pci()
4514 pci_disable_device(hc->pci_dev); in setup_pci()
4518 pci_set_drvdata(hc->pci_dev, hc); in setup_pci()
4531 release_port(struct hfc_multi *hc, struct dchannel *dch) in release_port() argument
4538 pt = hc->chan[ci].port; in release_port()
4544 if (pt >= hc->ports) { in release_port()
4557 hc->chan[ci].dch = NULL; in release_port()
4559 if (hc->created[pt]) { in release_port()
4560 hc->created[pt] = 0; in release_port()
4564 spin_lock_irqsave(&hc->lock, flags); in release_port()
4571 if (hc->ctype == HFC_TYPE_E1) { /* E1 */ in release_port()
4573 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in release_port()
4574 hc->syncronized = 0; in release_port()
4575 plxsd_checksync(hc, 1); in release_port()
4579 if (!((1 << i) & hc->bmask[pt])) /* skip unused chan */ in release_port()
4581 if (hc->chan[i].bch) { in release_port()
4585 __func__, hc->chan[i].port + 1, i); in release_port()
4586 pb = hc->chan[i].bch; in release_port()
4587 hc->chan[i].bch = NULL; in release_port()
4588 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4591 kfree(hc->chan[i].coeff); in release_port()
4592 spin_lock_irqsave(&hc->lock, flags); in release_port()
4597 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in release_port()
4598 hc->syncronized &= in release_port()
4599 ~(1 << hc->chan[ci].port); in release_port()
4600 plxsd_checksync(hc, 1); in release_port()
4603 if (hc->chan[ci - 2].bch) { in release_port()
4607 __func__, hc->chan[ci - 2].port + 1, in release_port()
4609 pb = hc->chan[ci - 2].bch; in release_port()
4610 hc->chan[ci - 2].bch = NULL; in release_port()
4611 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4614 kfree(hc->chan[ci - 2].coeff); in release_port()
4615 spin_lock_irqsave(&hc->lock, flags); in release_port()
4617 if (hc->chan[ci - 1].bch) { in release_port()
4621 __func__, hc->chan[ci - 1].port + 1, in release_port()
4623 pb = hc->chan[ci - 1].bch; in release_port()
4624 hc->chan[ci - 1].bch = NULL; in release_port()
4625 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4628 kfree(hc->chan[ci - 1].coeff); in release_port()
4629 spin_lock_irqsave(&hc->lock, flags); in release_port()
4633 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4646 release_card(struct hfc_multi *hc) in release_card() argument
4653 __func__, hc->id); in release_card()
4656 if (hc->iclock) in release_card()
4657 mISDN_unregister_clock(hc->iclock); in release_card()
4660 spin_lock_irqsave(&hc->lock, flags); in release_card()
4661 disable_hwirq(hc); in release_card()
4662 spin_unlock_irqrestore(&hc->lock, flags); in release_card()
4664 if (hc->irq) { in release_card()
4667 __func__, hc->irq, hc); in release_card()
4668 free_irq(hc->irq, hc); in release_card()
4669 hc->irq = 0; in release_card()
4678 if (hc->chan[ch].dch) in release_card()
4679 release_port(hc, hc->chan[ch].dch); in release_card()
4683 if (hc->leds) in release_card()
4684 hfcmulti_leds(hc); in release_card()
4687 release_io_hfcmulti(hc); in release_card()
4692 list_del(&hc->list); in release_card()
4696 if (hc == syncmaster) in release_card()
4698 kfree(hc); in release_card()
4705 init_e1_port_hw(struct hfc_multi *hc, struct hm_map *m) in init_e1_port_hw() argument
4722 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4732 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4741 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4751 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4761 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4770 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4783 test_and_set_bit(HFC_CHIP_E1CLOCK_GET, &hc->chip); in init_e1_port_hw()
4790 test_and_set_bit(HFC_CHIP_E1CLOCK_PUT, &hc->chip); in init_e1_port_hw()
4798 test_and_set_bit(HFC_CHIP_RX_SYNC, &hc->chip); in init_e1_port_hw()
4802 hc->chan[hc->dnum[0]].jitter = (port[Port_cnt]>>12) & 0x3; in init_e1_port_hw()
4807 __func__, hc->chan[hc->dnum[0]].jitter, in init_e1_port_hw()
4810 hc->chan[hc->dnum[0]].jitter = 2; /* default */ in init_e1_port_hw()
4814 init_e1_port(struct hfc_multi *hc, struct hm_map *m, int pt) in init_e1_port() argument
4827 dch->hw = hc; in init_e1_port()
4833 dch->slot = hc->dnum[pt]; in init_e1_port()
4834 hc->chan[hc->dnum[pt]].dch = dch; in init_e1_port()
4835 hc->chan[hc->dnum[pt]].port = pt; in init_e1_port()
4836 hc->chan[hc->dnum[pt]].nt_timer = -1; in init_e1_port()
4838 if (!((1 << ch) & hc->bmask[pt])) /* skip unused channel */ in init_e1_port()
4847 hc->chan[ch].coeff = kzalloc(512, GFP_KERNEL); in init_e1_port()
4848 if (!hc->chan[ch].coeff) { in init_e1_port()
4859 bch->hw = hc; in init_e1_port()
4864 hc->chan[ch].bch = bch; in init_e1_port()
4865 hc->chan[ch].port = pt; in init_e1_port()
4871 init_e1_port_hw(hc, m); in init_e1_port()
4872 if (hc->ports > 1) in init_e1_port()
4877 ret = mISDN_register_device(&dch->dev, &hc->pci_dev->dev, name); in init_e1_port()
4880 hc->created[pt] = 1; in init_e1_port()
4883 release_port(hc, dch); in init_e1_port()
4888 init_multi_port(struct hfc_multi *hc, int pt) in init_multi_port() argument
4900 dch->hw = hc; in init_multi_port()
4909 hc->chan[i + 2].dch = dch; in init_multi_port()
4910 hc->chan[i + 2].port = pt; in init_multi_port()
4911 hc->chan[i + 2].nt_timer = -1; in init_multi_port()
4920 hc->chan[i + ch].coeff = kzalloc(512, GFP_KERNEL); in init_multi_port()
4921 if (!hc->chan[i + ch].coeff) { in init_multi_port()
4932 bch->hw = hc; in init_multi_port()
4937 hc->chan[i + ch].bch = bch; in init_multi_port()
4938 hc->chan[i + ch].port = pt; in init_multi_port()
4956 if (hc->masterclk >= 0) { in init_multi_port()
4960 pt + 1, HFC_cnt + 1, hc->masterclk + 1); in init_multi_port()
4964 hc->masterclk = pt; in init_multi_port()
4974 &hc->chan[i + 2].cfg); in init_multi_port()
4984 &hc->chan[i + 2].cfg); in init_multi_port()
4986 if (hc->ctype == HFC_TYPE_XHFC) { in init_multi_port()
4992 hc->ctype, HFC_cnt + 1, pt + 1); in init_multi_port()
4993 ret = mISDN_register_device(&dch->dev, &hc->pci_dev->dev, name); in init_multi_port()
4997 hc->created[pt] = 1; in init_multi_port()
5000 release_port(hc, dch); in init_multi_port()
5010 struct hfc_multi *hc; in hfcmulti_init() local
5036 hc = kzalloc(sizeof(struct hfc_multi), GFP_KERNEL); in hfcmulti_init()
5037 if (!hc) { in hfcmulti_init()
5041 spin_lock_init(&hc->lock); in hfcmulti_init()
5042 hc->mtyp = m; in hfcmulti_init()
5043 hc->ctype = m->type; in hfcmulti_init()
5044 hc->ports = m->ports; in hfcmulti_init()
5045 hc->id = HFC_cnt; in hfcmulti_init()
5046 hc->pcm = pcm[HFC_cnt]; in hfcmulti_init()
5047 hc->io_mode = iomode[HFC_cnt]; in hfcmulti_init()
5048 if (hc->ctype == HFC_TYPE_E1 && dmask[E1_cnt]) { in hfcmulti_init()
5055 hc->dnum[pt] = ch; in hfcmulti_init()
5056 hc->bmask[pt] = bmask[bmask_cnt++]; in hfcmulti_init()
5057 if ((maskcheck & hc->bmask[pt]) in hfcmulti_init()
5058 || (dmask[E1_cnt] & hc->bmask[pt])) { in hfcmulti_init()
5062 kfree(hc); in hfcmulti_init()
5065 maskcheck |= hc->bmask[pt]; in hfcmulti_init()
5068 E1_cnt + 1, ch, hc->bmask[pt]); in hfcmulti_init()
5071 hc->ports = pt; in hfcmulti_init()
5073 if (hc->ctype == HFC_TYPE_E1 && !dmask[E1_cnt]) { in hfcmulti_init()
5075 hc->dnum[0] = 16; in hfcmulti_init()
5076 hc->bmask[0] = 0xfffefffe; in hfcmulti_init()
5077 hc->ports = 1; in hfcmulti_init()
5081 hc->masterclk = -1; in hfcmulti_init()
5083 test_and_set_bit(HFC_CHIP_ULAW, &hc->chip); in hfcmulti_init()
5084 hc->silence = 0xff; /* ulaw silence */ in hfcmulti_init()
5086 hc->silence = 0x2a; /* alaw silence */ in hfcmulti_init()
5087 if ((poll >> 1) > sizeof(hc->silence_data)) { in hfcmulti_init()
5090 kfree(hc); in hfcmulti_init()
5094 hc->silence_data[i] = hc->silence; in hfcmulti_init()
5096 if (hc->ctype != HFC_TYPE_XHFC) { in hfcmulti_init()
5098 test_and_set_bit(HFC_CHIP_DTMF, &hc->chip); in hfcmulti_init()
5099 test_and_set_bit(HFC_CHIP_CONF, &hc->chip); in hfcmulti_init()
5103 test_and_set_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in hfcmulti_init()
5105 test_and_set_bit(HFC_CHIP_PCM_MASTER, &hc->chip); in hfcmulti_init()
5106 test_and_clear_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in hfcmulti_init()
5109 test_and_set_bit(HFC_CHIP_EXRAM_128, &hc->chip); in hfcmulti_init()
5111 test_and_set_bit(HFC_CHIP_EXRAM_512, &hc->chip); in hfcmulti_init()
5112 hc->slots = 32; in hfcmulti_init()
5114 hc->slots = 64; in hfcmulti_init()
5116 hc->slots = 128; in hfcmulti_init()
5118 test_and_set_bit(HFC_CHIP_WATCHDOG, &hc->chip); in hfcmulti_init()
5119 hc->wdcount = 0; in hfcmulti_init()
5120 hc->wdbyte = V_GPIO_OUT2; in hfcmulti_init()
5126 ret_err = setup_pci(hc, pdev, ent); in hfcmulti_init()
5129 ret_err = setup_embedded(hc, m); in hfcmulti_init()
5137 if (hc == syncmaster) in hfcmulti_init()
5139 kfree(hc); in hfcmulti_init()
5143 hc->HFC_outb_nodebug = hc->HFC_outb; in hfcmulti_init()
5144 hc->HFC_inb_nodebug = hc->HFC_inb; in hfcmulti_init()
5145 hc->HFC_inw_nodebug = hc->HFC_inw; in hfcmulti_init()
5146 hc->HFC_wait_nodebug = hc->HFC_wait; in hfcmulti_init()
5148 hc->HFC_outb = HFC_outb_debug; in hfcmulti_init()
5149 hc->HFC_inb = HFC_inb_debug; in hfcmulti_init()
5150 hc->HFC_inw = HFC_inw_debug; in hfcmulti_init()
5151 hc->HFC_wait = HFC_wait_debug; in hfcmulti_init()
5154 for (pt = 0; pt < hc->ports; pt++) { in hfcmulti_init()
5161 if (hc->ctype == HFC_TYPE_E1) in hfcmulti_init()
5162 ret_err = init_e1_port(hc, m, pt); in hfcmulti_init()
5164 ret_err = init_multi_port(hc, pt); in hfcmulti_init()
5174 if (hc->ctype == HFC_TYPE_E1) in hfcmulti_init()
5175 release_port(hc, in hfcmulti_init()
5176 hc->chan[hc->dnum[pt]].dch); in hfcmulti_init()
5178 release_port(hc, in hfcmulti_init()
5179 hc->chan[(pt << 2) + 2].dch); in hfcmulti_init()
5183 if (hc->ctype != HFC_TYPE_E1) in hfcmulti_init()
5186 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_init()
5199 dips = ((~HFC_inb(hc, R_GPIO_IN1) & 0xE0) >> 5) | in hfcmulti_init()
5200 ((~HFC_inb(hc, R_GPI_IN2) & 0x80) >> 3) | in hfcmulti_init()
5201 (~HFC_inb(hc, R_GPI_IN2) & 0x08); in hfcmulti_init()
5204 pmj = ((HFC_inb(hc, R_GPI_IN3) >> 4) & 0xf); in hfcmulti_init()
5206 if (test_bit(HFC_CHIP_B410P, &hc->chip)) in hfcmulti_init()
5217 HFC_outb(hc, R_BRG_PCM_CFG, 1 | V_PCM_CLK); in hfcmulti_init()
5219 outw(0x4000, hc->pci_iobase + 4); in hfcmulti_init()
5224 dips = inb(hc->pci_iobase); in hfcmulti_init()
5225 dips = inb(hc->pci_iobase); in hfcmulti_init()
5226 dips = inb(hc->pci_iobase); in hfcmulti_init()
5227 dips = ~inb(hc->pci_iobase) & 0x3F; in hfcmulti_init()
5228 outw(0x0, hc->pci_iobase + 4); in hfcmulti_init()
5230 HFC_outb(hc, R_BRG_PCM_CFG, V_PCM_CLK); in hfcmulti_init()
5239 dips = (~HFC_inb(hc, R_GPI_IN0) & 0xF0) >> 4; in hfcmulti_init()
5247 list_add_tail(&hc->list, &HFClist); in hfcmulti_init()
5252 hc->iclock = mISDN_register_clock("HFCMulti", 0, clockctl, hc); in hfcmulti_init()
5255 hc->irq = (m->irq) ? : hc->pci_dev->irq; in hfcmulti_init()
5256 ret_err = init_card(hc); in hfcmulti_init()
5259 release_card(hc); in hfcmulti_init()
5264 spin_lock_irqsave(&hc->lock, flags); in hfcmulti_init()
5265 enable_hwirq(hc); in hfcmulti_init()
5266 spin_unlock_irqrestore(&hc->lock, flags); in hfcmulti_init()
5270 release_io_hfcmulti(hc); in hfcmulti_init()
5271 if (hc == syncmaster) in hfcmulti_init()
5273 kfree(hc); in hfcmulti_init()