135 static inline unsigned int gic_irq(struct irq_data *d)  in gic_irq()  function
145 	u32 mask = 1 << (gic_irq(d) % 32);  in gic_poke_irq()
146 	writel_relaxed(mask, gic_dist_base(d) + offset + (gic_irq(d) / 32) * 4);  in gic_poke_irq()
151 	u32 mask = 1 << (gic_irq(d) % 32);  in gic_peek_irq()
152 	return !!(readl_relaxed(gic_dist_base(d) + offset + (gic_irq(d) / 32) * 4) & mask);  in gic_peek_irq()
167 	writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI);  in gic_eoi_irq()
222 	unsigned int gicirq = gic_irq(d);  in gic_set_type()
240 	void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3);  in gic_set_affinity()
241 	unsigned int cpu, shift = (gic_irq(d) % 4) * 8;  in gic_set_affinity()
301 	unsigned int cascade_irq, gic_irq;  in gic_handle_cascade_irq()  local
310 	gic_irq = (status & GICC_IAR_INT_ID_MASK);  in gic_handle_cascade_irq()
311 	if (gic_irq == GICC_INT_SPURIOUS)  in gic_handle_cascade_irq()
314 	cascade_irq = irq_find_mapping(chip_data->domain, gic_irq);  in gic_handle_cascade_irq()
315 	if (unlikely(gic_irq < 32 || gic_irq > 1020))  in gic_handle_cascade_irq()