574 static void arm_smmu_tlb_inv_range_nosync(unsigned long iova, size_t size,  in arm_smmu_tlb_inv_range_nosync()  argument
588 			iova &= ~12UL;  in arm_smmu_tlb_inv_range_nosync()
589 			iova |= ARM_SMMU_CB_ASID(cfg);  in arm_smmu_tlb_inv_range_nosync()
590 			writel_relaxed(iova, reg);  in arm_smmu_tlb_inv_range_nosync()
593 			iova >>= 12;  in arm_smmu_tlb_inv_range_nosync()
594 			iova |= (u64)ARM_SMMU_CB_ASID(cfg) << 48;  in arm_smmu_tlb_inv_range_nosync()
595 			writeq_relaxed(iova, reg);  in arm_smmu_tlb_inv_range_nosync()
603 		writeq_relaxed(iova >> 12, reg);  in arm_smmu_tlb_inv_range_nosync()
645 	unsigned long iova;  in arm_smmu_context_fault()  local
667 	iova = far;  in arm_smmu_context_fault()
670 	iova |= ((unsigned long)far << 32);  in arm_smmu_context_fault()
673 	if (!report_iommu_fault(domain, smmu->dev, iova, flags)) {  in arm_smmu_context_fault()
679 		    iova, fsynr, cfg->cbndx);  in arm_smmu_context_fault()
1187 static int arm_smmu_map(struct iommu_domain *domain, unsigned long iova,  in arm_smmu_map()  argument
1199 	ret = ops->map(ops, iova, paddr, size, prot);  in arm_smmu_map()
1204 static size_t arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova,  in arm_smmu_unmap()  argument
1216 	ret = ops->unmap(ops, iova, size);  in arm_smmu_unmap()
1222 					      dma_addr_t iova)  in arm_smmu_iova_to_phys_hard()  argument
1236 		u32 reg = iova & ~0xfff;  in arm_smmu_iova_to_phys_hard()
1239 		u32 reg = iova & ~0xfff;  in arm_smmu_iova_to_phys_hard()
1241 		reg = ((u64)iova & ~0xfff) >> 32;  in arm_smmu_iova_to_phys_hard()
1249 			&iova);  in arm_smmu_iova_to_phys_hard()
1250 		return ops->iova_to_phys(ops, iova);  in arm_smmu_iova_to_phys_hard()
1262 	return (phys & GENMASK_ULL(39, 12)) | (iova & 0xfff);  in arm_smmu_iova_to_phys_hard()
1266 					dma_addr_t iova)  in arm_smmu_iova_to_phys()  argument
1279 		ret = arm_smmu_iova_to_phys_hard(domain, iova);  in arm_smmu_iova_to_phys()
1281 		ret = ops->iova_to_phys(ops, iova);  in arm_smmu_iova_to_phys()