Lines Matching refs:cbndx
317 u8 cbndx; member
323 #define ARM_SMMU_CB_ASID(cfg) ((cfg)->cbndx)
324 #define ARM_SMMU_CB_VMID(cfg) ((cfg)->cbndx + 1)
562 base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx); in arm_smmu_tlb_inv_context()
584 reg = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx); in arm_smmu_tlb_inv_range_nosync()
600 reg = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx); in arm_smmu_tlb_inv_range_nosync()
652 cb_base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx); in arm_smmu_context_fault()
679 iova, fsynr, cfg->cbndx); in arm_smmu_context_fault()
730 cb_base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx); in arm_smmu_init_context_bank()
743 writel_relaxed(reg, gr1_base + ARM_SMMU_GR1_CBA2R(cfg->cbndx)); in arm_smmu_init_context_bank()
761 writel_relaxed(reg, gr1_base + ARM_SMMU_GR1_CBAR(cfg->cbndx)); in arm_smmu_init_context_bank()
889 cfg->cbndx = ret; in arm_smmu_init_domain_context()
894 cfg->irptndx = cfg->cbndx; in arm_smmu_init_domain_context()
958 cb_base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx); in arm_smmu_destroy_domain_context()
969 __arm_smmu_free_bitmap(smmu->context_map, cfg->cbndx); in arm_smmu_destroy_domain_context()
1097 (smmu_domain->cfg.cbndx << S2CR_CBNDX_SHIFT); in arm_smmu_domain_add_master()
1233 cb_base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx); in arm_smmu_iova_to_phys_hard()