Lines Matching refs:opcode
121 if (e->opcode == OP(RDMA_READ_REQUEST)) { in qib_make_rc_ack()
334 switch (wqe->wr.opcode) { in qib_make_rc_req()
350 if (wqe->wr.opcode == IB_WR_SEND) in qib_make_rc_req()
389 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) in qib_make_rc_req()
458 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) { in qib_make_rc_req()
497 if (wqe->wr.opcode == IB_WR_RDMA_READ) in qib_make_rc_req()
531 if (wqe->wr.opcode == IB_WR_SEND) in qib_make_rc_req()
572 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) in qib_make_rc_req()
787 u32 opcode; in reset_psn() local
801 opcode = wqe->wr.opcode; in reset_psn()
822 opcode = wqe->wr.opcode; in reset_psn()
830 switch (opcode) { in reset_psn()
887 if (wqe->wr.opcode == IB_WR_RDMA_READ) in qib_restart_rc()
953 if (wqe->wr.opcode == IB_WR_RDMA_READ) in reset_sending_psn()
975 u32 opcode; in qib_rc_send_complete() local
987 opcode = be32_to_cpu(ohdr->bth[0]) >> 24; in qib_rc_send_complete()
988 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) && in qib_rc_send_complete()
989 opcode <= OP(ATOMIC_ACKNOWLEDGE)) { in qib_rc_send_complete()
1023 wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode]; in qib_rc_send_complete()
1079 wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode]; in do_rc_completion()
1127 static int do_rc_ack(struct qib_qp *qp, u32 aeth, u32 psn, int opcode, in do_rc_ack() argument
1166 if (wqe->wr.opcode == IB_WR_RDMA_READ && in do_rc_ack()
1167 opcode == OP(RDMA_READ_RESPONSE_ONLY) && in do_rc_ack()
1181 if ((wqe->wr.opcode == IB_WR_RDMA_READ && in do_rc_ack()
1182 (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) || in do_rc_ack()
1183 ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || in do_rc_ack()
1184 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) && in do_rc_ack()
1185 (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) { in do_rc_ack()
1203 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || in do_rc_ack()
1204 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) { in do_rc_ack()
1209 (wqe->wr.opcode == IB_WR_RDMA_READ || in do_rc_ack()
1210 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || in do_rc_ack()
1211 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) { in do_rc_ack()
1364 if (wqe->wr.opcode == IB_WR_RDMA_READ || in rdma_seq_err()
1365 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || in rdma_seq_err()
1366 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) in rdma_seq_err()
1401 u32 opcode, in qib_rc_rcv_resp() argument
1414 if (opcode != OP(RDMA_READ_RESPONSE_MIDDLE)) { in qib_rc_rcv_resp()
1449 if (diff == 0 && opcode == OP(ACKNOWLEDGE)) { in qib_rc_rcv_resp()
1472 switch (opcode) { in qib_rc_rcv_resp()
1477 if (opcode == OP(ATOMIC_ACKNOWLEDGE)) { in qib_rc_rcv_resp()
1484 if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) || in qib_rc_rcv_resp()
1485 opcode != OP(RDMA_READ_RESPONSE_FIRST)) in qib_rc_rcv_resp()
1489 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) in qib_rc_rcv_resp()
1504 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) in qib_rc_rcv_resp()
1523 if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE)) in qib_rc_rcv_resp()
1538 if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd)) in qib_rc_rcv_resp()
1563 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) in qib_rc_rcv_resp()
1625 u32 opcode, in qib_rc_rcv_error() argument
1695 if (!e->opcode) { in qib_rc_rcv_error()
1706 switch (opcode) { in qib_rc_rcv_error()
1716 if (!e || e->opcode != OP(RDMA_READ_REQUEST)) in qib_rc_rcv_error()
1764 if (!e || e->opcode != (u8) opcode || old_req) in qib_rc_rcv_error()
1867 u32 opcode; in qib_rc_rcv() local
1887 opcode = be32_to_cpu(ohdr->bth[0]); in qib_rc_rcv()
1888 if (qib_ruc_check_hdr(ibp, hdr, has_grh, qp, opcode)) in qib_rc_rcv()
1892 opcode >>= 24; in qib_rc_rcv()
1900 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) && in qib_rc_rcv()
1901 opcode <= OP(ATOMIC_ACKNOWLEDGE)) { in qib_rc_rcv()
1902 qib_rc_rcv_resp(ibp, ohdr, data, tlen, qp, opcode, psn, in qib_rc_rcv()
1910 if (qib_rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd)) in qib_rc_rcv()
1919 if (opcode == OP(SEND_MIDDLE) || in qib_rc_rcv()
1920 opcode == OP(SEND_LAST) || in qib_rc_rcv()
1921 opcode == OP(SEND_LAST_WITH_IMMEDIATE)) in qib_rc_rcv()
1927 if (opcode == OP(RDMA_WRITE_MIDDLE) || in qib_rc_rcv()
1928 opcode == OP(RDMA_WRITE_LAST) || in qib_rc_rcv()
1929 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) in qib_rc_rcv()
1934 if (opcode == OP(SEND_MIDDLE) || in qib_rc_rcv()
1935 opcode == OP(SEND_LAST) || in qib_rc_rcv()
1936 opcode == OP(SEND_LAST_WITH_IMMEDIATE) || in qib_rc_rcv()
1937 opcode == OP(RDMA_WRITE_MIDDLE) || in qib_rc_rcv()
1938 opcode == OP(RDMA_WRITE_LAST) || in qib_rc_rcv()
1939 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) in qib_rc_rcv()
1962 switch (opcode) { in qib_rc_rcv()
2000 if (opcode == OP(SEND_ONLY)) in qib_rc_rcv()
2033 if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) || in qib_rc_rcv()
2034 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) in qib_rc_rcv()
2035 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM; in qib_rc_rcv()
2037 wc.opcode = IB_WC_RECV; in qib_rc_rcv()
2082 if (opcode == OP(RDMA_WRITE_FIRST)) in qib_rc_rcv()
2084 else if (opcode == OP(RDMA_WRITE_ONLY)) in qib_rc_rcv()
2114 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) { in qib_rc_rcv()
2142 e->opcode = opcode; in qib_rc_rcv()
2153 qp->r_state = opcode; in qib_rc_rcv()
2186 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) { in qib_rc_rcv()
2204 e->atomic_data = (opcode == OP(FETCH_ADD)) ? in qib_rc_rcv()
2211 e->opcode = opcode; in qib_rc_rcv()
2217 qp->r_state = opcode; in qib_rc_rcv()
2233 qp->r_state = opcode; in qib_rc_rcv()