88 #define BMASK(msb, lsb) (((1 << ((msb) + 1 - (lsb))) - 1) << (lsb))  argument
171 #define MASK_ACROSS(lsb, msb) \  argument
172 	(((1ULL << ((msb) + 1 - (lsb))) - 1) << (lsb))
663 	int lsb;  member
692 	int     lsb;  member
2719 			(u64) dca3_get_tag(&dd->pcidev->dev, cpu) << rmp->lsb;  in qib_update_rhdrq_dca()
3475 		int lsb, reg, sh;  in qib_setup_7322_interrupt()  local
3494 			lsb = irq_table[i].lsb;  in qib_setup_7322_interrupt()
3514 			lsb = QIB_I_RCVAVAIL_LSB + ctxt;  in qib_setup_7322_interrupt()
3544 		if (lsb >= 0) {  in qib_setup_7322_interrupt()
3545 			reg = lsb / IBA7322_REDIRECT_VEC_PER_REG;  in qib_setup_7322_interrupt()
3546 			sh = (lsb % IBA7322_REDIRECT_VEC_PER_REG) *  in qib_setup_7322_interrupt()
3548 			mask &= ~(1ULL << lsb);  in qib_setup_7322_interrupt()
4016 	int lsb, ret = 0;  in qib_7322_get_ib_cfg()  local
4038 		lsb = SYM_LSB(IBCCtrlB_0, IB_POLARITY_REV_SUPP);  in qib_7322_get_ib_cfg()
4043 		lsb = SYM_LSB(IBCCtrlB_0, IB_LANE_REV_SUPPORTED);  in qib_7322_get_ib_cfg()
4082 		lsb = IBA7322_IBC_HRTBT_LSB;  in qib_7322_get_ib_cfg()
4103 	ret = (int)((ppd->cpspec->ibcctrl_b >> lsb) & maskr);  in qib_7322_get_ib_cfg()
4120 	int lsb, ret = 0;  in qib_7322_set_ib_cfg()  local
4130 		lsb = IBA7322_IBC_DLIDLMC_SHIFT;  in qib_7322_set_ib_cfg()
4155 		lsb = SYM_LSB(IBCCtrlB_0, IB_NUM_CHANNELS);  in qib_7322_set_ib_cfg()
4180 		lsb = SYM_LSB(IBCCtrlB_0, IB_ENHANCED_MODE);  in qib_7322_set_ib_cfg()
4184 		lsb = SYM_LSB(IBCCtrlB_0, IB_POLARITY_REV_SUPP);  in qib_7322_set_ib_cfg()
4189 		lsb = SYM_LSB(IBCCtrlB_0, IB_LANE_REV_SUPPORTED);  in qib_7322_set_ib_cfg()
4347 		lsb = IBA7322_IBC_HRTBT_LSB;  in qib_7322_set_ib_cfg()
4363 	ppd->cpspec->ibcctrl_b &= ~(maskr << lsb);  in qib_7322_set_ib_cfg()
4364 	ppd->cpspec->ibcctrl_b |= (((u64) val & maskr) << lsb);  in qib_7322_set_ib_cfg()