70 static int order2idx(struct mlx5_ib_dev *dev, int order)  in order2idx()  argument
74 	if (order < cache->ent[0].order)  in order2idx()
77 		return order - cache->ent[0].order;  in order2idx()
85 	int c = order2idx(dev, mr->order);  in reg_mr_callback()
140 	int npages = 1 << ent->order;  in add_keys()
159 		mr->order = ent->order;  in add_keys()
228 	c = order2idx(dev, ent->order);  in size_write()
294 	c = order2idx(dev, ent->order);  in limit_write()
359 	int i = order2idx(dev, ent->order);  in __cache_work_func()
411 static struct mlx5_ib_mr *alloc_cached_mr(struct mlx5_ib_dev *dev, int order)  in alloc_cached_mr()  argument
419 	c = order2idx(dev, order);  in alloc_cached_mr()
421 		mlx5_ib_warn(dev, "order %d, cache index %d\n", order, c);  in alloc_cached_mr()
428 		mlx5_ib_dbg(dev, "order %d, cache index %d\n", ent->order, i);  in alloc_cached_mr()
462 	c = order2idx(dev, mr->order);  in free_cached_mr()
464 		mlx5_ib_warn(dev, "order %d, cache index %d\n", mr->order, c);  in free_cached_mr()
521 		sprintf(ent->name, "%d", ent->order);  in mlx5_mr_cache_debugfs_init()
587 		ent->order = i + 2;  in mlx5_mr_cache_init()
682 static int use_umr(int order)  in use_umr()  argument
684 	return order <= MLX5_MAX_UMR_SHIFT;  in use_umr()
753 				  int page_shift, int order, int access_flags)  in reg_umr()  argument
770 		mr = alloc_cached_mr(dev, order);  in reg_umr()
774 		err = add_keys(dev, order2idx(dev, order), 1);  in reg_umr()
1042 	int order;  in mlx5_ib_reg_user_mr()  local
1054 	mlx5_ib_cont_pages(umem, start, &npages, &page_shift, &ncont, &order);  in mlx5_ib_reg_user_mr()
1062 		    npages, ncont, order, page_shift);  in mlx5_ib_reg_user_mr()
1064 	if (use_umr(order)) {  in mlx5_ib_reg_user_mr()
1066 			     order, access_flags);  in mlx5_ib_reg_user_mr()
1068 			mlx5_ib_dbg(dev, "cache empty for order %d", order);  in mlx5_ib_reg_user_mr()