Lines Matching refs:owner_sr_opcode
83 return (!!(tcqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK) ^ in get_sw_cqe()
349 while ((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) != MLX4_CQE_OPCODE_RESIZE) { in mlx4_ib_cq_resize_copy_cqes()
355 new_cqe->owner_sr_opcode = (cqe->owner_sr_opcode & ~MLX4_CQE_OWNER_MASK) | in mlx4_ib_cq_resize_copy_cqes()
504 cqe->owner_sr_opcode & ~MLX4_CQE_OWNER_MASK); in mlx4_ib_handle_error_cqe()
679 is_send = cqe->owner_sr_opcode & MLX4_CQE_IS_SEND_MASK; in mlx4_ib_poll_one()
680 is_error = (cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) == in mlx4_ib_poll_one()
683 if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) == MLX4_OPCODE_NOP && in mlx4_ib_poll_one()
690 if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) == MLX4_CQE_OPCODE_RESIZE)) { in mlx4_ib_poll_one()
773 switch (cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) { in mlx4_ib_poll_one()
821 switch (cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) { in mlx4_ib_poll_one()
953 if (srq && !(cqe->owner_sr_opcode & MLX4_CQE_IS_SEND_MASK)) in __mlx4_ib_cq_clean()
960 owner_bit = dest->owner_sr_opcode & MLX4_CQE_OWNER_MASK; in __mlx4_ib_cq_clean()
962 dest->owner_sr_opcode = owner_bit | in __mlx4_ib_cq_clean()
963 (dest->owner_sr_opcode & ~MLX4_CQE_OWNER_MASK); in __mlx4_ib_cq_clean()