130 	u8 t;  in via_set_speed()  local
133 		pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);  in via_set_speed()
134 		t = (t & ~(3 << ((3 - dn) << 1))) | ((clamp_val(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));  in via_set_speed()
135 		pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t);  in via_set_speed()
145 	case ATA_UDMA2: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 5) - 2)) : 0x03; break;  in via_set_speed()
146 	case ATA_UDMA4: t = timing->udma ? (0xe8 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x0f; break;  in via_set_speed()
147 	case ATA_UDMA5: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;  in via_set_speed()
148 	case ATA_UDMA6: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;  in via_set_speed()
163 			udma_etc |= t;  in via_set_speed()
185 	struct ide_timing t, p;  in via_set_drive()  local
199 	ide_timing_compute(drive, speed, &t, T, UT);  in via_set_drive()
203 		ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);  in via_set_drive()
206 	via_set_speed(hwif, drive->dn, &t);  in via_set_drive()
302 	u8 t, v;  in init_chipset_via82cxxx()  local
330 	pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t);  in init_chipset_via82cxxx()
335 		t &= 0x7f;  in init_chipset_via82cxxx()
340 		t &= (t & 0x9f);  in init_chipset_via82cxxx()
342 			case 2: t |= 0x00; break;	/* 16 on primary */  in init_chipset_via82cxxx()
343 			case 1: t |= 0x60; break;	/* 16 on secondary */  in init_chipset_via82cxxx()
344 			case 3: t |= 0x20; break;	/* 8 pri 8 sec */  in init_chipset_via82cxxx()
348 	pci_write_config_byte(dev, VIA_FIFO_CONFIG, t);  in init_chipset_via82cxxx()