75 	outb(index, hwif->dma_base + 1);  in get_indexed_reg()
76 	value = inb(hwif->dma_base + 3);  in get_indexed_reg()
89 	outb(index, hwif->dma_base + 1);  in set_indexed_reg()
90 	outb(value, hwif->dma_base + 3);  in set_indexed_reg()
204 static long read_counter(u32 dma_base)  in read_counter()  argument
206 	u32  pri_dma_base = dma_base, sec_dma_base = dma_base + 0x08;  in read_counter()
244 static long detect_pll_input_clock(unsigned long dma_base)  in detect_pll_input_clock()  argument
251 	start_count = read_counter(dma_base);  in detect_pll_input_clock()
255 	outb(0x01, dma_base + 0x01);  in detect_pll_input_clock()
256 	scr1 = inb(dma_base + 0x03);  in detect_pll_input_clock()
258 	outb(scr1 | 0x40, dma_base + 0x03);  in detect_pll_input_clock()
263 	end_count = read_counter(dma_base);  in detect_pll_input_clock()
267 	outb(0x01, dma_base + 0x01);  in detect_pll_input_clock()
268 	scr1 = inb(dma_base + 0x03);  in detect_pll_input_clock()
270 	outb(scr1 & ~0x40, dma_base + 0x03);  in detect_pll_input_clock()
306 	unsigned long dma_base = pci_resource_start(dev, 4);  in init_chipset_pdcnew()  local
307 	unsigned long sec_dma_base = dma_base + 0x08;  in init_chipset_pdcnew()
312 	if (dma_base == 0)  in init_chipset_pdcnew()
337 	pll_input = detect_pll_input_clock(dma_base);  in init_chipset_pdcnew()