178 static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val, unsigned long reg)  in dvc_writel()  argument
180 	writel(val, i2c_dev->base + reg);  in dvc_writel()
183 static u32 dvc_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg)  in dvc_readl()  argument
185 	return readl(i2c_dev->base + reg);  in dvc_readl()
192 static unsigned long tegra_i2c_reg_addr(struct tegra_i2c_dev *i2c_dev,  in tegra_i2c_reg_addr()  argument
195 	if (i2c_dev->is_dvc)  in tegra_i2c_reg_addr()
200 static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val,  in i2c_writel()  argument
203 	writel(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));  in i2c_writel()
207 		readl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));  in i2c_writel()
210 static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg)  in i2c_readl()  argument
212 	return readl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));  in i2c_readl()
215 static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data,  in i2c_writesl()  argument
218 	writesl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len);  in i2c_writesl()
221 static void i2c_readsl(struct tegra_i2c_dev *i2c_dev, void *data,  in i2c_readsl()  argument
224 	readsl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len);  in i2c_readsl()
227 static void tegra_i2c_mask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask)  in tegra_i2c_mask_irq()  argument
229 	u32 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK);  in tegra_i2c_mask_irq()
231 	i2c_writel(i2c_dev, int_mask, I2C_INT_MASK);  in tegra_i2c_mask_irq()
234 static void tegra_i2c_unmask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask)  in tegra_i2c_unmask_irq()  argument
236 	u32 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK);  in tegra_i2c_unmask_irq()
238 	i2c_writel(i2c_dev, int_mask, I2C_INT_MASK);  in tegra_i2c_unmask_irq()
241 static int tegra_i2c_flush_fifos(struct tegra_i2c_dev *i2c_dev)  in tegra_i2c_flush_fifos()  argument
244 	u32 val = i2c_readl(i2c_dev, I2C_FIFO_CONTROL);  in tegra_i2c_flush_fifos()
246 	i2c_writel(i2c_dev, val, I2C_FIFO_CONTROL);  in tegra_i2c_flush_fifos()
248 	while (i2c_readl(i2c_dev, I2C_FIFO_CONTROL) &  in tegra_i2c_flush_fifos()
251 			dev_warn(i2c_dev->dev, "timeout waiting for fifo flush\n");  in tegra_i2c_flush_fifos()
259 static int tegra_i2c_empty_rx_fifo(struct tegra_i2c_dev *i2c_dev)  in tegra_i2c_empty_rx_fifo()  argument
263 	u8 *buf = i2c_dev->msg_buf;  in tegra_i2c_empty_rx_fifo()
264 	size_t buf_remaining = i2c_dev->msg_buf_remaining;  in tegra_i2c_empty_rx_fifo()
267 	val = i2c_readl(i2c_dev, I2C_FIFO_STATUS);  in tegra_i2c_empty_rx_fifo()
276 	i2c_readsl(i2c_dev, buf, I2C_RX_FIFO, words_to_transfer);  in tegra_i2c_empty_rx_fifo()
288 		val = i2c_readl(i2c_dev, I2C_RX_FIFO);  in tegra_i2c_empty_rx_fifo()
296 	i2c_dev->msg_buf_remaining = buf_remaining;  in tegra_i2c_empty_rx_fifo()
297 	i2c_dev->msg_buf = buf;  in tegra_i2c_empty_rx_fifo()
301 static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev)  in tegra_i2c_fill_tx_fifo()  argument
305 	u8 *buf = i2c_dev->msg_buf;  in tegra_i2c_fill_tx_fifo()
306 	size_t buf_remaining = i2c_dev->msg_buf_remaining;  in tegra_i2c_fill_tx_fifo()
309 	val = i2c_readl(i2c_dev, I2C_FIFO_STATUS);  in tegra_i2c_fill_tx_fifo()
330 		i2c_dev->msg_buf_remaining = buf_remaining;  in tegra_i2c_fill_tx_fifo()
331 		i2c_dev->msg_buf = buf +  in tegra_i2c_fill_tx_fifo()
335 		i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer);  in tegra_i2c_fill_tx_fifo()
351 		i2c_dev->msg_buf_remaining = 0;  in tegra_i2c_fill_tx_fifo()
352 		i2c_dev->msg_buf = NULL;  in tegra_i2c_fill_tx_fifo()
355 		i2c_writel(i2c_dev, val, I2C_TX_FIFO);  in tegra_i2c_fill_tx_fifo()
368 static void tegra_dvc_init(struct tegra_i2c_dev *i2c_dev)  in tegra_dvc_init()  argument
371 	val = dvc_readl(i2c_dev, DVC_CTRL_REG3);  in tegra_dvc_init()
374 	dvc_writel(i2c_dev, val, DVC_CTRL_REG3);  in tegra_dvc_init()
376 	val = dvc_readl(i2c_dev, DVC_CTRL_REG1);  in tegra_dvc_init()
378 	dvc_writel(i2c_dev, val, DVC_CTRL_REG1);  in tegra_dvc_init()
381 static inline int tegra_i2c_clock_enable(struct tegra_i2c_dev *i2c_dev)  in tegra_i2c_clock_enable()  argument
384 	if (!i2c_dev->hw->has_single_clk_source) {  in tegra_i2c_clock_enable()
385 		ret = clk_enable(i2c_dev->fast_clk);  in tegra_i2c_clock_enable()
387 			dev_err(i2c_dev->dev,  in tegra_i2c_clock_enable()
392 	ret = clk_enable(i2c_dev->div_clk);  in tegra_i2c_clock_enable()
394 		dev_err(i2c_dev->dev,  in tegra_i2c_clock_enable()
396 		clk_disable(i2c_dev->fast_clk);  in tegra_i2c_clock_enable()
401 static inline void tegra_i2c_clock_disable(struct tegra_i2c_dev *i2c_dev)  in tegra_i2c_clock_disable()  argument
403 	clk_disable(i2c_dev->div_clk);  in tegra_i2c_clock_disable()
404 	if (!i2c_dev->hw->has_single_clk_source)  in tegra_i2c_clock_disable()
405 		clk_disable(i2c_dev->fast_clk);  in tegra_i2c_clock_disable()
408 static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)  in tegra_i2c_init()  argument
414 	err = tegra_i2c_clock_enable(i2c_dev);  in tegra_i2c_init()
416 		dev_err(i2c_dev->dev, "Clock enable failed %d\n", err);  in tegra_i2c_init()
420 	reset_control_assert(i2c_dev->rst);  in tegra_i2c_init()
422 	reset_control_deassert(i2c_dev->rst);  in tegra_i2c_init()
424 	if (i2c_dev->is_dvc)  in tegra_i2c_init()
425 		tegra_dvc_init(i2c_dev);  in tegra_i2c_init()
429 	i2c_writel(i2c_dev, val, I2C_CNFG);  in tegra_i2c_init()
430 	i2c_writel(i2c_dev, 0, I2C_INT_MASK);  in tegra_i2c_init()
433 	clk_divisor = i2c_dev->hw->clk_divisor_hs_mode;  in tegra_i2c_init()
434 	clk_divisor |= i2c_dev->hw->clk_divisor_std_fast_mode <<  in tegra_i2c_init()
436 	i2c_writel(i2c_dev, clk_divisor, I2C_CLK_DIVISOR);  in tegra_i2c_init()
438 	if (!i2c_dev->is_dvc) {  in tegra_i2c_init()
439 		u32 sl_cfg = i2c_readl(i2c_dev, I2C_SL_CNFG);  in tegra_i2c_init()
441 		i2c_writel(i2c_dev, sl_cfg, I2C_SL_CNFG);  in tegra_i2c_init()
442 		i2c_writel(i2c_dev, 0xfc, I2C_SL_ADDR1);  in tegra_i2c_init()
443 		i2c_writel(i2c_dev, 0x00, I2C_SL_ADDR2);  in tegra_i2c_init()
449 	i2c_writel(i2c_dev, val, I2C_FIFO_CONTROL);  in tegra_i2c_init()
451 	if (tegra_i2c_flush_fifos(i2c_dev))  in tegra_i2c_init()
454 	tegra_i2c_clock_disable(i2c_dev);  in tegra_i2c_init()
456 	if (i2c_dev->irq_disabled) {  in tegra_i2c_init()
457 		i2c_dev->irq_disabled = 0;  in tegra_i2c_init()
458 		enable_irq(i2c_dev->irq);  in tegra_i2c_init()
468 	struct tegra_i2c_dev *i2c_dev = dev_id;  in tegra_i2c_isr()  local
470 	status = i2c_readl(i2c_dev, I2C_INT_STATUS);  in tegra_i2c_isr()
473 		dev_warn(i2c_dev->dev, "irq status 0 %08x %08x %08x\n",  in tegra_i2c_isr()
474 			 i2c_readl(i2c_dev, I2C_PACKET_TRANSFER_STATUS),  in tegra_i2c_isr()
475 			 i2c_readl(i2c_dev, I2C_STATUS),  in tegra_i2c_isr()
476 			 i2c_readl(i2c_dev, I2C_CNFG));  in tegra_i2c_isr()
477 		i2c_dev->msg_err |= I2C_ERR_UNKNOWN_INTERRUPT;  in tegra_i2c_isr()
479 		if (!i2c_dev->irq_disabled) {  in tegra_i2c_isr()
480 			disable_irq_nosync(i2c_dev->irq);  in tegra_i2c_isr()
481 			i2c_dev->irq_disabled = 1;  in tegra_i2c_isr()
488 			i2c_dev->msg_err |= I2C_ERR_NO_ACK;  in tegra_i2c_isr()
490 			i2c_dev->msg_err |= I2C_ERR_ARBITRATION_LOST;  in tegra_i2c_isr()
494 	if (i2c_dev->msg_read && (status & I2C_INT_RX_FIFO_DATA_REQ)) {  in tegra_i2c_isr()
495 		if (i2c_dev->msg_buf_remaining)  in tegra_i2c_isr()
496 			tegra_i2c_empty_rx_fifo(i2c_dev);  in tegra_i2c_isr()
501 	if (!i2c_dev->msg_read && (status & I2C_INT_TX_FIFO_DATA_REQ)) {  in tegra_i2c_isr()
502 		if (i2c_dev->msg_buf_remaining)  in tegra_i2c_isr()
503 			tegra_i2c_fill_tx_fifo(i2c_dev);  in tegra_i2c_isr()
505 			tegra_i2c_mask_irq(i2c_dev, I2C_INT_TX_FIFO_DATA_REQ);  in tegra_i2c_isr()
508 	i2c_writel(i2c_dev, status, I2C_INT_STATUS);  in tegra_i2c_isr()
509 	if (i2c_dev->is_dvc)  in tegra_i2c_isr()
510 		dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS);  in tegra_i2c_isr()
513 		BUG_ON(i2c_dev->msg_buf_remaining);  in tegra_i2c_isr()
514 		complete(&i2c_dev->msg_complete);  in tegra_i2c_isr()
519 	tegra_i2c_mask_irq(i2c_dev, I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST |  in tegra_i2c_isr()
522 	i2c_writel(i2c_dev, status, I2C_INT_STATUS);  in tegra_i2c_isr()
523 	if (i2c_dev->is_dvc)  in tegra_i2c_isr()
524 		dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS);  in tegra_i2c_isr()
526 	complete(&i2c_dev->msg_complete);  in tegra_i2c_isr()
530 static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,  in tegra_i2c_xfer_msg()  argument
537 	tegra_i2c_flush_fifos(i2c_dev);  in tegra_i2c_xfer_msg()
542 	i2c_dev->msg_buf = msg->buf;  in tegra_i2c_xfer_msg()
543 	i2c_dev->msg_buf_remaining = msg->len;  in tegra_i2c_xfer_msg()
544 	i2c_dev->msg_err = I2C_ERR_NONE;  in tegra_i2c_xfer_msg()
545 	i2c_dev->msg_read = (msg->flags & I2C_M_RD);  in tegra_i2c_xfer_msg()
546 	reinit_completion(&i2c_dev->msg_complete);  in tegra_i2c_xfer_msg()
550 			(i2c_dev->cont_id << PACKET_HEADER0_CONT_ID_SHIFT) |  in tegra_i2c_xfer_msg()
552 	i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO);  in tegra_i2c_xfer_msg()
555 	i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO);  in tegra_i2c_xfer_msg()
572 	i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO);  in tegra_i2c_xfer_msg()
575 		tegra_i2c_fill_tx_fifo(i2c_dev);  in tegra_i2c_xfer_msg()
578 	if (i2c_dev->hw->has_per_pkt_xfer_complete_irq)  in tegra_i2c_xfer_msg()
582 	else if (i2c_dev->msg_buf_remaining)  in tegra_i2c_xfer_msg()
584 	tegra_i2c_unmask_irq(i2c_dev, int_mask);  in tegra_i2c_xfer_msg()
585 	dev_dbg(i2c_dev->dev, "unmasked irq: %02x\n",  in tegra_i2c_xfer_msg()
586 		i2c_readl(i2c_dev, I2C_INT_MASK));  in tegra_i2c_xfer_msg()
588 	time_left = wait_for_completion_timeout(&i2c_dev->msg_complete,  in tegra_i2c_xfer_msg()
590 	tegra_i2c_mask_irq(i2c_dev, int_mask);  in tegra_i2c_xfer_msg()
593 		dev_err(i2c_dev->dev, "i2c transfer timed out\n");  in tegra_i2c_xfer_msg()
595 		tegra_i2c_init(i2c_dev);  in tegra_i2c_xfer_msg()
599 	dev_dbg(i2c_dev->dev, "transfer complete: %lu %d %d\n",  in tegra_i2c_xfer_msg()
600 		time_left, completion_done(&i2c_dev->msg_complete),  in tegra_i2c_xfer_msg()
601 		i2c_dev->msg_err);  in tegra_i2c_xfer_msg()
603 	if (likely(i2c_dev->msg_err == I2C_ERR_NONE))  in tegra_i2c_xfer_msg()
611 	if (i2c_dev->msg_err == I2C_ERR_NO_ACK)  in tegra_i2c_xfer_msg()
612 		udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate));  in tegra_i2c_xfer_msg()
614 	tegra_i2c_init(i2c_dev);  in tegra_i2c_xfer_msg()
615 	if (i2c_dev->msg_err == I2C_ERR_NO_ACK) {  in tegra_i2c_xfer_msg()
627 	struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap);  in tegra_i2c_xfer()  local
631 	if (i2c_dev->is_suspended)  in tegra_i2c_xfer()
634 	ret = tegra_i2c_clock_enable(i2c_dev);  in tegra_i2c_xfer()
636 		dev_err(i2c_dev->dev, "Clock enable failed %d\n", ret);  in tegra_i2c_xfer()
648 		ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], end_type);  in tegra_i2c_xfer()
652 	tegra_i2c_clock_disable(i2c_dev);  in tegra_i2c_xfer()
658 	struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap);  in tegra_i2c_func()  local
662 	if (i2c_dev->hw->has_continue_xfer_support)  in tegra_i2c_func()
708 	struct tegra_i2c_dev *i2c_dev;  in tegra_i2c_probe()  local
735 	i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);  in tegra_i2c_probe()
736 	if (!i2c_dev)  in tegra_i2c_probe()
739 	i2c_dev->base = base;  in tegra_i2c_probe()
740 	i2c_dev->div_clk = div_clk;  in tegra_i2c_probe()
741 	i2c_dev->adapter.algo = &tegra_i2c_algo;  in tegra_i2c_probe()
742 	i2c_dev->irq = irq;  in tegra_i2c_probe()
743 	i2c_dev->cont_id = pdev->id;  in tegra_i2c_probe()
744 	i2c_dev->dev = &pdev->dev;  in tegra_i2c_probe()
746 	i2c_dev->rst = devm_reset_control_get(&pdev->dev, "i2c");  in tegra_i2c_probe()
747 	if (IS_ERR(i2c_dev->rst)) {  in tegra_i2c_probe()
749 		return PTR_ERR(i2c_dev->rst);  in tegra_i2c_probe()
752 	ret = of_property_read_u32(i2c_dev->dev->of_node, "clock-frequency",  in tegra_i2c_probe()
753 					&i2c_dev->bus_clk_rate);  in tegra_i2c_probe()
755 		i2c_dev->bus_clk_rate = 100000; /* default clock rate */  in tegra_i2c_probe()
757 	i2c_dev->hw = &tegra20_i2c_hw;  in tegra_i2c_probe()
762 		i2c_dev->hw = match->data;  in tegra_i2c_probe()
763 		i2c_dev->is_dvc = of_device_is_compatible(pdev->dev.of_node,  in tegra_i2c_probe()
766 		i2c_dev->is_dvc = 1;  in tegra_i2c_probe()
768 	init_completion(&i2c_dev->msg_complete);  in tegra_i2c_probe()
770 	if (!i2c_dev->hw->has_single_clk_source) {  in tegra_i2c_probe()
776 		i2c_dev->fast_clk = fast_clk;  in tegra_i2c_probe()
779 	platform_set_drvdata(pdev, i2c_dev);  in tegra_i2c_probe()
781 	if (!i2c_dev->hw->has_single_clk_source) {  in tegra_i2c_probe()
782 		ret = clk_prepare(i2c_dev->fast_clk);  in tegra_i2c_probe()
784 			dev_err(i2c_dev->dev, "Clock prepare failed %d\n", ret);  in tegra_i2c_probe()
789 	clk_multiplier *= (i2c_dev->hw->clk_divisor_std_fast_mode + 1);  in tegra_i2c_probe()
790 	ret = clk_set_rate(i2c_dev->div_clk,  in tegra_i2c_probe()
791 			   i2c_dev->bus_clk_rate * clk_multiplier);  in tegra_i2c_probe()
793 		dev_err(i2c_dev->dev, "Clock rate change failed %d\n", ret);  in tegra_i2c_probe()
797 	ret = clk_prepare(i2c_dev->div_clk);  in tegra_i2c_probe()
799 		dev_err(i2c_dev->dev, "Clock prepare failed %d\n", ret);  in tegra_i2c_probe()
803 	ret = tegra_i2c_init(i2c_dev);  in tegra_i2c_probe()
809 	ret = devm_request_irq(&pdev->dev, i2c_dev->irq,  in tegra_i2c_probe()
810 			tegra_i2c_isr, 0, dev_name(&pdev->dev), i2c_dev);  in tegra_i2c_probe()
812 		dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq);  in tegra_i2c_probe()
816 	i2c_set_adapdata(&i2c_dev->adapter, i2c_dev);  in tegra_i2c_probe()
817 	i2c_dev->adapter.owner = THIS_MODULE;  in tegra_i2c_probe()
818 	i2c_dev->adapter.class = I2C_CLASS_DEPRECATED;  in tegra_i2c_probe()
819 	strlcpy(i2c_dev->adapter.name, "Tegra I2C adapter",  in tegra_i2c_probe()
820 		sizeof(i2c_dev->adapter.name));  in tegra_i2c_probe()
821 	i2c_dev->adapter.algo = &tegra_i2c_algo;  in tegra_i2c_probe()
822 	i2c_dev->adapter.dev.parent = &pdev->dev;  in tegra_i2c_probe()
823 	i2c_dev->adapter.nr = pdev->id;  in tegra_i2c_probe()
824 	i2c_dev->adapter.dev.of_node = pdev->dev.of_node;  in tegra_i2c_probe()
826 	ret = i2c_add_numbered_adapter(&i2c_dev->adapter);  in tegra_i2c_probe()
835 	clk_unprepare(i2c_dev->div_clk);  in tegra_i2c_probe()
838 	if (!i2c_dev->hw->has_single_clk_source)  in tegra_i2c_probe()
839 		clk_unprepare(i2c_dev->fast_clk);  in tegra_i2c_probe()
846 	struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev);  in tegra_i2c_remove()  local
847 	i2c_del_adapter(&i2c_dev->adapter);  in tegra_i2c_remove()
849 	clk_unprepare(i2c_dev->div_clk);  in tegra_i2c_remove()
850 	if (!i2c_dev->hw->has_single_clk_source)  in tegra_i2c_remove()
851 		clk_unprepare(i2c_dev->fast_clk);  in tegra_i2c_remove()
859 	struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev);  in tegra_i2c_suspend()  local
861 	i2c_lock_adapter(&i2c_dev->adapter);  in tegra_i2c_suspend()
862 	i2c_dev->is_suspended = true;  in tegra_i2c_suspend()
863 	i2c_unlock_adapter(&i2c_dev->adapter);  in tegra_i2c_suspend()
870 	struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev);  in tegra_i2c_resume()  local
873 	i2c_lock_adapter(&i2c_dev->adapter);  in tegra_i2c_resume()
875 	ret = tegra_i2c_init(i2c_dev);  in tegra_i2c_resume()
878 		i2c_unlock_adapter(&i2c_dev->adapter);  in tegra_i2c_resume()
882 	i2c_dev->is_suspended = false;  in tegra_i2c_resume()
884 	i2c_unlock_adapter(&i2c_dev->adapter);  in tegra_i2c_resume()