64 	int base;  member
82 #define NVIDIA_SMB_PRTCL	(smbus->base + 0x00)	/* protocol, PEC */
83 #define NVIDIA_SMB_STS		(smbus->base + 0x01)	/* status */
84 #define NVIDIA_SMB_ADDR		(smbus->base + 0x02)	/* address */
85 #define NVIDIA_SMB_CMD		(smbus->base + 0x03)	/* command */
86 #define NVIDIA_SMB_DATA		(smbus->base + 0x04)	/* 32 data registers */
87 #define NVIDIA_SMB_BCNT		(smbus->base + 0x24)	/* number of data
89 #define NVIDIA_SMB_STATUS_ABRT	(smbus->base + 0x3c)	/* register used to
92 #define NVIDIA_SMB_CTRL		(smbus->base + 0x3e)	/* control register */
331 	smbus->base = pci_resource_start(dev, bar);  in nforce2_probe_smb()
332 	if (smbus->base) {  in nforce2_probe_smb()
345 		smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;  in nforce2_probe_smb()
349 	error = acpi_check_region(smbus->base, smbus->size,  in nforce2_probe_smb()
354 	if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {  in nforce2_probe_smb()
356 			smbus->base, smbus->base+smbus->size-1, name);  in nforce2_probe_smb()
365 		"SMBus nForce2 adapter at %04x", smbus->base);  in nforce2_probe_smb()
370 		release_region(smbus->base, smbus->size);  in nforce2_probe_smb()
374 		smbus->base);  in nforce2_probe_smb()
403 		smbuses[0].base = 0;	/* to have a check value */  in nforce2_probe()
409 		smbuses[1].base = 0;  in nforce2_probe()
414 			smbuses[1].base = 0;	/* to have a check value */  in nforce2_probe()
433 	if (smbuses[0].base) {  in nforce2_remove()
435 		release_region(smbuses[0].base, smbuses[0].size);  in nforce2_remove()
437 	if (smbuses[1].base) {  in nforce2_remove()
439 		release_region(smbuses[1].base, smbuses[1].size);  in nforce2_remove()