Lines Matching refs:drvdata
44 static inline void etm_writel(struct etm_drvdata *drvdata, in etm_writel() argument
47 if (drvdata->use_cp14) { in etm_writel()
49 dev_err(drvdata->dev, in etm_writel()
53 writel_relaxed(val, drvdata->base + off); in etm_writel()
57 static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off) in etm_readl() argument
61 if (drvdata->use_cp14) { in etm_readl()
63 dev_err(drvdata->dev, in etm_readl()
67 val = readl_relaxed(drvdata->base + off); in etm_readl()
80 struct etm_drvdata *drvdata = (struct etm_drvdata *)info; in etm_os_unlock() local
82 etm_writel(drvdata, 0x0, ETMOSLAR); in etm_os_unlock()
86 static void etm_set_pwrdwn(struct etm_drvdata *drvdata) in etm_set_pwrdwn() argument
93 etmcr = etm_readl(drvdata, ETMCR); in etm_set_pwrdwn()
95 etm_writel(drvdata, etmcr, ETMCR); in etm_set_pwrdwn()
98 static void etm_clr_pwrdwn(struct etm_drvdata *drvdata) in etm_clr_pwrdwn() argument
102 etmcr = etm_readl(drvdata, ETMCR); in etm_clr_pwrdwn()
104 etm_writel(drvdata, etmcr, ETMCR); in etm_clr_pwrdwn()
110 static void etm_set_pwrup(struct etm_drvdata *drvdata) in etm_set_pwrup() argument
114 etmpdcr = readl_relaxed(drvdata->base + ETMPDCR); in etm_set_pwrup()
116 writel_relaxed(etmpdcr, drvdata->base + ETMPDCR); in etm_set_pwrup()
122 static void etm_clr_pwrup(struct etm_drvdata *drvdata) in etm_clr_pwrup() argument
129 etmpdcr = readl_relaxed(drvdata->base + ETMPDCR); in etm_clr_pwrup()
131 writel_relaxed(etmpdcr, drvdata->base + ETMPDCR); in etm_clr_pwrup()
148 static int coresight_timeout_etm(struct etm_drvdata *drvdata, u32 offset, in coresight_timeout_etm() argument
155 val = etm_readl(drvdata, offset); in coresight_timeout_etm()
179 static void etm_set_prog(struct etm_drvdata *drvdata) in etm_set_prog() argument
183 etmcr = etm_readl(drvdata, ETMCR); in etm_set_prog()
185 etm_writel(drvdata, etmcr, ETMCR); in etm_set_prog()
191 if (coresight_timeout_etm(drvdata, ETMSR, ETMSR_PROG_BIT, 1)) { in etm_set_prog()
192 dev_err(drvdata->dev, in etm_set_prog()
197 static void etm_clr_prog(struct etm_drvdata *drvdata) in etm_clr_prog() argument
201 etmcr = etm_readl(drvdata, ETMCR); in etm_clr_prog()
203 etm_writel(drvdata, etmcr, ETMCR); in etm_clr_prog()
209 if (coresight_timeout_etm(drvdata, ETMSR, ETMSR_PROG_BIT, 0)) { in etm_clr_prog()
210 dev_err(drvdata->dev, in etm_clr_prog()
215 static void etm_set_default(struct etm_drvdata *drvdata) in etm_set_default() argument
219 drvdata->trigger_event = ETM_DEFAULT_EVENT_VAL; in etm_set_default()
220 drvdata->enable_event = ETM_HARD_WIRE_RES_A; in etm_set_default()
222 drvdata->seq_12_event = ETM_DEFAULT_EVENT_VAL; in etm_set_default()
223 drvdata->seq_21_event = ETM_DEFAULT_EVENT_VAL; in etm_set_default()
224 drvdata->seq_23_event = ETM_DEFAULT_EVENT_VAL; in etm_set_default()
225 drvdata->seq_31_event = ETM_DEFAULT_EVENT_VAL; in etm_set_default()
226 drvdata->seq_32_event = ETM_DEFAULT_EVENT_VAL; in etm_set_default()
227 drvdata->seq_13_event = ETM_DEFAULT_EVENT_VAL; in etm_set_default()
228 drvdata->timestamp_event = ETM_DEFAULT_EVENT_VAL; in etm_set_default()
230 for (i = 0; i < drvdata->nr_cntr; i++) { in etm_set_default()
231 drvdata->cntr_rld_val[i] = 0x0; in etm_set_default()
232 drvdata->cntr_event[i] = ETM_DEFAULT_EVENT_VAL; in etm_set_default()
233 drvdata->cntr_rld_event[i] = ETM_DEFAULT_EVENT_VAL; in etm_set_default()
234 drvdata->cntr_val[i] = 0x0; in etm_set_default()
237 drvdata->seq_curr_state = 0x0; in etm_set_default()
238 drvdata->ctxid_idx = 0x0; in etm_set_default()
239 for (i = 0; i < drvdata->nr_ctxid_cmp; i++) in etm_set_default()
240 drvdata->ctxid_val[i] = 0x0; in etm_set_default()
241 drvdata->ctxid_mask = 0x0; in etm_set_default()
248 struct etm_drvdata *drvdata = info; in etm_enable_hw() local
250 CS_UNLOCK(drvdata->base); in etm_enable_hw()
253 etm_clr_pwrdwn(drvdata); in etm_enable_hw()
255 etm_set_pwrup(drvdata); in etm_enable_hw()
257 etm_os_unlock(drvdata); in etm_enable_hw()
259 etm_set_prog(drvdata); in etm_enable_hw()
261 etmcr = etm_readl(drvdata, ETMCR); in etm_enable_hw()
263 etmcr |= drvdata->port_size; in etm_enable_hw()
264 etm_writel(drvdata, drvdata->ctrl | etmcr, ETMCR); in etm_enable_hw()
265 etm_writel(drvdata, drvdata->trigger_event, ETMTRIGGER); in etm_enable_hw()
266 etm_writel(drvdata, drvdata->startstop_ctrl, ETMTSSCR); in etm_enable_hw()
267 etm_writel(drvdata, drvdata->enable_event, ETMTEEVR); in etm_enable_hw()
268 etm_writel(drvdata, drvdata->enable_ctrl1, ETMTECR1); in etm_enable_hw()
269 etm_writel(drvdata, drvdata->fifofull_level, ETMFFLR); in etm_enable_hw()
270 for (i = 0; i < drvdata->nr_addr_cmp; i++) { in etm_enable_hw()
271 etm_writel(drvdata, drvdata->addr_val[i], ETMACVRn(i)); in etm_enable_hw()
272 etm_writel(drvdata, drvdata->addr_acctype[i], ETMACTRn(i)); in etm_enable_hw()
274 for (i = 0; i < drvdata->nr_cntr; i++) { in etm_enable_hw()
275 etm_writel(drvdata, drvdata->cntr_rld_val[i], ETMCNTRLDVRn(i)); in etm_enable_hw()
276 etm_writel(drvdata, drvdata->cntr_event[i], ETMCNTENRn(i)); in etm_enable_hw()
277 etm_writel(drvdata, drvdata->cntr_rld_event[i], in etm_enable_hw()
279 etm_writel(drvdata, drvdata->cntr_val[i], ETMCNTVRn(i)); in etm_enable_hw()
281 etm_writel(drvdata, drvdata->seq_12_event, ETMSQ12EVR); in etm_enable_hw()
282 etm_writel(drvdata, drvdata->seq_21_event, ETMSQ21EVR); in etm_enable_hw()
283 etm_writel(drvdata, drvdata->seq_23_event, ETMSQ23EVR); in etm_enable_hw()
284 etm_writel(drvdata, drvdata->seq_31_event, ETMSQ31EVR); in etm_enable_hw()
285 etm_writel(drvdata, drvdata->seq_32_event, ETMSQ32EVR); in etm_enable_hw()
286 etm_writel(drvdata, drvdata->seq_13_event, ETMSQ13EVR); in etm_enable_hw()
287 etm_writel(drvdata, drvdata->seq_curr_state, ETMSQR); in etm_enable_hw()
288 for (i = 0; i < drvdata->nr_ext_out; i++) in etm_enable_hw()
289 etm_writel(drvdata, ETM_DEFAULT_EVENT_VAL, ETMEXTOUTEVRn(i)); in etm_enable_hw()
290 for (i = 0; i < drvdata->nr_ctxid_cmp; i++) in etm_enable_hw()
291 etm_writel(drvdata, drvdata->ctxid_val[i], ETMCIDCVRn(i)); in etm_enable_hw()
292 etm_writel(drvdata, drvdata->ctxid_mask, ETMCIDCMR); in etm_enable_hw()
293 etm_writel(drvdata, drvdata->sync_freq, ETMSYNCFR); in etm_enable_hw()
295 etm_writel(drvdata, 0x0, ETMEXTINSELR); in etm_enable_hw()
296 etm_writel(drvdata, drvdata->timestamp_event, ETMTSEVR); in etm_enable_hw()
298 etm_writel(drvdata, 0x0, ETMAUXCR); in etm_enable_hw()
299 etm_writel(drvdata, drvdata->traceid, ETMTRACEIDR); in etm_enable_hw()
301 etm_writel(drvdata, 0x0, ETMVMIDCVR); in etm_enable_hw()
304 etm_writel(drvdata, drvdata->ctrl | ETMCR_ETM_EN | etmcr, ETMCR); in etm_enable_hw()
306 etm_clr_prog(drvdata); in etm_enable_hw()
307 CS_LOCK(drvdata->base); in etm_enable_hw()
309 dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu); in etm_enable_hw()
312 static int etm_trace_id_simple(struct etm_drvdata *drvdata) in etm_trace_id_simple() argument
314 if (!drvdata->enable) in etm_trace_id_simple()
315 return drvdata->traceid; in etm_trace_id_simple()
317 return (etm_readl(drvdata, ETMTRACEIDR) & ETM_TRACEID_MASK); in etm_trace_id_simple()
322 struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); in etm_trace_id() local
326 if (!drvdata->enable) in etm_trace_id()
327 return drvdata->traceid; in etm_trace_id()
329 if (clk_prepare_enable(drvdata->clk)) in etm_trace_id()
332 spin_lock_irqsave(&drvdata->spinlock, flags); in etm_trace_id()
334 CS_UNLOCK(drvdata->base); in etm_trace_id()
335 trace_id = (etm_readl(drvdata, ETMTRACEIDR) & ETM_TRACEID_MASK); in etm_trace_id()
336 CS_LOCK(drvdata->base); in etm_trace_id()
338 spin_unlock_irqrestore(&drvdata->spinlock, flags); in etm_trace_id()
339 clk_disable_unprepare(drvdata->clk); in etm_trace_id()
346 struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); in etm_enable() local
349 ret = clk_prepare_enable(drvdata->clk); in etm_enable()
353 spin_lock(&drvdata->spinlock); in etm_enable()
360 if (cpu_online(drvdata->cpu)) { in etm_enable()
361 ret = smp_call_function_single(drvdata->cpu, in etm_enable()
362 etm_enable_hw, drvdata, 1); in etm_enable()
367 drvdata->enable = true; in etm_enable()
368 drvdata->sticky_enable = true; in etm_enable()
370 spin_unlock(&drvdata->spinlock); in etm_enable()
372 dev_info(drvdata->dev, "ETM tracing enabled\n"); in etm_enable()
375 spin_unlock(&drvdata->spinlock); in etm_enable()
376 clk_disable_unprepare(drvdata->clk); in etm_enable()
384 struct etm_drvdata *drvdata = info; in etm_disable_hw() local
386 CS_UNLOCK(drvdata->base); in etm_disable_hw()
387 etm_set_prog(drvdata); in etm_disable_hw()
390 etm_writel(drvdata, ETM_HARD_WIRE_RES_A | ETM_EVENT_NOT_A, ETMTEEVR); in etm_disable_hw()
393 drvdata->seq_curr_state = (etm_readl(drvdata, ETMSQR) & ETM_SQR_MASK); in etm_disable_hw()
395 for (i = 0; i < drvdata->nr_cntr; i++) in etm_disable_hw()
396 drvdata->cntr_val[i] = etm_readl(drvdata, ETMCNTVRn(i)); in etm_disable_hw()
398 etm_set_pwrdwn(drvdata); in etm_disable_hw()
399 CS_LOCK(drvdata->base); in etm_disable_hw()
401 dev_dbg(drvdata->dev, "cpu: %d disable smp call done\n", drvdata->cpu); in etm_disable_hw()
406 struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); in etm_disable() local
415 spin_lock(&drvdata->spinlock); in etm_disable()
421 smp_call_function_single(drvdata->cpu, etm_disable_hw, drvdata, 1); in etm_disable()
422 drvdata->enable = false; in etm_disable()
424 spin_unlock(&drvdata->spinlock); in etm_disable()
427 clk_disable_unprepare(drvdata->clk); in etm_disable()
429 dev_info(drvdata->dev, "ETM tracing disabled\n"); in etm_disable()
446 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in nr_addr_cmp_show() local
448 val = drvdata->nr_addr_cmp; in nr_addr_cmp_show()
456 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in nr_cntr_show() local
458 val = drvdata->nr_cntr; in nr_cntr_show()
467 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in nr_ctxid_cmp_show() local
469 val = drvdata->nr_ctxid_cmp; in nr_ctxid_cmp_show()
479 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in etmsr_show() local
481 ret = clk_prepare_enable(drvdata->clk); in etmsr_show()
485 spin_lock_irqsave(&drvdata->spinlock, flags); in etmsr_show()
486 CS_UNLOCK(drvdata->base); in etmsr_show()
488 val = etm_readl(drvdata, ETMSR); in etmsr_show()
490 CS_LOCK(drvdata->base); in etmsr_show()
491 spin_unlock_irqrestore(&drvdata->spinlock, flags); in etmsr_show()
492 clk_disable_unprepare(drvdata->clk); in etmsr_show()
504 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in reset_store() local
511 spin_lock(&drvdata->spinlock); in reset_store()
512 drvdata->mode = ETM_MODE_EXCLUDE; in reset_store()
513 drvdata->ctrl = 0x0; in reset_store()
514 drvdata->trigger_event = ETM_DEFAULT_EVENT_VAL; in reset_store()
515 drvdata->startstop_ctrl = 0x0; in reset_store()
516 drvdata->addr_idx = 0x0; in reset_store()
517 for (i = 0; i < drvdata->nr_addr_cmp; i++) { in reset_store()
518 drvdata->addr_val[i] = 0x0; in reset_store()
519 drvdata->addr_acctype[i] = 0x0; in reset_store()
520 drvdata->addr_type[i] = ETM_ADDR_TYPE_NONE; in reset_store()
522 drvdata->cntr_idx = 0x0; in reset_store()
524 etm_set_default(drvdata); in reset_store()
525 spin_unlock(&drvdata->spinlock); in reset_store()
536 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in mode_show() local
538 val = drvdata->mode; in mode_show()
548 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in mode_store() local
554 spin_lock(&drvdata->spinlock); in mode_store()
555 drvdata->mode = val & ETM_MODE_ALL; in mode_store()
557 if (drvdata->mode & ETM_MODE_EXCLUDE) in mode_store()
558 drvdata->enable_ctrl1 |= ETMTECR1_INC_EXC; in mode_store()
560 drvdata->enable_ctrl1 &= ~ETMTECR1_INC_EXC; in mode_store()
562 if (drvdata->mode & ETM_MODE_CYCACC) in mode_store()
563 drvdata->ctrl |= ETMCR_CYC_ACC; in mode_store()
565 drvdata->ctrl &= ~ETMCR_CYC_ACC; in mode_store()
567 if (drvdata->mode & ETM_MODE_STALL) { in mode_store()
568 if (!(drvdata->etmccr & ETMCCR_FIFOFULL)) { in mode_store()
569 dev_warn(drvdata->dev, "stall mode not supported\n"); in mode_store()
573 drvdata->ctrl |= ETMCR_STALL_MODE; in mode_store()
575 drvdata->ctrl &= ~ETMCR_STALL_MODE; in mode_store()
577 if (drvdata->mode & ETM_MODE_TIMESTAMP) { in mode_store()
578 if (!(drvdata->etmccer & ETMCCER_TIMESTAMP)) { in mode_store()
579 dev_warn(drvdata->dev, "timestamp not supported\n"); in mode_store()
583 drvdata->ctrl |= ETMCR_TIMESTAMP_EN; in mode_store()
585 drvdata->ctrl &= ~ETMCR_TIMESTAMP_EN; in mode_store()
587 if (drvdata->mode & ETM_MODE_CTXID) in mode_store()
588 drvdata->ctrl |= ETMCR_CTXID_SIZE; in mode_store()
590 drvdata->ctrl &= ~ETMCR_CTXID_SIZE; in mode_store()
591 spin_unlock(&drvdata->spinlock); in mode_store()
596 spin_unlock(&drvdata->spinlock); in mode_store()
605 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in trigger_event_show() local
607 val = drvdata->trigger_event; in trigger_event_show()
617 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in trigger_event_store() local
623 drvdata->trigger_event = val & ETM_EVENT_MASK; in trigger_event_store()
633 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in enable_event_show() local
635 val = drvdata->enable_event; in enable_event_show()
645 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in enable_event_store() local
651 drvdata->enable_event = val & ETM_EVENT_MASK; in enable_event_store()
661 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in fifofull_level_show() local
663 val = drvdata->fifofull_level; in fifofull_level_show()
673 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in fifofull_level_store() local
679 drvdata->fifofull_level = val; in fifofull_level_store()
689 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_idx_show() local
691 val = drvdata->addr_idx; in addr_idx_show()
701 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_idx_store() local
707 if (val >= drvdata->nr_addr_cmp) in addr_idx_store()
714 spin_lock(&drvdata->spinlock); in addr_idx_store()
715 drvdata->addr_idx = val; in addr_idx_store()
716 spin_unlock(&drvdata->spinlock); in addr_idx_store()
727 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_single_show() local
729 spin_lock(&drvdata->spinlock); in addr_single_show()
730 idx = drvdata->addr_idx; in addr_single_show()
731 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || in addr_single_show()
732 drvdata->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) { in addr_single_show()
733 spin_unlock(&drvdata->spinlock); in addr_single_show()
737 val = drvdata->addr_val[idx]; in addr_single_show()
738 spin_unlock(&drvdata->spinlock); in addr_single_show()
750 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_single_store() local
756 spin_lock(&drvdata->spinlock); in addr_single_store()
757 idx = drvdata->addr_idx; in addr_single_store()
758 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || in addr_single_store()
759 drvdata->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) { in addr_single_store()
760 spin_unlock(&drvdata->spinlock); in addr_single_store()
764 drvdata->addr_val[idx] = val; in addr_single_store()
765 drvdata->addr_type[idx] = ETM_ADDR_TYPE_SINGLE; in addr_single_store()
766 spin_unlock(&drvdata->spinlock); in addr_single_store()
777 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_range_show() local
779 spin_lock(&drvdata->spinlock); in addr_range_show()
780 idx = drvdata->addr_idx; in addr_range_show()
782 spin_unlock(&drvdata->spinlock); in addr_range_show()
785 if (!((drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE && in addr_range_show()
786 drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) || in addr_range_show()
787 (drvdata->addr_type[idx] == ETM_ADDR_TYPE_RANGE && in addr_range_show()
788 drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) { in addr_range_show()
789 spin_unlock(&drvdata->spinlock); in addr_range_show()
793 val1 = drvdata->addr_val[idx]; in addr_range_show()
794 val2 = drvdata->addr_val[idx + 1]; in addr_range_show()
795 spin_unlock(&drvdata->spinlock); in addr_range_show()
806 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_range_store() local
814 spin_lock(&drvdata->spinlock); in addr_range_store()
815 idx = drvdata->addr_idx; in addr_range_store()
817 spin_unlock(&drvdata->spinlock); in addr_range_store()
820 if (!((drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE && in addr_range_store()
821 drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) || in addr_range_store()
822 (drvdata->addr_type[idx] == ETM_ADDR_TYPE_RANGE && in addr_range_store()
823 drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) { in addr_range_store()
824 spin_unlock(&drvdata->spinlock); in addr_range_store()
828 drvdata->addr_val[idx] = val1; in addr_range_store()
829 drvdata->addr_type[idx] = ETM_ADDR_TYPE_RANGE; in addr_range_store()
830 drvdata->addr_val[idx + 1] = val2; in addr_range_store()
831 drvdata->addr_type[idx + 1] = ETM_ADDR_TYPE_RANGE; in addr_range_store()
832 drvdata->enable_ctrl1 |= (1 << (idx/2)); in addr_range_store()
833 spin_unlock(&drvdata->spinlock); in addr_range_store()
844 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_start_show() local
846 spin_lock(&drvdata->spinlock); in addr_start_show()
847 idx = drvdata->addr_idx; in addr_start_show()
848 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || in addr_start_show()
849 drvdata->addr_type[idx] == ETM_ADDR_TYPE_START)) { in addr_start_show()
850 spin_unlock(&drvdata->spinlock); in addr_start_show()
854 val = drvdata->addr_val[idx]; in addr_start_show()
855 spin_unlock(&drvdata->spinlock); in addr_start_show()
867 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_start_store() local
873 spin_lock(&drvdata->spinlock); in addr_start_store()
874 idx = drvdata->addr_idx; in addr_start_store()
875 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || in addr_start_store()
876 drvdata->addr_type[idx] == ETM_ADDR_TYPE_START)) { in addr_start_store()
877 spin_unlock(&drvdata->spinlock); in addr_start_store()
881 drvdata->addr_val[idx] = val; in addr_start_store()
882 drvdata->addr_type[idx] = ETM_ADDR_TYPE_START; in addr_start_store()
883 drvdata->startstop_ctrl |= (1 << idx); in addr_start_store()
884 drvdata->enable_ctrl1 |= BIT(25); in addr_start_store()
885 spin_unlock(&drvdata->spinlock); in addr_start_store()
896 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_stop_show() local
898 spin_lock(&drvdata->spinlock); in addr_stop_show()
899 idx = drvdata->addr_idx; in addr_stop_show()
900 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || in addr_stop_show()
901 drvdata->addr_type[idx] == ETM_ADDR_TYPE_STOP)) { in addr_stop_show()
902 spin_unlock(&drvdata->spinlock); in addr_stop_show()
906 val = drvdata->addr_val[idx]; in addr_stop_show()
907 spin_unlock(&drvdata->spinlock); in addr_stop_show()
919 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_stop_store() local
925 spin_lock(&drvdata->spinlock); in addr_stop_store()
926 idx = drvdata->addr_idx; in addr_stop_store()
927 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE || in addr_stop_store()
928 drvdata->addr_type[idx] == ETM_ADDR_TYPE_STOP)) { in addr_stop_store()
929 spin_unlock(&drvdata->spinlock); in addr_stop_store()
933 drvdata->addr_val[idx] = val; in addr_stop_store()
934 drvdata->addr_type[idx] = ETM_ADDR_TYPE_STOP; in addr_stop_store()
935 drvdata->startstop_ctrl |= (1 << (idx + 16)); in addr_stop_store()
936 drvdata->enable_ctrl1 |= ETMTECR1_START_STOP; in addr_stop_store()
937 spin_unlock(&drvdata->spinlock); in addr_stop_store()
947 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_acctype_show() local
949 spin_lock(&drvdata->spinlock); in addr_acctype_show()
950 val = drvdata->addr_acctype[drvdata->addr_idx]; in addr_acctype_show()
951 spin_unlock(&drvdata->spinlock); in addr_acctype_show()
962 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in addr_acctype_store() local
968 spin_lock(&drvdata->spinlock); in addr_acctype_store()
969 drvdata->addr_acctype[drvdata->addr_idx] = val; in addr_acctype_store()
970 spin_unlock(&drvdata->spinlock); in addr_acctype_store()
980 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntr_idx_show() local
982 val = drvdata->cntr_idx; in cntr_idx_show()
992 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntr_idx_store() local
998 if (val >= drvdata->nr_cntr) in cntr_idx_store()
1004 spin_lock(&drvdata->spinlock); in cntr_idx_store()
1005 drvdata->cntr_idx = val; in cntr_idx_store()
1006 spin_unlock(&drvdata->spinlock); in cntr_idx_store()
1016 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntr_rld_val_show() local
1018 spin_lock(&drvdata->spinlock); in cntr_rld_val_show()
1019 val = drvdata->cntr_rld_val[drvdata->cntr_idx]; in cntr_rld_val_show()
1020 spin_unlock(&drvdata->spinlock); in cntr_rld_val_show()
1031 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntr_rld_val_store() local
1037 spin_lock(&drvdata->spinlock); in cntr_rld_val_store()
1038 drvdata->cntr_rld_val[drvdata->cntr_idx] = val; in cntr_rld_val_store()
1039 spin_unlock(&drvdata->spinlock); in cntr_rld_val_store()
1049 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntr_event_show() local
1051 spin_lock(&drvdata->spinlock); in cntr_event_show()
1052 val = drvdata->cntr_event[drvdata->cntr_idx]; in cntr_event_show()
1053 spin_unlock(&drvdata->spinlock); in cntr_event_show()
1064 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntr_event_store() local
1070 spin_lock(&drvdata->spinlock); in cntr_event_store()
1071 drvdata->cntr_event[drvdata->cntr_idx] = val & ETM_EVENT_MASK; in cntr_event_store()
1072 spin_unlock(&drvdata->spinlock); in cntr_event_store()
1082 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntr_rld_event_show() local
1084 spin_lock(&drvdata->spinlock); in cntr_rld_event_show()
1085 val = drvdata->cntr_rld_event[drvdata->cntr_idx]; in cntr_rld_event_show()
1086 spin_unlock(&drvdata->spinlock); in cntr_rld_event_show()
1097 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntr_rld_event_store() local
1103 spin_lock(&drvdata->spinlock); in cntr_rld_event_store()
1104 drvdata->cntr_rld_event[drvdata->cntr_idx] = val & ETM_EVENT_MASK; in cntr_rld_event_store()
1105 spin_unlock(&drvdata->spinlock); in cntr_rld_event_store()
1116 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntr_val_show() local
1118 if (!drvdata->enable) { in cntr_val_show()
1119 spin_lock(&drvdata->spinlock); in cntr_val_show()
1120 for (i = 0; i < drvdata->nr_cntr; i++) in cntr_val_show()
1122 i, drvdata->cntr_val[i]); in cntr_val_show()
1123 spin_unlock(&drvdata->spinlock); in cntr_val_show()
1127 for (i = 0; i < drvdata->nr_cntr; i++) { in cntr_val_show()
1128 val = etm_readl(drvdata, ETMCNTVRn(i)); in cntr_val_show()
1141 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in cntr_val_store() local
1147 spin_lock(&drvdata->spinlock); in cntr_val_store()
1148 drvdata->cntr_val[drvdata->cntr_idx] = val; in cntr_val_store()
1149 spin_unlock(&drvdata->spinlock); in cntr_val_store()
1159 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_12_event_show() local
1161 val = drvdata->seq_12_event; in seq_12_event_show()
1171 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_12_event_store() local
1177 drvdata->seq_12_event = val & ETM_EVENT_MASK; in seq_12_event_store()
1186 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_21_event_show() local
1188 val = drvdata->seq_21_event; in seq_21_event_show()
1198 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_21_event_store() local
1204 drvdata->seq_21_event = val & ETM_EVENT_MASK; in seq_21_event_store()
1213 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_23_event_show() local
1215 val = drvdata->seq_23_event; in seq_23_event_show()
1225 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_23_event_store() local
1231 drvdata->seq_23_event = val & ETM_EVENT_MASK; in seq_23_event_store()
1240 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_31_event_show() local
1242 val = drvdata->seq_31_event; in seq_31_event_show()
1252 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_31_event_store() local
1258 drvdata->seq_31_event = val & ETM_EVENT_MASK; in seq_31_event_store()
1267 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_32_event_show() local
1269 val = drvdata->seq_32_event; in seq_32_event_show()
1279 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_32_event_store() local
1285 drvdata->seq_32_event = val & ETM_EVENT_MASK; in seq_32_event_store()
1294 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_13_event_show() local
1296 val = drvdata->seq_13_event; in seq_13_event_show()
1306 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_13_event_store() local
1312 drvdata->seq_13_event = val & ETM_EVENT_MASK; in seq_13_event_store()
1322 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_curr_state_show() local
1324 if (!drvdata->enable) { in seq_curr_state_show()
1325 val = drvdata->seq_curr_state; in seq_curr_state_show()
1329 ret = clk_prepare_enable(drvdata->clk); in seq_curr_state_show()
1333 spin_lock_irqsave(&drvdata->spinlock, flags); in seq_curr_state_show()
1335 CS_UNLOCK(drvdata->base); in seq_curr_state_show()
1336 val = (etm_readl(drvdata, ETMSQR) & ETM_SQR_MASK); in seq_curr_state_show()
1337 CS_LOCK(drvdata->base); in seq_curr_state_show()
1339 spin_unlock_irqrestore(&drvdata->spinlock, flags); in seq_curr_state_show()
1340 clk_disable_unprepare(drvdata->clk); in seq_curr_state_show()
1351 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in seq_curr_state_store() local
1360 drvdata->seq_curr_state = val; in seq_curr_state_store()
1370 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in ctxid_idx_show() local
1372 val = drvdata->ctxid_idx; in ctxid_idx_show()
1382 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in ctxid_idx_store() local
1388 if (val >= drvdata->nr_ctxid_cmp) in ctxid_idx_store()
1395 spin_lock(&drvdata->spinlock); in ctxid_idx_store()
1396 drvdata->ctxid_idx = val; in ctxid_idx_store()
1397 spin_unlock(&drvdata->spinlock); in ctxid_idx_store()
1407 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in ctxid_val_show() local
1409 spin_lock(&drvdata->spinlock); in ctxid_val_show()
1410 val = drvdata->ctxid_val[drvdata->ctxid_idx]; in ctxid_val_show()
1411 spin_unlock(&drvdata->spinlock); in ctxid_val_show()
1422 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in ctxid_val_store() local
1428 spin_lock(&drvdata->spinlock); in ctxid_val_store()
1429 drvdata->ctxid_val[drvdata->ctxid_idx] = val; in ctxid_val_store()
1430 spin_unlock(&drvdata->spinlock); in ctxid_val_store()
1440 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in ctxid_mask_show() local
1442 val = drvdata->ctxid_mask; in ctxid_mask_show()
1452 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in ctxid_mask_store() local
1458 drvdata->ctxid_mask = val; in ctxid_mask_store()
1467 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in sync_freq_show() local
1469 val = drvdata->sync_freq; in sync_freq_show()
1479 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in sync_freq_store() local
1485 drvdata->sync_freq = val & ETM_SYNC_MASK; in sync_freq_store()
1494 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in timestamp_event_show() local
1496 val = drvdata->timestamp_event; in timestamp_event_show()
1506 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in timestamp_event_store() local
1512 drvdata->timestamp_event = val & ETM_EVENT_MASK; in timestamp_event_store()
1522 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in status_show() local
1524 ret = clk_prepare_enable(drvdata->clk); in status_show()
1528 spin_lock_irqsave(&drvdata->spinlock, flags); in status_show()
1530 CS_UNLOCK(drvdata->base); in status_show()
1542 drvdata->etmccr, drvdata->etmccer, in status_show()
1543 etm_readl(drvdata, ETMSCR), etm_readl(drvdata, ETMIDR), in status_show()
1544 etm_readl(drvdata, ETMCR), etm_trace_id_simple(drvdata), in status_show()
1545 etm_readl(drvdata, ETMTEEVR), in status_show()
1546 etm_readl(drvdata, ETMTSSCR), in status_show()
1547 etm_readl(drvdata, ETMTECR1), in status_show()
1548 etm_readl(drvdata, ETMTECR2), in status_show()
1549 drvdata->cpu); in status_show()
1550 CS_LOCK(drvdata->base); in status_show()
1552 spin_unlock_irqrestore(&drvdata->spinlock, flags); in status_show()
1553 clk_disable_unprepare(drvdata->clk); in status_show()
1564 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in traceid_show() local
1566 if (!drvdata->enable) { in traceid_show()
1567 val = drvdata->traceid; in traceid_show()
1571 ret = clk_prepare_enable(drvdata->clk); in traceid_show()
1575 spin_lock_irqsave(&drvdata->spinlock, flags); in traceid_show()
1576 CS_UNLOCK(drvdata->base); in traceid_show()
1578 val = (etm_readl(drvdata, ETMTRACEIDR) & ETM_TRACEID_MASK); in traceid_show()
1580 CS_LOCK(drvdata->base); in traceid_show()
1581 spin_unlock_irqrestore(&drvdata->spinlock, flags); in traceid_show()
1582 clk_disable_unprepare(drvdata->clk); in traceid_show()
1593 struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); in traceid_store() local
1599 drvdata->traceid = val & ETM_TRACEID_MASK; in traceid_store()
1706 struct etm_drvdata *drvdata = info; in etm_init_arch_data() local
1708 CS_UNLOCK(drvdata->base); in etm_init_arch_data()
1711 (void)etm_readl(drvdata, ETMPDSR); in etm_init_arch_data()
1713 etm_set_pwrup(drvdata); in etm_init_arch_data()
1718 etm_clr_pwrdwn(drvdata); in etm_init_arch_data()
1723 etm_set_prog(drvdata); in etm_init_arch_data()
1726 etmidr = etm_readl(drvdata, ETMIDR); in etm_init_arch_data()
1727 drvdata->arch = BMVAL(etmidr, 4, 11); in etm_init_arch_data()
1728 drvdata->port_size = etm_readl(drvdata, ETMCR) & PORT_SIZE_MASK; in etm_init_arch_data()
1730 drvdata->etmccer = etm_readl(drvdata, ETMCCER); in etm_init_arch_data()
1731 etmccr = etm_readl(drvdata, ETMCCR); in etm_init_arch_data()
1732 drvdata->etmccr = etmccr; in etm_init_arch_data()
1733 drvdata->nr_addr_cmp = BMVAL(etmccr, 0, 3) * 2; in etm_init_arch_data()
1734 drvdata->nr_cntr = BMVAL(etmccr, 13, 15); in etm_init_arch_data()
1735 drvdata->nr_ext_inp = BMVAL(etmccr, 17, 19); in etm_init_arch_data()
1736 drvdata->nr_ext_out = BMVAL(etmccr, 20, 22); in etm_init_arch_data()
1737 drvdata->nr_ctxid_cmp = BMVAL(etmccr, 24, 25); in etm_init_arch_data()
1739 etm_set_pwrdwn(drvdata); in etm_init_arch_data()
1740 etm_clr_pwrup(drvdata); in etm_init_arch_data()
1741 CS_LOCK(drvdata->base); in etm_init_arch_data()
1744 static void etm_init_default_data(struct etm_drvdata *drvdata) in etm_init_default_data() argument
1765 drvdata->traceid = etm3x_traceid++; in etm_init_default_data()
1766 drvdata->ctrl = (ETMCR_CYC_ACC | ETMCR_TIMESTAMP_EN); in etm_init_default_data()
1767 drvdata->enable_ctrl1 = ETMTECR1_ADDR_COMP_1; in etm_init_default_data()
1768 if (drvdata->nr_addr_cmp >= 2) { in etm_init_default_data()
1769 drvdata->addr_val[0] = (u32) _stext; in etm_init_default_data()
1770 drvdata->addr_val[1] = (u32) _etext; in etm_init_default_data()
1771 drvdata->addr_acctype[0] = flags; in etm_init_default_data()
1772 drvdata->addr_acctype[1] = flags; in etm_init_default_data()
1773 drvdata->addr_type[0] = ETM_ADDR_TYPE_RANGE; in etm_init_default_data()
1774 drvdata->addr_type[1] = ETM_ADDR_TYPE_RANGE; in etm_init_default_data()
1777 etm_set_default(drvdata); in etm_init_default_data()
1786 struct etm_drvdata *drvdata; in etm_probe() local
1795 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); in etm_probe()
1796 if (!drvdata) in etm_probe()
1805 drvdata->use_cp14 = of_property_read_bool(np, "arm,cp14"); in etm_probe()
1808 drvdata->dev = &adev->dev; in etm_probe()
1809 dev_set_drvdata(dev, drvdata); in etm_probe()
1816 drvdata->base = base; in etm_probe()
1818 spin_lock_init(&drvdata->spinlock); in etm_probe()
1820 drvdata->clk = adev->pclk; in etm_probe()
1821 ret = clk_prepare_enable(drvdata->clk); in etm_probe()
1825 drvdata->cpu = pdata ? pdata->cpu : 0; in etm_probe()
1828 etmdrvdata[drvdata->cpu] = drvdata; in etm_probe()
1830 if (!smp_call_function_single(drvdata->cpu, etm_os_unlock, drvdata, 1)) in etm_probe()
1831 drvdata->os_unlock = true; in etm_probe()
1833 if (smp_call_function_single(drvdata->cpu, in etm_probe()
1834 etm_init_arch_data, drvdata, 1)) in etm_probe()
1842 if (etm_arch_supported(drvdata->arch) == false) { in etm_probe()
1846 etm_init_default_data(drvdata); in etm_probe()
1848 clk_disable_unprepare(drvdata->clk); in etm_probe()
1856 drvdata->csdev = coresight_register(desc); in etm_probe()
1857 if (IS_ERR(drvdata->csdev)) { in etm_probe()
1858 ret = PTR_ERR(drvdata->csdev); in etm_probe()
1865 coresight_enable(drvdata->csdev); in etm_probe()
1866 drvdata->boot_enable = true; in etm_probe()
1872 clk_disable_unprepare(drvdata->clk); in etm_probe()
1880 struct etm_drvdata *drvdata = amba_get_drvdata(adev); in etm_remove() local
1882 coresight_unregister(drvdata->csdev); in etm_remove()