208 		struct ipu_di_signal_cfg *sig)  in ipu_di_sync_config_interlaced()  argument
210 	u32 h_total = sig->mode.hactive + sig->mode.hsync_len +  in ipu_di_sync_config_interlaced()
211 		sig->mode.hback_porch + sig->mode.hfront_porch;  in ipu_di_sync_config_interlaced()
212 	u32 v_total = sig->mode.vactive + sig->mode.vsync_len +  in ipu_di_sync_config_interlaced()
213 		sig->mode.vback_porch + sig->mode.vfront_porch;  in ipu_di_sync_config_interlaced()
232 			.offset_count = sig->mode.vback_porch,  in ipu_di_sync_config_interlaced()
238 			.repeat_count = sig->mode.vactive / 2,  in ipu_di_sync_config_interlaced()
252 			.offset_count = sig->mode.hback_porch,  in ipu_di_sync_config_interlaced()
254 			.repeat_count = sig->mode.hactive,  in ipu_di_sync_config_interlaced()
278 		struct ipu_di_signal_cfg *sig, int div)  in ipu_di_sync_config_noninterlaced()  argument
280 	u32 h_total = sig->mode.hactive + sig->mode.hsync_len +  in ipu_di_sync_config_noninterlaced()
281 		sig->mode.hback_porch + sig->mode.hfront_porch;  in ipu_di_sync_config_noninterlaced()
282 	u32 v_total = sig->mode.vactive + sig->mode.vsync_len +  in ipu_di_sync_config_noninterlaced()
283 		sig->mode.vback_porch + sig->mode.vfront_porch;  in ipu_di_sync_config_noninterlaced()
293 			.offset_count = div * sig->v_to_h_sync,  in ipu_di_sync_config_noninterlaced()
297 			.cnt_down = sig->mode.hsync_len * 2,  in ipu_di_sync_config_noninterlaced()
304 			.cnt_down = sig->mode.vsync_len * 2,  in ipu_di_sync_config_noninterlaced()
308 			.offset_count = sig->mode.vsync_len +  in ipu_di_sync_config_noninterlaced()
309 					sig->mode.vback_porch,  in ipu_di_sync_config_noninterlaced()
311 			.repeat_count = sig->mode.vactive,  in ipu_di_sync_config_noninterlaced()
316 			.offset_count = sig->mode.hsync_len +  in ipu_di_sync_config_noninterlaced()
317 					sig->mode.hback_porch,  in ipu_di_sync_config_noninterlaced()
319 			.repeat_count = sig->mode.hactive,  in ipu_di_sync_config_noninterlaced()
344 			.offset_count = sig->mode.vsync_len +  in ipu_di_sync_config_noninterlaced()
345 					sig->mode.vback_porch,  in ipu_di_sync_config_noninterlaced()
347 			.repeat_count = sig->mode.vactive,  in ipu_di_sync_config_noninterlaced()
353 			.offset_count = div * sig->v_to_h_sync + 18, /* magic value from Freescale TVE driver */  in ipu_di_sync_config_noninterlaced()
357 			.cnt_down = sig->mode.hsync_len * 2,  in ipu_di_sync_config_noninterlaced()
361 			.offset_count = sig->mode.hsync_len +  in ipu_di_sync_config_noninterlaced()
362 					sig->mode.hback_porch,  in ipu_di_sync_config_noninterlaced()
364 			.repeat_count = sig->mode.hactive,  in ipu_di_sync_config_noninterlaced()
374 			.cnt_down = sig->mode.vsync_len * 2,  in ipu_di_sync_config_noninterlaced()
379 			.offset_count = div * sig->v_to_h_sync + 18, /* magic value from Freescale TVE driver */  in ipu_di_sync_config_noninterlaced()
383 			.cnt_down = sig->mode.hsync_len * 2,  in ipu_di_sync_config_noninterlaced()
392 			.cnt_down = sig->mode.vsync_len * 2,  in ipu_di_sync_config_noninterlaced()
399 	if (sig->hsync_pin == 2 && sig->vsync_pin == 3)  in ipu_di_sync_config_noninterlaced()
406 	const struct ipu_di_signal_cfg *sig)  in ipu_di_config_clock()  argument
412 	if (sig->clkflags & IPU_DI_CLKMODE_EXT) {  in ipu_di_config_clock()
420 		if (sig->clkflags & IPU_DI_CLKMODE_SYNC) {  in ipu_di_config_clock()
440 			clk_set_rate(clk, sig->mode.pixelclock);  in ipu_di_config_clock()
443 			div = DIV_ROUND_CLOSEST(in_rate, sig->mode.pixelclock);  in ipu_di_config_clock()
460 		div = DIV_ROUND_CLOSEST(clkrate, sig->mode.pixelclock);  in ipu_di_config_clock()
464 		error = rate / (sig->mode.pixelclock / 1000);  in ipu_di_config_clock()
480 			clk_set_rate(clk, sig->mode.pixelclock);  in ipu_di_config_clock()
483 			div = DIV_ROUND_CLOSEST(in_rate, sig->mode.pixelclock);  in ipu_di_config_clock()
510 		sig->mode.pixelclock,  in ipu_di_config_clock()
546 int ipu_di_init_sync_panel(struct ipu_di *di, struct ipu_di_signal_cfg *sig)  in ipu_di_init_sync_panel()  argument
553 		di->id, sig->mode.hactive, sig->mode.vactive);  in ipu_di_init_sync_panel()
555 	if ((sig->mode.vsync_len == 0) || (sig->mode.hsync_len == 0))  in ipu_di_init_sync_panel()
561 		sig->mode.pixelclock);  in ipu_di_init_sync_panel()
565 	ipu_di_config_clock(di, sig);  in ipu_di_init_sync_panel()
580 	if (sig->mode.flags & DISPLAY_FLAGS_INTERLACED) {  in ipu_di_init_sync_panel()
581 		ipu_di_sync_config_interlaced(di, sig);  in ipu_di_init_sync_panel()
590 		if (sig->mode.flags & DISPLAY_FLAGS_HSYNC_HIGH)  in ipu_di_init_sync_panel()
592 		if (sig->mode.flags & DISPLAY_FLAGS_VSYNC_HIGH)  in ipu_di_init_sync_panel()
595 		ipu_di_sync_config_noninterlaced(di, sig, div);  in ipu_di_init_sync_panel()
603 			if (!(sig->hsync_pin == 2 && sig->vsync_pin == 3))  in ipu_di_init_sync_panel()
606 		if (sig->mode.flags & DISPLAY_FLAGS_HSYNC_HIGH) {  in ipu_di_init_sync_panel()
607 			if (sig->hsync_pin == 2)  in ipu_di_init_sync_panel()
609 			else if (sig->hsync_pin == 4)  in ipu_di_init_sync_panel()
611 			else if (sig->hsync_pin == 7)  in ipu_di_init_sync_panel()
614 		if (sig->mode.flags & DISPLAY_FLAGS_VSYNC_HIGH) {  in ipu_di_init_sync_panel()
615 			if (sig->vsync_pin == 3)  in ipu_di_init_sync_panel()
617 			else if (sig->vsync_pin == 6)  in ipu_di_init_sync_panel()
619 			else if (sig->vsync_pin == 8)  in ipu_di_init_sync_panel()
624 	if (sig->clk_pol)  in ipu_di_init_sync_panel()
635 	if (sig->enable_pol)  in ipu_di_init_sync_panel()
637 	if (sig->data_pol)  in ipu_di_init_sync_panel()