34 	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;  in vmw_fifo_have_3d()  local
58 	fifo_min = ioread32(fifo_mem  + SVGA_FIFO_MIN);  in vmw_fifo_have_3d()
62 	hwversion = ioread32(fifo_mem +  in vmw_fifo_have_3d()
83 	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;  in vmw_fifo_have_pitchlock()  local
89 	caps = ioread32(fifo_mem + SVGA_FIFO_CAPABILITIES);  in vmw_fifo_have_pitchlock()
98 	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;  in vmw_fifo_init()  local
136 	iowrite32(min, fifo_mem + SVGA_FIFO_MIN);  in vmw_fifo_init()
137 	iowrite32(dev_priv->mmio_size, fifo_mem + SVGA_FIFO_MAX);  in vmw_fifo_init()
139 	iowrite32(min,  fifo_mem + SVGA_FIFO_NEXT_CMD);  in vmw_fifo_init()
140 	iowrite32(min,  fifo_mem + SVGA_FIFO_STOP);  in vmw_fifo_init()
141 	iowrite32(0, fifo_mem + SVGA_FIFO_BUSY);  in vmw_fifo_init()
146 	max = ioread32(fifo_mem + SVGA_FIFO_MAX);  in vmw_fifo_init()
147 	min = ioread32(fifo_mem  + SVGA_FIFO_MIN);  in vmw_fifo_init()
148 	fifo->capabilities = ioread32(fifo_mem + SVGA_FIFO_CAPABILITIES);  in vmw_fifo_init()
156 	iowrite32(dev_priv->last_read_seqno, fifo_mem + SVGA_FIFO_FENCE);  in vmw_fifo_init()
163 	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;  in vmw_fifo_ping_host()  local
172 	if (unlikely(ioread32(fifo_mem + SVGA_FIFO_BUSY) == 0)) {  in vmw_fifo_ping_host()
173 		iowrite32(1, fifo_mem + SVGA_FIFO_BUSY);  in vmw_fifo_ping_host()
181 	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;  in vmw_fifo_release()  local
187 	dev_priv->last_read_seqno = ioread32(fifo_mem + SVGA_FIFO_FENCE);  in vmw_fifo_release()
211 	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;  in vmw_fifo_is_full()  local
212 	uint32_t max = ioread32(fifo_mem + SVGA_FIFO_MAX);  in vmw_fifo_is_full()
213 	uint32_t next_cmd = ioread32(fifo_mem + SVGA_FIFO_NEXT_CMD);  in vmw_fifo_is_full()
214 	uint32_t min = ioread32(fifo_mem + SVGA_FIFO_MIN);  in vmw_fifo_is_full()
215 	uint32_t stop = ioread32(fifo_mem + SVGA_FIFO_STOP);  in vmw_fifo_is_full()
318 	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;  in vmw_fifo_reserve()  local
326 	max = ioread32(fifo_mem + SVGA_FIFO_MAX);  in vmw_fifo_reserve()
327 	min = ioread32(fifo_mem + SVGA_FIFO_MIN);  in vmw_fifo_reserve()
328 	next_cmd = ioread32(fifo_mem + SVGA_FIFO_NEXT_CMD);  in vmw_fifo_reserve()
339 		uint32_t stop = ioread32(fifo_mem + SVGA_FIFO_STOP);  in vmw_fifo_reserve()
373 					iowrite32(bytes, fifo_mem +  in vmw_fifo_reserve()
375 				return fifo_mem + (next_cmd >> 2);  in vmw_fifo_reserve()
398 			      __le32 __iomem *fifo_mem,  in vmw_fifo_res_copy()  argument
410 	iowrite32(bytes, fifo_mem + SVGA_FIFO_RESERVED);  in vmw_fifo_res_copy()
412 	memcpy_toio(fifo_mem + (next_cmd >> 2), buffer, chunk_size);  in vmw_fifo_res_copy()
415 		memcpy_toio(fifo_mem + (min >> 2), buffer + (chunk_size >> 2),  in vmw_fifo_res_copy()
420 			       __le32 __iomem *fifo_mem,  in vmw_fifo_slow_copy()  argument
428 		iowrite32(*buffer++, fifo_mem + (next_cmd >> 2));  in vmw_fifo_slow_copy()
433 		iowrite32(next_cmd, fifo_mem + SVGA_FIFO_NEXT_CMD);  in vmw_fifo_slow_copy()
442 	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;  in vmw_fifo_commit()  local
443 	uint32_t next_cmd = ioread32(fifo_mem + SVGA_FIFO_NEXT_CMD);  in vmw_fifo_commit()
444 	uint32_t max = ioread32(fifo_mem + SVGA_FIFO_MAX);  in vmw_fifo_commit()
445 	uint32_t min = ioread32(fifo_mem + SVGA_FIFO_MIN);  in vmw_fifo_commit()
455 			vmw_fifo_res_copy(fifo_state, fifo_mem,  in vmw_fifo_commit()
458 			vmw_fifo_slow_copy(fifo_state, fifo_mem,  in vmw_fifo_commit()
474 		iowrite32(next_cmd, fifo_mem + SVGA_FIFO_NEXT_CMD);  in vmw_fifo_commit()
478 		iowrite32(0, fifo_mem + SVGA_FIFO_RESERVED);  in vmw_fifo_commit()