41 #define  SOR_STATE_ASY_OWNER(x)			(((x) & 0xf) << 0)  argument
43 #define SOR_HEAD_STATE_0(x) (0x05 + (x))  argument
44 #define SOR_HEAD_STATE_1(x) (0x07 + (x))  argument
45 #define SOR_HEAD_STATE_2(x) (0x09 + (x))  argument
46 #define SOR_HEAD_STATE_3(x) (0x0b + (x))  argument
47 #define SOR_HEAD_STATE_4(x) (0x0d + (x))  argument
48 #define SOR_HEAD_STATE_5(x) (0x0f + (x))  argument
55 #define  SOR_CLK_CNTRL_DP_LINK_SPEED(x)		(((x) & 0x1f) << 2)  argument
80 #define  SOR_PLL_0_ICHPMP(x)			(((x) & 0xf) << 24)  argument
82 #define  SOR_PLL_0_VCOCAP(x)			(((x) & 0xf) << 8)  argument
85 #define  SOR_PLL_0_PLLREG_LEVEL(x)		(((x) & 0x3) << 6)  argument
133 #define SOR_SEQ_INST(x) (0x22 + (x))  argument
170 #define  SOR_DP_LINKCTL_LANE_COUNT(x)		(((1 << (x)) - 1) << 16)  argument
173 #define  SOR_DP_LINKCTL_TU_SIZE(x)		(((x) & 0x7f) << 2)  argument
182 #define  SOR_LANE_DRIVE_CURRENT_LANE3(x) (((x) & 0xff) << 24)  argument
183 #define  SOR_LANE_DRIVE_CURRENT_LANE2(x) (((x) & 0xff) << 16)  argument
184 #define  SOR_LANE_DRIVE_CURRENT_LANE1(x) (((x) & 0xff) << 8)  argument
185 #define  SOR_LANE_DRIVE_CURRENT_LANE0(x) (((x) & 0xff) << 0)  argument
191 #define  SOR_LANE_PREEMPHASIS_LANE3(x) (((x) & 0xff) << 24)  argument
192 #define  SOR_LANE_PREEMPHASIS_LANE2(x) (((x) & 0xff) << 16)  argument
193 #define  SOR_LANE_PREEMPHASIS_LANE1(x) (((x) & 0xff) << 8)  argument
194 #define  SOR_LANE_PREEMPHASIS_LANE0(x) (((x) & 0xff) << 0)  argument
198 #define  SOR_LANE_POST_CURSOR_LANE3(x) (((x) & 0xff) << 24)  argument
199 #define  SOR_LANE_POST_CURSOR_LANE2(x) (((x) & 0xff) << 16)  argument
200 #define  SOR_LANE_POST_CURSOR_LANE1(x) (((x) & 0xff) << 8)  argument
201 #define  SOR_LANE_POST_CURSOR_LANE0(x) (((x) & 0xff) << 0)  argument
208 #define SOR_DP_CONFIG_ACTIVE_SYM_FRAC(x)	(((x) & 0xf) << 16)  argument
210 #define SOR_DP_CONFIG_ACTIVE_SYM_COUNT(x)	(((x) & 0x7f) << 8)  argument
212 #define SOR_DP_CONFIG_WATERMARK(x)	(((x) & 0x3f) << 0)  argument
222 #define  SOR_DP_PADCTL_TX_PU(x)		(((x) & 0xff) << 8)  argument