Lines Matching refs:num_lanes
136 for (i = 0, value = 0; i < link->num_lanes; i++) { in tegra_sor_dp_train_fast()
157 for (i = 0, value = 0; i < link->num_lanes; i++) { in tegra_sor_dp_train_fast()
172 for (i = 0, value = 0; i < link->num_lanes; i++) { in tegra_sor_dp_train_fast()
399 if (!link_rate || !link->num_lanes || !pclk || !config->bits_per_pixel) in tegra_sor_calc_config()
402 output = link_rate * 8 * link->num_lanes; in tegra_sor_calc_config()
446 (link->num_lanes * 8); in tegra_sor_calc_config()
466 config->hblank_symbols -= 12 / link->num_lanes; in tegra_sor_calc_config()
471 config->vblank_symbols -= 36 / link->num_lanes + 4; in tegra_sor_calc_config()
1102 if (link.num_lanes <= 2) in tegra_sor_encoder_mode_set()
1107 if (link.num_lanes <= 1) in tegra_sor_encoder_mode_set()
1112 if (link.num_lanes == 0) in tegra_sor_encoder_mode_set()
1121 value |= SOR_DP_LINKCTL_LANE_COUNT(link.num_lanes); in tegra_sor_encoder_mode_set()
1221 lanes = link.num_lanes; in tegra_sor_encoder_mode_set()
1239 for (i = 0; i < link.num_lanes; i++) { in tegra_sor_encoder_mode_set()