Lines Matching refs:WREG32
80 WREG32(VCE_RB_WPTR, ring->wptr); in vce_v1_0_set_wptr()
82 WREG32(VCE_RB_WPTR2, ring->wptr); in vce_v1_0_set_wptr()
101 WREG32(VCE_RB_RPTR, ring->wptr); in vce_v1_0_start()
102 WREG32(VCE_RB_WPTR, ring->wptr); in vce_v1_0_start()
103 WREG32(VCE_RB_BASE_LO, ring->gpu_addr); in vce_v1_0_start()
104 WREG32(VCE_RB_BASE_HI, upper_32_bits(ring->gpu_addr)); in vce_v1_0_start()
105 WREG32(VCE_RB_SIZE, ring->ring_size / 4); in vce_v1_0_start()
108 WREG32(VCE_RB_RPTR2, ring->wptr); in vce_v1_0_start()
109 WREG32(VCE_RB_WPTR2, ring->wptr); in vce_v1_0_start()
110 WREG32(VCE_RB_BASE_LO2, ring->gpu_addr); in vce_v1_0_start()
111 WREG32(VCE_RB_BASE_HI2, upper_32_bits(ring->gpu_addr)); in vce_v1_0_start()
112 WREG32(VCE_RB_SIZE2, ring->ring_size / 4); in vce_v1_0_start()