Lines Matching refs:rdev
82 struct sumo_power_info *sumo_get_pi(struct radeon_device *rdev) in sumo_get_pi() argument
84 struct sumo_power_info *pi = rdev->pm.dpm.priv; in sumo_get_pi()
89 static void sumo_gfx_clockgating_enable(struct radeon_device *rdev, bool enable) in sumo_gfx_clockgating_enable() argument
104 static void sumo_mg_clockgating_enable(struct radeon_device *rdev, bool enable) in sumo_mg_clockgating_enable() argument
121 static void sumo_program_git(struct radeon_device *rdev) in sumo_program_git() argument
124 u32 xclk = radeon_get_xclk(rdev); in sumo_program_git()
132 static void sumo_program_grsd(struct radeon_device *rdev) in sumo_program_grsd() argument
135 u32 xclk = radeon_get_xclk(rdev); in sumo_program_grsd()
143 void sumo_gfx_clockgating_initialize(struct radeon_device *rdev) in sumo_gfx_clockgating_initialize() argument
145 sumo_program_git(rdev); in sumo_gfx_clockgating_initialize()
146 sumo_program_grsd(rdev); in sumo_gfx_clockgating_initialize()
149 static void sumo_gfx_powergating_initialize(struct radeon_device *rdev) in sumo_gfx_powergating_initialize() argument
155 u32 xclk = radeon_get_xclk(rdev); in sumo_gfx_powergating_initialize()
157 if (rdev->family == CHIP_PALM) { in sumo_gfx_powergating_initialize()
185 if (rdev->family == CHIP_PALM) { in sumo_gfx_powergating_initialize()
197 if (rdev->family == CHIP_PALM) { in sumo_gfx_powergating_initialize()
218 if (rdev->family == CHIP_PALM) in sumo_gfx_powergating_initialize()
221 sumo_smu_pg_init(rdev); in sumo_gfx_powergating_initialize()
227 if (rdev->family == CHIP_PALM) { in sumo_gfx_powergating_initialize()
233 if (rdev->family == CHIP_PALM) { in sumo_gfx_powergating_initialize()
245 sumo_smu_pg_init(rdev); in sumo_gfx_powergating_initialize()
252 if (rdev->family == CHIP_PALM) { in sumo_gfx_powergating_initialize()
260 if (rdev->family == CHIP_PALM) { in sumo_gfx_powergating_initialize()
272 sumo_smu_pg_init(rdev); in sumo_gfx_powergating_initialize()
275 static void sumo_gfx_powergating_enable(struct radeon_device *rdev, bool enable) in sumo_gfx_powergating_enable() argument
285 static int sumo_enable_clock_power_gating(struct radeon_device *rdev) in sumo_enable_clock_power_gating() argument
287 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_enable_clock_power_gating()
290 sumo_gfx_clockgating_initialize(rdev); in sumo_enable_clock_power_gating()
292 sumo_gfx_powergating_initialize(rdev); in sumo_enable_clock_power_gating()
294 sumo_mg_clockgating_enable(rdev, true); in sumo_enable_clock_power_gating()
296 sumo_gfx_clockgating_enable(rdev, true); in sumo_enable_clock_power_gating()
298 sumo_gfx_powergating_enable(rdev, true); in sumo_enable_clock_power_gating()
303 static void sumo_disable_clock_power_gating(struct radeon_device *rdev) in sumo_disable_clock_power_gating() argument
305 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_disable_clock_power_gating()
308 sumo_gfx_clockgating_enable(rdev, false); in sumo_disable_clock_power_gating()
310 sumo_gfx_powergating_enable(rdev, false); in sumo_disable_clock_power_gating()
312 sumo_mg_clockgating_enable(rdev, false); in sumo_disable_clock_power_gating()
315 static void sumo_calculate_bsp(struct radeon_device *rdev, in sumo_calculate_bsp() argument
318 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_calculate_bsp()
319 u32 xclk = radeon_get_xclk(rdev); in sumo_calculate_bsp()
334 static void sumo_init_bsp(struct radeon_device *rdev) in sumo_init_bsp() argument
336 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_init_bsp()
342 static void sumo_program_bsp(struct radeon_device *rdev, in sumo_program_bsp() argument
345 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_program_bsp()
353 sumo_calculate_bsp(rdev, highest_engine_clock); in sumo_program_bsp()
364 static void sumo_write_at(struct radeon_device *rdev, in sumo_write_at() argument
385 static void sumo_program_at(struct radeon_device *rdev, in sumo_program_at() argument
388 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_program_at()
416 sumo_write_at(rdev, i, a_t); in sumo_program_at()
427 sumo_write_at(rdev, BOOST_DPM_LEVEL, a_t); in sumo_program_at()
431 static void sumo_program_tp(struct radeon_device *rdev) in sumo_program_tp() argument
453 void sumo_program_vc(struct radeon_device *rdev, u32 vrc) in sumo_program_vc() argument
458 void sumo_clear_vc(struct radeon_device *rdev) in sumo_clear_vc() argument
463 void sumo_program_sstp(struct radeon_device *rdev) in sumo_program_sstp() argument
466 u32 xclk = radeon_get_xclk(rdev); in sumo_program_sstp()
474 static void sumo_set_divider_value(struct radeon_device *rdev, in sumo_set_divider_value() argument
494 static void sumo_set_ds_dividers(struct radeon_device *rdev, in sumo_set_ds_dividers() argument
497 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_set_ds_dividers()
508 static void sumo_set_ss_dividers(struct radeon_device *rdev, in sumo_set_ss_dividers() argument
511 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_set_ss_dividers()
522 static void sumo_set_vid(struct radeon_device *rdev, u32 index, u32 vid) in sumo_set_vid() argument
531 static void sumo_set_allos_gnb_slow(struct radeon_device *rdev, u32 index, u32 gnb_slow) in sumo_set_allos_gnb_slow() argument
533 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_set_allos_gnb_slow()
547 static void sumo_program_power_level(struct radeon_device *rdev, in sumo_program_power_level() argument
550 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_program_power_level()
555 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in sumo_program_power_level()
560 sumo_set_divider_value(rdev, index, dividers.post_div); in sumo_program_power_level()
562 sumo_set_vid(rdev, index, pl->vddc_index); in sumo_program_power_level()
568 sumo_set_ss_dividers(rdev, index, pl->ss_divider_index); in sumo_program_power_level()
569 sumo_set_ds_dividers(rdev, index, pl->ds_divider_index); in sumo_program_power_level()
575 sumo_set_allos_gnb_slow(rdev, index, pl->allow_gnb_slow); in sumo_program_power_level()
578 sumo_set_tdp_limit(rdev, index, pl->sclk_dpm_tdp_limit); in sumo_program_power_level()
581 static void sumo_power_level_enable(struct radeon_device *rdev, u32 index, bool enable) in sumo_power_level_enable() argument
600 static bool sumo_dpm_enabled(struct radeon_device *rdev) in sumo_dpm_enabled() argument
608 static void sumo_start_dpm(struct radeon_device *rdev) in sumo_start_dpm() argument
613 static void sumo_stop_dpm(struct radeon_device *rdev) in sumo_stop_dpm() argument
618 static void sumo_set_forced_mode(struct radeon_device *rdev, bool enable) in sumo_set_forced_mode() argument
626 static void sumo_set_forced_mode_enabled(struct radeon_device *rdev) in sumo_set_forced_mode_enabled() argument
630 sumo_set_forced_mode(rdev, true); in sumo_set_forced_mode_enabled()
631 for (i = 0; i < rdev->usec_timeout; i++) { in sumo_set_forced_mode_enabled()
638 static void sumo_wait_for_level_0(struct radeon_device *rdev) in sumo_wait_for_level_0() argument
642 for (i = 0; i < rdev->usec_timeout; i++) { in sumo_wait_for_level_0()
647 for (i = 0; i < rdev->usec_timeout; i++) { in sumo_wait_for_level_0()
654 static void sumo_set_forced_mode_disabled(struct radeon_device *rdev) in sumo_set_forced_mode_disabled() argument
656 sumo_set_forced_mode(rdev, false); in sumo_set_forced_mode_disabled()
659 static void sumo_enable_power_level_0(struct radeon_device *rdev) in sumo_enable_power_level_0() argument
661 sumo_power_level_enable(rdev, 0, true); in sumo_enable_power_level_0()
664 static void sumo_patch_boost_state(struct radeon_device *rdev, in sumo_patch_boost_state() argument
667 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_patch_boost_state()
678 static void sumo_pre_notify_alt_vddnb_change(struct radeon_device *rdev, in sumo_pre_notify_alt_vddnb_change() argument
693 sumo_smu_notify_alt_vddnb_change(rdev, 0, 0); in sumo_pre_notify_alt_vddnb_change()
696 static void sumo_post_notify_alt_vddnb_change(struct radeon_device *rdev, in sumo_post_notify_alt_vddnb_change() argument
711 sumo_smu_notify_alt_vddnb_change(rdev, 1, 1); in sumo_post_notify_alt_vddnb_change()
714 static void sumo_enable_boost(struct radeon_device *rdev, in sumo_enable_boost() argument
722 sumo_boost_state_enable(rdev, true); in sumo_enable_boost()
724 sumo_boost_state_enable(rdev, false); in sumo_enable_boost()
727 static void sumo_set_forced_level(struct radeon_device *rdev, u32 index) in sumo_set_forced_level() argument
732 static void sumo_set_forced_level_0(struct radeon_device *rdev) in sumo_set_forced_level_0() argument
734 sumo_set_forced_level(rdev, 0); in sumo_set_forced_level_0()
737 static void sumo_program_wl(struct radeon_device *rdev, in sumo_program_wl() argument
752 static void sumo_program_power_levels_0_to_n(struct radeon_device *rdev, in sumo_program_power_levels_0_to_n() argument
756 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_program_power_levels_0_to_n()
763 sumo_program_power_level(rdev, &new_ps->levels[i], i); in sumo_program_power_levels_0_to_n()
764 sumo_power_level_enable(rdev, i, true); in sumo_program_power_levels_0_to_n()
768 sumo_power_level_enable(rdev, i, false); in sumo_program_power_levels_0_to_n()
771 sumo_program_power_level(rdev, &pi->boost_pl, BOOST_DPM_LEVEL); in sumo_program_power_levels_0_to_n()
774 static void sumo_enable_acpi_pm(struct radeon_device *rdev) in sumo_enable_acpi_pm() argument
779 static void sumo_program_power_level_enter_state(struct radeon_device *rdev) in sumo_program_power_level_enter_state() argument
784 static void sumo_program_acpi_power_level(struct radeon_device *rdev) in sumo_program_acpi_power_level() argument
786 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_program_acpi_power_level()
790 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in sumo_program_acpi_power_level()
800 static void sumo_program_bootup_state(struct radeon_device *rdev) in sumo_program_bootup_state() argument
802 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_program_bootup_state()
806 sumo_program_power_level(rdev, &pi->boot_pl, 0); in sumo_program_bootup_state()
812 sumo_power_level_enable(rdev, i, false); in sumo_program_bootup_state()
815 static void sumo_setup_uvd_clocks(struct radeon_device *rdev, in sumo_setup_uvd_clocks() argument
819 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_setup_uvd_clocks()
822 sumo_gfx_powergating_enable(rdev, false); in sumo_setup_uvd_clocks()
825 radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk); in sumo_setup_uvd_clocks()
830 sumo_gfx_powergating_enable(rdev, true); in sumo_setup_uvd_clocks()
834 static void sumo_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev, in sumo_set_uvd_clock_before_set_eng_clock() argument
849 sumo_setup_uvd_clocks(rdev, new_rps, old_rps); in sumo_set_uvd_clock_before_set_eng_clock()
852 static void sumo_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev, in sumo_set_uvd_clock_after_set_eng_clock() argument
867 sumo_setup_uvd_clocks(rdev, new_rps, old_rps); in sumo_set_uvd_clock_after_set_eng_clock()
870 void sumo_take_smu_control(struct radeon_device *rdev, bool enable) in sumo_take_smu_control() argument
889 static void sumo_enable_sclk_ds(struct radeon_device *rdev, bool enable) in sumo_enable_sclk_ds() argument
910 static void sumo_program_bootup_at(struct radeon_device *rdev) in sumo_program_bootup_at() argument
916 static void sumo_reset_am(struct radeon_device *rdev) in sumo_reset_am() argument
921 static void sumo_start_am(struct radeon_device *rdev) in sumo_start_am() argument
926 static void sumo_program_ttp(struct radeon_device *rdev) in sumo_program_ttp() argument
928 u32 xclk = radeon_get_xclk(rdev); in sumo_program_ttp()
941 static void sumo_program_ttt(struct radeon_device *rdev) in sumo_program_ttt() argument
944 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_program_ttt()
953 static void sumo_enable_voltage_scaling(struct radeon_device *rdev, bool enable) in sumo_enable_voltage_scaling() argument
964 static void sumo_override_cnb_thermal_events(struct radeon_device *rdev) in sumo_override_cnb_thermal_events() argument
970 static void sumo_program_dc_hto(struct radeon_device *rdev) in sumo_program_dc_hto() argument
974 u32 xclk = radeon_get_xclk(rdev); in sumo_program_dc_hto()
985 static void sumo_force_nbp_state(struct radeon_device *rdev, in sumo_force_nbp_state() argument
988 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_force_nbp_state()
1004 u32 sumo_get_sleep_divider_id_from_clock(struct radeon_device *rdev, in sumo_get_sleep_divider_id_from_clock() argument
1008 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_get_sleep_divider_id_from_clock()
1029 static u32 sumo_get_valid_engine_clock(struct radeon_device *rdev, in sumo_get_valid_engine_clock() argument
1032 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_get_valid_engine_clock()
1043 static void sumo_patch_thermal_state(struct radeon_device *rdev, in sumo_patch_thermal_state() argument
1047 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_patch_thermal_state()
1067 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, sclk_in_sr); in sumo_patch_thermal_state()
1070 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, SUMO_MINIMUM_ENGINE_CLOCK); in sumo_patch_thermal_state()
1087 static void sumo_apply_state_adjust_rules(struct radeon_device *rdev, in sumo_apply_state_adjust_rules() argument
1093 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_apply_state_adjust_rules()
1100 return sumo_patch_thermal_state(rdev, ps, current_ps); in sumo_apply_state_adjust_rules()
1118 sumo_get_valid_engine_clock(rdev, min_sclk); in sumo_apply_state_adjust_rules()
1121 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, sclk_in_sr); in sumo_apply_state_adjust_rules()
1124 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, SUMO_MINIMUM_ENGINE_CLOCK); in sumo_apply_state_adjust_rules()
1152 static void sumo_cleanup_asic(struct radeon_device *rdev) in sumo_cleanup_asic() argument
1154 sumo_take_smu_control(rdev, false); in sumo_cleanup_asic()
1157 static int sumo_set_thermal_temperature_range(struct radeon_device *rdev, in sumo_set_thermal_temperature_range() argument
1175 rdev->pm.dpm.thermal.min_temp = low_temp; in sumo_set_thermal_temperature_range()
1176 rdev->pm.dpm.thermal.max_temp = high_temp; in sumo_set_thermal_temperature_range()
1181 static void sumo_update_current_ps(struct radeon_device *rdev, in sumo_update_current_ps() argument
1185 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_update_current_ps()
1192 static void sumo_update_requested_ps(struct radeon_device *rdev, in sumo_update_requested_ps() argument
1196 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_update_requested_ps()
1203 int sumo_dpm_enable(struct radeon_device *rdev) in sumo_dpm_enable() argument
1205 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_dpm_enable()
1207 if (sumo_dpm_enabled(rdev)) in sumo_dpm_enable()
1210 sumo_program_bootup_state(rdev); in sumo_dpm_enable()
1211 sumo_init_bsp(rdev); in sumo_dpm_enable()
1212 sumo_reset_am(rdev); in sumo_dpm_enable()
1213 sumo_program_tp(rdev); in sumo_dpm_enable()
1214 sumo_program_bootup_at(rdev); in sumo_dpm_enable()
1215 sumo_start_am(rdev); in sumo_dpm_enable()
1217 sumo_program_ttp(rdev); in sumo_dpm_enable()
1218 sumo_program_ttt(rdev); in sumo_dpm_enable()
1220 sumo_program_dc_hto(rdev); in sumo_dpm_enable()
1221 sumo_program_power_level_enter_state(rdev); in sumo_dpm_enable()
1222 sumo_enable_voltage_scaling(rdev, true); in sumo_dpm_enable()
1223 sumo_program_sstp(rdev); in sumo_dpm_enable()
1224 sumo_program_vc(rdev, SUMO_VRC_DFLT); in sumo_dpm_enable()
1225 sumo_override_cnb_thermal_events(rdev); in sumo_dpm_enable()
1226 sumo_start_dpm(rdev); in sumo_dpm_enable()
1227 sumo_wait_for_level_0(rdev); in sumo_dpm_enable()
1229 sumo_enable_sclk_ds(rdev, true); in sumo_dpm_enable()
1231 sumo_enable_boost_timer(rdev); in sumo_dpm_enable()
1233 sumo_update_current_ps(rdev, rdev->pm.dpm.boot_ps); in sumo_dpm_enable()
1238 int sumo_dpm_late_enable(struct radeon_device *rdev) in sumo_dpm_late_enable() argument
1242 ret = sumo_enable_clock_power_gating(rdev); in sumo_dpm_late_enable()
1246 if (rdev->irq.installed && in sumo_dpm_late_enable()
1247 r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { in sumo_dpm_late_enable()
1248 ret = sumo_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); in sumo_dpm_late_enable()
1251 rdev->irq.dpm_thermal = true; in sumo_dpm_late_enable()
1252 radeon_irq_set(rdev); in sumo_dpm_late_enable()
1258 void sumo_dpm_disable(struct radeon_device *rdev) in sumo_dpm_disable() argument
1260 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_dpm_disable()
1262 if (!sumo_dpm_enabled(rdev)) in sumo_dpm_disable()
1264 sumo_disable_clock_power_gating(rdev); in sumo_dpm_disable()
1266 sumo_enable_sclk_ds(rdev, false); in sumo_dpm_disable()
1267 sumo_clear_vc(rdev); in sumo_dpm_disable()
1268 sumo_wait_for_level_0(rdev); in sumo_dpm_disable()
1269 sumo_stop_dpm(rdev); in sumo_dpm_disable()
1270 sumo_enable_voltage_scaling(rdev, false); in sumo_dpm_disable()
1272 if (rdev->irq.installed && in sumo_dpm_disable()
1273 r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { in sumo_dpm_disable()
1274 rdev->irq.dpm_thermal = false; in sumo_dpm_disable()
1275 radeon_irq_set(rdev); in sumo_dpm_disable()
1278 sumo_update_current_ps(rdev, rdev->pm.dpm.boot_ps); in sumo_dpm_disable()
1281 int sumo_dpm_pre_set_power_state(struct radeon_device *rdev) in sumo_dpm_pre_set_power_state() argument
1283 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_dpm_pre_set_power_state()
1284 struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps; in sumo_dpm_pre_set_power_state()
1287 sumo_update_requested_ps(rdev, new_ps); in sumo_dpm_pre_set_power_state()
1290 sumo_apply_state_adjust_rules(rdev, in sumo_dpm_pre_set_power_state()
1297 int sumo_dpm_set_power_state(struct radeon_device *rdev) in sumo_dpm_set_power_state() argument
1299 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_dpm_set_power_state()
1304 sumo_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); in sumo_dpm_set_power_state()
1306 sumo_enable_boost(rdev, new_ps, false); in sumo_dpm_set_power_state()
1307 sumo_patch_boost_state(rdev, new_ps); in sumo_dpm_set_power_state()
1310 sumo_pre_notify_alt_vddnb_change(rdev, new_ps, old_ps); in sumo_dpm_set_power_state()
1311 sumo_enable_power_level_0(rdev); in sumo_dpm_set_power_state()
1312 sumo_set_forced_level_0(rdev); in sumo_dpm_set_power_state()
1313 sumo_set_forced_mode_enabled(rdev); in sumo_dpm_set_power_state()
1314 sumo_wait_for_level_0(rdev); in sumo_dpm_set_power_state()
1315 sumo_program_power_levels_0_to_n(rdev, new_ps, old_ps); in sumo_dpm_set_power_state()
1316 sumo_program_wl(rdev, new_ps); in sumo_dpm_set_power_state()
1317 sumo_program_bsp(rdev, new_ps); in sumo_dpm_set_power_state()
1318 sumo_program_at(rdev, new_ps); in sumo_dpm_set_power_state()
1319 sumo_force_nbp_state(rdev, new_ps); in sumo_dpm_set_power_state()
1320 sumo_set_forced_mode_disabled(rdev); in sumo_dpm_set_power_state()
1321 sumo_set_forced_mode_enabled(rdev); in sumo_dpm_set_power_state()
1322 sumo_set_forced_mode_disabled(rdev); in sumo_dpm_set_power_state()
1323 sumo_post_notify_alt_vddnb_change(rdev, new_ps, old_ps); in sumo_dpm_set_power_state()
1326 sumo_enable_boost(rdev, new_ps, true); in sumo_dpm_set_power_state()
1328 sumo_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); in sumo_dpm_set_power_state()
1333 void sumo_dpm_post_set_power_state(struct radeon_device *rdev) in sumo_dpm_post_set_power_state() argument
1335 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_dpm_post_set_power_state()
1338 sumo_update_current_ps(rdev, new_ps); in sumo_dpm_post_set_power_state()
1342 void sumo_dpm_reset_asic(struct radeon_device *rdev)
1344 sumo_program_bootup_state(rdev);
1345 sumo_enable_power_level_0(rdev);
1346 sumo_set_forced_level_0(rdev);
1347 sumo_set_forced_mode_enabled(rdev);
1348 sumo_wait_for_level_0(rdev);
1349 sumo_set_forced_mode_disabled(rdev);
1350 sumo_set_forced_mode_enabled(rdev);
1351 sumo_set_forced_mode_disabled(rdev);
1355 void sumo_dpm_setup_asic(struct radeon_device *rdev) in sumo_dpm_setup_asic() argument
1357 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_dpm_setup_asic()
1359 sumo_initialize_m3_arb(rdev); in sumo_dpm_setup_asic()
1360 pi->fw_version = sumo_get_running_fw_version(rdev); in sumo_dpm_setup_asic()
1362 sumo_program_acpi_power_level(rdev); in sumo_dpm_setup_asic()
1363 sumo_enable_acpi_pm(rdev); in sumo_dpm_setup_asic()
1364 sumo_take_smu_control(rdev, true); in sumo_dpm_setup_asic()
1367 void sumo_dpm_display_configuration_changed(struct radeon_device *rdev) in sumo_dpm_display_configuration_changed() argument
1393 static void sumo_patch_boot_state(struct radeon_device *rdev, in sumo_patch_boot_state() argument
1396 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_patch_boot_state()
1403 static void sumo_parse_pplib_non_clock_info(struct radeon_device *rdev, in sumo_parse_pplib_non_clock_info() argument
1423 rdev->pm.dpm.boot_ps = rps; in sumo_parse_pplib_non_clock_info()
1424 sumo_patch_boot_state(rdev, ps); in sumo_parse_pplib_non_clock_info()
1427 rdev->pm.dpm.uvd_ps = rps; in sumo_parse_pplib_non_clock_info()
1430 static void sumo_parse_pplib_clock_info(struct radeon_device *rdev, in sumo_parse_pplib_clock_info() argument
1434 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_parse_pplib_clock_info()
1453 static int sumo_parse_power_table(struct radeon_device *rdev) in sumo_parse_power_table() argument
1455 struct radeon_mode_info *mode_info = &rdev->mode_info; in sumo_parse_power_table()
1485 rdev->pm.dpm.ps = kzalloc(sizeof(struct radeon_ps) * in sumo_parse_power_table()
1487 if (!rdev->pm.dpm.ps) in sumo_parse_power_table()
1496 if (!rdev->pm.power_state[i].clock_info) in sumo_parse_power_table()
1500 kfree(rdev->pm.dpm.ps); in sumo_parse_power_table()
1503 rdev->pm.dpm.ps[i].ps_priv = ps; in sumo_parse_power_table()
1514 sumo_parse_pplib_clock_info(rdev, in sumo_parse_power_table()
1515 &rdev->pm.dpm.ps[i], k, in sumo_parse_power_table()
1519 sumo_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], in sumo_parse_power_table()
1524 rdev->pm.dpm.num_ps = state_array->ucNumEntries; in sumo_parse_power_table()
1528 u32 sumo_convert_vid2_to_vid7(struct radeon_device *rdev, in sumo_convert_vid2_to_vid7() argument
1543 u32 sumo_convert_vid7_to_vid2(struct radeon_device *rdev,
1558 static u16 sumo_convert_voltage_index_to_value(struct radeon_device *rdev, in sumo_convert_voltage_index_to_value() argument
1561 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_convert_voltage_index_to_value()
1562 u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid_2bit); in sumo_convert_voltage_index_to_value()
1570 static void sumo_construct_display_voltage_mapping_table(struct radeon_device *rdev, in sumo_construct_display_voltage_mapping_table() argument
1592 void sumo_construct_sclk_voltage_mapping_table(struct radeon_device *rdev, in sumo_construct_sclk_voltage_mapping_table() argument
1614 void sumo_construct_vid_mapping_table(struct radeon_device *rdev, in sumo_construct_vid_mapping_table() argument
1655 static int sumo_parse_sys_info_table(struct radeon_device *rdev) in sumo_parse_sys_info_table() argument
1657 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_parse_sys_info_table()
1658 struct radeon_mode_info *mode_info = &rdev->mode_info; in sumo_parse_sys_info_table()
1713 sumo_construct_display_voltage_mapping_table(rdev, in sumo_parse_sys_info_table()
1716 sumo_construct_sclk_voltage_mapping_table(rdev, in sumo_parse_sys_info_table()
1719 sumo_construct_vid_mapping_table(rdev, &pi->sys_info.vid_mapping_table, in sumo_parse_sys_info_table()
1726 static void sumo_construct_boot_and_acpi_state(struct radeon_device *rdev) in sumo_construct_boot_and_acpi_state() argument
1728 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_construct_boot_and_acpi_state()
1740 int sumo_dpm_init(struct radeon_device *rdev) in sumo_dpm_init() argument
1749 rdev->pm.dpm.priv = pi; in sumo_dpm_init()
1752 if ((rdev->family == CHIP_PALM) && (hw_rev < 3)) in sumo_dpm_init()
1763 if (rdev->family == CHIP_PALM) in sumo_dpm_init()
1771 ret = sumo_parse_sys_info_table(rdev); in sumo_dpm_init()
1775 sumo_construct_boot_and_acpi_state(rdev); in sumo_dpm_init()
1777 ret = r600_get_platform_caps(rdev); in sumo_dpm_init()
1781 ret = sumo_parse_power_table(rdev); in sumo_dpm_init()
1794 void sumo_dpm_print_power_state(struct radeon_device *rdev, in sumo_dpm_print_power_state() argument
1807 sumo_convert_voltage_index_to_value(rdev, pl->vddc_index)); in sumo_dpm_print_power_state()
1809 r600_dpm_print_ps_status(rdev, rps); in sumo_dpm_print_power_state()
1812 void sumo_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, in sumo_dpm_debugfs_print_current_performance_level() argument
1815 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_dpm_debugfs_print_current_performance_level()
1828 sumo_convert_voltage_index_to_value(rdev, pl->vddc_index)); in sumo_dpm_debugfs_print_current_performance_level()
1836 sumo_convert_voltage_index_to_value(rdev, pl->vddc_index)); in sumo_dpm_debugfs_print_current_performance_level()
1840 u32 sumo_dpm_get_current_sclk(struct radeon_device *rdev) in sumo_dpm_get_current_sclk() argument
1842 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_dpm_get_current_sclk()
1861 u32 sumo_dpm_get_current_mclk(struct radeon_device *rdev) in sumo_dpm_get_current_mclk() argument
1863 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_dpm_get_current_mclk()
1868 void sumo_dpm_fini(struct radeon_device *rdev) in sumo_dpm_fini() argument
1872 sumo_cleanup_asic(rdev); /* ??? */ in sumo_dpm_fini()
1874 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in sumo_dpm_fini()
1875 kfree(rdev->pm.dpm.ps[i].ps_priv); in sumo_dpm_fini()
1877 kfree(rdev->pm.dpm.ps); in sumo_dpm_fini()
1878 kfree(rdev->pm.dpm.priv); in sumo_dpm_fini()
1881 u32 sumo_dpm_get_sclk(struct radeon_device *rdev, bool low) in sumo_dpm_get_sclk() argument
1883 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_dpm_get_sclk()
1892 u32 sumo_dpm_get_mclk(struct radeon_device *rdev, bool low) in sumo_dpm_get_mclk() argument
1894 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_dpm_get_mclk()
1899 int sumo_dpm_force_performance_level(struct radeon_device *rdev, in sumo_dpm_force_performance_level() argument
1902 struct sumo_power_info *pi = sumo_get_pi(rdev); in sumo_dpm_force_performance_level()
1912 sumo_enable_boost(rdev, rps, false); in sumo_dpm_force_performance_level()
1913 sumo_power_level_enable(rdev, ps->num_levels - 1, true); in sumo_dpm_force_performance_level()
1914 sumo_set_forced_level(rdev, ps->num_levels - 1); in sumo_dpm_force_performance_level()
1915 sumo_set_forced_mode_enabled(rdev); in sumo_dpm_force_performance_level()
1917 sumo_power_level_enable(rdev, i, false); in sumo_dpm_force_performance_level()
1919 sumo_set_forced_mode(rdev, false); in sumo_dpm_force_performance_level()
1920 sumo_set_forced_mode_enabled(rdev); in sumo_dpm_force_performance_level()
1921 sumo_set_forced_mode(rdev, false); in sumo_dpm_force_performance_level()
1924 sumo_enable_boost(rdev, rps, false); in sumo_dpm_force_performance_level()
1925 sumo_power_level_enable(rdev, 0, true); in sumo_dpm_force_performance_level()
1926 sumo_set_forced_level(rdev, 0); in sumo_dpm_force_performance_level()
1927 sumo_set_forced_mode_enabled(rdev); in sumo_dpm_force_performance_level()
1929 sumo_power_level_enable(rdev, i, false); in sumo_dpm_force_performance_level()
1931 sumo_set_forced_mode(rdev, false); in sumo_dpm_force_performance_level()
1932 sumo_set_forced_mode_enabled(rdev); in sumo_dpm_force_performance_level()
1933 sumo_set_forced_mode(rdev, false); in sumo_dpm_force_performance_level()
1936 sumo_power_level_enable(rdev, i, true); in sumo_dpm_force_performance_level()
1939 sumo_enable_boost(rdev, rps, true); in sumo_dpm_force_performance_level()
1942 rdev->pm.dpm.forced_level = level; in sumo_dpm_force_performance_level()