113 		WREG32(CG_CGTT_LOCAL_0, (0 & CGCG_CGTT_LOCAL0_MASK) | (local0 & ~CGCG_CGTT_LOCAL0_MASK) );  in sumo_mg_clockgating_enable()
114 		WREG32(CG_CGTT_LOCAL_1, (0 & CGCG_CGTT_LOCAL1_MASK) | (local1 & ~CGCG_CGTT_LOCAL1_MASK) );  in sumo_mg_clockgating_enable()
116 …WREG32(CG_CGTT_LOCAL_0, (0xFFFFFFFF & CGCG_CGTT_LOCAL0_MASK) | (local0 & ~CGCG_CGTT_LOCAL0_MASK) );  in sumo_mg_clockgating_enable()
117 …WREG32(CG_CGTT_LOCAL_1, (0xFFFFCFFF & CGCG_CGTT_LOCAL1_MASK) | (local1 & ~CGCG_CGTT_LOCAL1_MASK) );  in sumo_mg_clockgating_enable()
140 	WREG32(CG_GCOOR, PHC(grs) | SDC(p) | SU(u));  in sumo_program_grsd()
171 	WREG32(CG_SCRATCH2, 0x01B60A17);  in sumo_gfx_powergating_initialize()
338 	WREG32(CG_BSP_0, pi->psp);  in sumo_init_bsp()
356 		WREG32(CG_BSP_0 + (i * 4), pi->dsp);  in sumo_program_bsp()
358 	WREG32(CG_BSP_0 + (i * 4), pi->psp);  in sumo_program_bsp()
361 		WREG32(CG_BSP_0 + (BOOST_DPM_LEVEL * 4), pi->psp);  in sumo_program_bsp()
368 		WREG32(CG_AT_0, value);  in sumo_write_at()
370 		WREG32(CG_AT_1, value);  in sumo_write_at()
372 		WREG32(CG_AT_2, value);  in sumo_write_at()
374 		WREG32(CG_AT_3, value);  in sumo_write_at()
376 		WREG32(CG_AT_4, value);  in sumo_write_at()
378 		WREG32(CG_AT_5, value);  in sumo_write_at()
380 		WREG32(CG_AT_6, value);  in sumo_write_at()
382 		WREG32(CG_AT_7, value);  in sumo_write_at()
455 	WREG32(CG_FTV, vrc);  in sumo_program_vc()
460 	WREG32(CG_FTV, 0);  in sumo_clear_vc()
471 	WREG32(CG_SSP, SSTU(u) | SST(p));  in sumo_program_sstp()
504 		WREG32(CG_SCLK_DPM_CTRL_6, dpm_ctrl);  in sumo_set_ds_dividers()
518 		WREG32(CG_SCLK_DPM_CTRL_11, dpm_ctrl);  in sumo_set_ss_dividers()
528 	WREG32(CG_DPM_VOLTAGE_CNTL, voltage_cntl);  in sumo_set_vid()
544 	WREG32(CG_SCLK_DPM_CTRL_3, cg_sclk_dpm_ctrl_3);  in sumo_set_allos_gnb_slow()
749 	WREG32(CG_SCLK_DPM_CTRL_4, dpm_ctrl4);  in sumo_program_wl()
809 	WREG32(CG_SCLK_DPM_CTRL_4, dpm_ctrl4);  in sumo_program_bootup_state()
885 	WREG32(DOUT_SCRATCH3, v);  in sumo_take_smu_control()
904 		WREG32(DEEP_SLEEP_CNTL2, deep_sleep_cntl2);  in sumo_enable_sclk_ds()
905 		WREG32(DEEP_SLEEP_CNTL, deep_sleep_cntl);  in sumo_enable_sclk_ds()
938 	WREG32(CG_SCLK_DPM_CTRL_5, cg_sclk_dpm_ctrl_5);  in sumo_program_ttp()
949 	WREG32(CG_SCLK_DPM_CTRL_3, cg_sclk_dpm_ctrl_3);  in sumo_program_ttt()
982 	WREG32(CG_SCLK_DPM_CTRL_4, cg_sclk_dpm_ctrl_4);  in sumo_program_dc_hto()