Lines Matching refs:table
1745 const struct atom_voltage_table *table,
2534 struct radeon_cac_leakage_table *table = in si_get_cac_std_voltage_max_min() local
2540 if (table == NULL) in si_get_cac_std_voltage_max_min()
2546 for (i = 0; i < table->count; i++) { in si_get_cac_std_voltage_max_min()
2547 if (table->entries[i].vddc > *max) in si_get_cac_std_voltage_max_min()
2548 *max = table->entries[i].vddc; in si_get_cac_std_voltage_max_min()
2549 if (table->entries[i].vddc < *min) in si_get_cac_std_voltage_max_min()
2550 *min = table->entries[i].vddc; in si_get_cac_std_voltage_max_min()
3832 const struct atom_voltage_table *table, in si_validate_phase_shedding_tables() argument
3837 if ((table == NULL) || (limits == NULL)) in si_validate_phase_shedding_tables()
3840 data = table->mask_low; in si_validate_phase_shedding_tables()
3849 if (table->count != num_levels) in si_validate_phase_shedding_tables()
3978 SISLANDS_SMC_STATETABLE *table) in si_populate_smc_voltage_table() argument
3983 table->lowSMIO[i] |= cpu_to_be32(voltage_table->entries[i].smio_low); in si_populate_smc_voltage_table()
3987 SISLANDS_SMC_STATETABLE *table) in si_populate_smc_voltage_tables() argument
4003 si_populate_smc_voltage_table(rdev, &eg_pi->vddc_voltage_table, table); in si_populate_smc_voltage_tables()
4004 table->voltageMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC] = in si_populate_smc_voltage_tables()
4009 table->maxVDDCIndexInPPTable = i; in si_populate_smc_voltage_tables()
4016 si_populate_smc_voltage_table(rdev, &eg_pi->vddci_voltage_table, table); in si_populate_smc_voltage_tables()
4018 table->voltageMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDCI] = in si_populate_smc_voltage_tables()
4024 si_populate_smc_voltage_table(rdev, &si_pi->mvdd_voltage_table, table); in si_populate_smc_voltage_tables()
4026 table->voltageMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_MVDD] = in si_populate_smc_voltage_tables()
4033 si_populate_smc_voltage_table(rdev, &si_pi->vddc_phase_shed_table, table); in si_populate_smc_voltage_tables()
4035 table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC] = in si_populate_smc_voltage_tables()
4050 const struct atom_voltage_table *table, in si_populate_voltage_value() argument
4055 for (i = 0; i < table->count; i++) { in si_populate_voltage_value()
4056 if (value <= table->entries[i].value) { in si_populate_voltage_value()
4058 voltage->value = cpu_to_be16(table->entries[i].value); in si_populate_voltage_value()
4063 if (i >= table->count) in si_populate_voltage_value()
4306 SISLANDS_SMC_STATETABLE *table) in si_populate_smc_initial_state() argument
4315 table->initialState.levels[0].mclk.vDLL_CNTL = in si_populate_smc_initial_state()
4317 table->initialState.levels[0].mclk.vMCLK_PWRMGT_CNTL = in si_populate_smc_initial_state()
4319 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = in si_populate_smc_initial_state()
4321 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = in si_populate_smc_initial_state()
4323 table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL = in si_populate_smc_initial_state()
4325 table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL_1 = in si_populate_smc_initial_state()
4327 table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL_2 = in si_populate_smc_initial_state()
4329 table->initialState.levels[0].mclk.vMPLL_SS = in si_populate_smc_initial_state()
4331 table->initialState.levels[0].mclk.vMPLL_SS2 = in si_populate_smc_initial_state()
4334 table->initialState.levels[0].mclk.mclk_value = in si_populate_smc_initial_state()
4337 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = in si_populate_smc_initial_state()
4339 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = in si_populate_smc_initial_state()
4341 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = in si_populate_smc_initial_state()
4343 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_4 = in si_populate_smc_initial_state()
4345 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM = in si_populate_smc_initial_state()
4347 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 = in si_populate_smc_initial_state()
4350 table->initialState.levels[0].sclk.sclk_value = in si_populate_smc_initial_state()
4353 table->initialState.levels[0].arbRefreshState = in si_populate_smc_initial_state()
4356 table->initialState.levels[0].ACIndex = 0; in si_populate_smc_initial_state()
4360 &table->initialState.levels[0].vddc); in si_populate_smc_initial_state()
4366 &table->initialState.levels[0].vddc, in si_populate_smc_initial_state()
4370 table->initialState.levels[0].vddc.index, in si_populate_smc_initial_state()
4371 &table->initialState.levels[0].std_vddc); in si_populate_smc_initial_state()
4378 &table->initialState.levels[0].vddci); in si_populate_smc_initial_state()
4386 &table->initialState.levels[0].vddc); in si_populate_smc_initial_state()
4388 si_populate_initial_mvdd_value(rdev, &table->initialState.levels[0].mvdd); in si_populate_smc_initial_state()
4391 table->initialState.levels[0].aT = cpu_to_be32(reg); in si_populate_smc_initial_state()
4393 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp); in si_populate_smc_initial_state()
4395 table->initialState.levels[0].gen2PCIE = (u8)si_pi->boot_pcie_gen; in si_populate_smc_initial_state()
4398 table->initialState.levels[0].strobeMode = in si_populate_smc_initial_state()
4403 … table->initialState.levels[0].mcFlags = SISLANDS_SMC_MC_EDC_RD_FLAG | SISLANDS_SMC_MC_EDC_WR_FLAG; in si_populate_smc_initial_state()
4405 table->initialState.levels[0].mcFlags = 0; in si_populate_smc_initial_state()
4408 table->initialState.levelCount = 1; in si_populate_smc_initial_state()
4410 table->initialState.flags |= PPSMC_SWSTATE_FLAG_DC; in si_populate_smc_initial_state()
4412 table->initialState.levels[0].dpm2.MaxPS = 0; in si_populate_smc_initial_state()
4413 table->initialState.levels[0].dpm2.NearTDPDec = 0; in si_populate_smc_initial_state()
4414 table->initialState.levels[0].dpm2.AboveSafeInc = 0; in si_populate_smc_initial_state()
4415 table->initialState.levels[0].dpm2.BelowSafeInc = 0; in si_populate_smc_initial_state()
4416 table->initialState.levels[0].dpm2.PwrEfficiencyRatio = 0; in si_populate_smc_initial_state()
4419 table->initialState.levels[0].SQPowerThrottle = cpu_to_be32(reg); in si_populate_smc_initial_state()
4422 table->initialState.levels[0].SQPowerThrottle_2 = cpu_to_be32(reg); in si_populate_smc_initial_state()
4428 SISLANDS_SMC_STATETABLE *table) in si_populate_smc_acpi_state() argument
4447 table->ACPIState = table->initialState; in si_populate_smc_acpi_state()
4449 table->ACPIState.flags &= ~PPSMC_SWSTATE_FLAG_DC; in si_populate_smc_acpi_state()
4453 pi->acpi_vddc, &table->ACPIState.levels[0].vddc); in si_populate_smc_acpi_state()
4458 &table->ACPIState.levels[0].vddc, &std_vddc); in si_populate_smc_acpi_state()
4461 table->ACPIState.levels[0].vddc.index, in si_populate_smc_acpi_state()
4462 &table->ACPIState.levels[0].std_vddc); in si_populate_smc_acpi_state()
4464 table->ACPIState.levels[0].gen2PCIE = si_pi->acpi_pcie_gen; in si_populate_smc_acpi_state()
4472 &table->ACPIState.levels[0].vddc); in si_populate_smc_acpi_state()
4476 pi->min_vddc_in_table, &table->ACPIState.levels[0].vddc); in si_populate_smc_acpi_state()
4481 &table->ACPIState.levels[0].vddc, &std_vddc); in si_populate_smc_acpi_state()
4485 table->ACPIState.levels[0].vddc.index, in si_populate_smc_acpi_state()
4486 &table->ACPIState.levels[0].std_vddc); in si_populate_smc_acpi_state()
4488 table->ACPIState.levels[0].gen2PCIE = (u8)r600_get_pcie_gen_support(rdev, in si_populate_smc_acpi_state()
4499 &table->ACPIState.levels[0].vddc); in si_populate_smc_acpi_state()
4506 &table->ACPIState.levels[0].vddci); in si_populate_smc_acpi_state()
4517 table->ACPIState.levels[0].mclk.vDLL_CNTL = in si_populate_smc_acpi_state()
4519 table->ACPIState.levels[0].mclk.vMCLK_PWRMGT_CNTL = in si_populate_smc_acpi_state()
4521 table->ACPIState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = in si_populate_smc_acpi_state()
4523 table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = in si_populate_smc_acpi_state()
4525 table->ACPIState.levels[0].mclk.vMPLL_FUNC_CNTL = in si_populate_smc_acpi_state()
4527 table->ACPIState.levels[0].mclk.vMPLL_FUNC_CNTL_1 = in si_populate_smc_acpi_state()
4529 table->ACPIState.levels[0].mclk.vMPLL_FUNC_CNTL_2 = in si_populate_smc_acpi_state()
4531 table->ACPIState.levels[0].mclk.vMPLL_SS = in si_populate_smc_acpi_state()
4533 table->ACPIState.levels[0].mclk.vMPLL_SS2 = in si_populate_smc_acpi_state()
4536 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = in si_populate_smc_acpi_state()
4538 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = in si_populate_smc_acpi_state()
4540 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = in si_populate_smc_acpi_state()
4542 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_4 = in si_populate_smc_acpi_state()
4545 table->ACPIState.levels[0].mclk.mclk_value = 0; in si_populate_smc_acpi_state()
4546 table->ACPIState.levels[0].sclk.sclk_value = 0; in si_populate_smc_acpi_state()
4548 si_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in si_populate_smc_acpi_state()
4551 table->ACPIState.levels[0].ACIndex = 0; in si_populate_smc_acpi_state()
4553 table->ACPIState.levels[0].dpm2.MaxPS = 0; in si_populate_smc_acpi_state()
4554 table->ACPIState.levels[0].dpm2.NearTDPDec = 0; in si_populate_smc_acpi_state()
4555 table->ACPIState.levels[0].dpm2.AboveSafeInc = 0; in si_populate_smc_acpi_state()
4556 table->ACPIState.levels[0].dpm2.BelowSafeInc = 0; in si_populate_smc_acpi_state()
4557 table->ACPIState.levels[0].dpm2.PwrEfficiencyRatio = 0; in si_populate_smc_acpi_state()
4560 table->ACPIState.levels[0].SQPowerThrottle = cpu_to_be32(reg); in si_populate_smc_acpi_state()
4563 table->ACPIState.levels[0].SQPowerThrottle_2 = cpu_to_be32(reg); in si_populate_smc_acpi_state()
4638 SISLANDS_SMC_STATETABLE *table = &si_pi->smc_statetable; in si_init_smc_table() local
4643 si_populate_smc_voltage_tables(rdev, table); in si_init_smc_table()
4648 table->thermalProtectType = PPSMC_THERMAL_PROTECT_TYPE_INTERNAL; in si_init_smc_table()
4651 table->thermalProtectType = PPSMC_THERMAL_PROTECT_TYPE_NONE; in si_init_smc_table()
4654 table->thermalProtectType = PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL; in si_init_smc_table()
4659 table->systemFlags |= PPSMC_SYSTEMFLAG_GPIO_DC; in si_init_smc_table()
4663 table->systemFlags |= PPSMC_SYSTEMFLAG_REGULATOR_HOT; in si_init_smc_table()
4667 table->systemFlags |= PPSMC_SYSTEMFLAG_STEPVDDC; in si_init_smc_table()
4670 table->systemFlags |= PPSMC_SYSTEMFLAG_GDDR5; in si_init_smc_table()
4673 table->extraFlags |= PPSMC_EXTRAFLAGS_AC2DC_GPIO5_POLARITY_HIGH; in si_init_smc_table()
4676 table->systemFlags |= PPSMC_SYSTEMFLAG_REGULATOR_HOT_PROG_GPIO; in si_init_smc_table()
4682 ret = si_populate_smc_initial_state(rdev, radeon_boot_state, table); in si_init_smc_table()
4686 ret = si_populate_smc_acpi_state(rdev, table); in si_init_smc_table()
4690 table->driverState = table->initialState; in si_init_smc_table()
4698 ret = si_populate_ulv_state(rdev, &table->ULVState); in si_init_smc_table()
4712 table->ULVState = table->initialState; in si_init_smc_table()
4716 (u8 *)table, sizeof(SISLANDS_SMC_STATETABLE), in si_init_smc_table()
5295 struct si_mc_reg_table *table) in si_set_mc_special_registers() argument
5301 for (i = 0, j = table->last; i < table->last; i++) { in si_set_mc_special_registers()
5304 switch (table->mc_reg_address[i].s1 << 2) { in si_set_mc_special_registers()
5307 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in si_set_mc_special_registers()
5308 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2; in si_set_mc_special_registers()
5309 for (k = 0; k < table->num_entries; k++) in si_set_mc_special_registers()
5310 table->mc_reg_table_entry[k].mc_data[j] = in si_set_mc_special_registers()
5312 ((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16); in si_set_mc_special_registers()
5318 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; in si_set_mc_special_registers()
5319 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in si_set_mc_special_registers()
5320 for (k = 0; k < table->num_entries; k++) { in si_set_mc_special_registers()
5321 table->mc_reg_table_entry[k].mc_data[j] = in si_set_mc_special_registers()
5323 (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); in si_set_mc_special_registers()
5325 table->mc_reg_table_entry[k].mc_data[j] |= 0x100; in si_set_mc_special_registers()
5332 table->mc_reg_address[j].s1 = MC_PMG_AUTO_CMD >> 2; in si_set_mc_special_registers()
5333 table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD >> 2; in si_set_mc_special_registers()
5334 for (k = 0; k < table->num_entries; k++) in si_set_mc_special_registers()
5335 table->mc_reg_table_entry[k].mc_data[j] = in si_set_mc_special_registers()
5336 (table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16; in si_set_mc_special_registers()
5344 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2; in si_set_mc_special_registers()
5345 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2; in si_set_mc_special_registers()
5346 for(k = 0; k < table->num_entries; k++) in si_set_mc_special_registers()
5347 table->mc_reg_table_entry[k].mc_data[j] = in si_set_mc_special_registers()
5349 (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); in si_set_mc_special_registers()
5359 table->last = j; in si_set_mc_special_registers()
5419 static void si_set_valid_flag(struct si_mc_reg_table *table) in si_set_valid_flag() argument
5423 for (i = 0; i < table->last; i++) { in si_set_valid_flag()
5424 for (j = 1; j < table->num_entries; j++) { in si_set_valid_flag()
5425 if (table->mc_reg_table_entry[j-1].mc_data[i] != table->mc_reg_table_entry[j].mc_data[i]) { in si_set_valid_flag()
5426 table->valid_flag |= 1 << i; in si_set_valid_flag()
5433 static void si_set_s0_mc_reg_index(struct si_mc_reg_table *table) in si_set_s0_mc_reg_index() argument
5438 for (i = 0; i < table->last; i++) in si_set_s0_mc_reg_index()
5439 table->mc_reg_address[i].s0 = si_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) ? in si_set_s0_mc_reg_index()
5440 address : table->mc_reg_address[i].s1; in si_set_s0_mc_reg_index()
5444 static int si_copy_vbios_mc_reg_table(struct atom_mc_reg_table *table, in si_copy_vbios_mc_reg_table() argument
5449 if (table->last > SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE) in si_copy_vbios_mc_reg_table()
5451 if (table->num_entries > MAX_AC_TIMING_ENTRIES) in si_copy_vbios_mc_reg_table()
5454 for (i = 0; i < table->last; i++) in si_copy_vbios_mc_reg_table()
5455 si_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in si_copy_vbios_mc_reg_table()
5456 si_table->last = table->last; in si_copy_vbios_mc_reg_table()
5458 for (i = 0; i < table->num_entries; i++) { in si_copy_vbios_mc_reg_table()
5460 table->mc_reg_table_entry[i].mclk_max; in si_copy_vbios_mc_reg_table()
5461 for (j = 0; j < table->last; j++) { in si_copy_vbios_mc_reg_table()
5463 table->mc_reg_table_entry[i].mc_data[j]; in si_copy_vbios_mc_reg_table()
5466 si_table->num_entries = table->num_entries; in si_copy_vbios_mc_reg_table()
5474 struct atom_mc_reg_table *table; in si_initialize_mc_reg_table() local
5479 table = kzalloc(sizeof(struct atom_mc_reg_table), GFP_KERNEL); in si_initialize_mc_reg_table()
5480 if (!table) in si_initialize_mc_reg_table()
5498 ret = radeon_atom_init_mc_reg_table(rdev, module_index, table); in si_initialize_mc_reg_table()
5502 ret = si_copy_vbios_mc_reg_table(table, si_table); in si_initialize_mc_reg_table()
5515 kfree(table); in si_initialize_mc_reg_table()
5807 struct radeon_clock_voltage_dependency_table *table) in si_patch_single_dependency_table_based_on_leakage() argument
5813 if (table) { in si_patch_single_dependency_table_based_on_leakage()
5814 for (i = 0; i < table->count; i++) { in si_patch_single_dependency_table_based_on_leakage()
5816 table->entries[i].v, in si_patch_single_dependency_table_based_on_leakage()
5819 table->entries[i].v = leakage_voltage; in si_patch_single_dependency_table_based_on_leakage()
5829 for (j = (table->count - 2); j >= 0; j--) { in si_patch_single_dependency_table_based_on_leakage()
5830 table->entries[j].v = (table->entries[j].v <= table->entries[j + 1].v) ? in si_patch_single_dependency_table_based_on_leakage()
5831 table->entries[j].v : table->entries[j + 1].v; in si_patch_single_dependency_table_based_on_leakage()