1740 struct ni_ps *ni_get_ps(struct radeon_ps *rps);
2937 					struct radeon_ps *rps)  in si_apply_state_adjust_rules()  argument
2939 	struct ni_ps *ps = ni_get_ps(rps);  in si_apply_state_adjust_rules()
2967 	if (rps->vclk || rps->dclk) {  in si_apply_state_adjust_rules()
3342 	struct radeon_ps *rps = rdev->pm.dpm.current_ps;  in si_dpm_force_performance_level()  local
3343 	struct ni_ps *ps = ni_get_ps(rps);  in si_dpm_force_performance_level()
6627 					  struct radeon_ps *rps,  in si_parse_pplib_non_clock_info()  argument
6631 	rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings);  in si_parse_pplib_non_clock_info()
6632 	rps->class = le16_to_cpu(non_clock_info->usClassification);  in si_parse_pplib_non_clock_info()
6633 	rps->class2 = le16_to_cpu(non_clock_info->usClassification2);  in si_parse_pplib_non_clock_info()
6636 		rps->vclk = le32_to_cpu(non_clock_info->ulVCLK);  in si_parse_pplib_non_clock_info()
6637 		rps->dclk = le32_to_cpu(non_clock_info->ulDCLK);  in si_parse_pplib_non_clock_info()
6638 	} else if (r600_is_uvd_state(rps->class, rps->class2)) {  in si_parse_pplib_non_clock_info()
6639 		rps->vclk = RV770_DEFAULT_VCLK_FREQ;  in si_parse_pplib_non_clock_info()
6640 		rps->dclk = RV770_DEFAULT_DCLK_FREQ;  in si_parse_pplib_non_clock_info()
6642 		rps->vclk = 0;  in si_parse_pplib_non_clock_info()
6643 		rps->dclk = 0;  in si_parse_pplib_non_clock_info()
6646 	if (rps->class & ATOM_PPLIB_CLASSIFICATION_BOOT)  in si_parse_pplib_non_clock_info()
6647 		rdev->pm.dpm.boot_ps = rps;  in si_parse_pplib_non_clock_info()
6648 	if (rps->class & ATOM_PPLIB_CLASSIFICATION_UVDSTATE)  in si_parse_pplib_non_clock_info()
6649 		rdev->pm.dpm.uvd_ps = rps;  in si_parse_pplib_non_clock_info()
6653 				      struct radeon_ps *rps, int index,  in si_parse_pplib_clock_info()  argument
6659 	struct ni_ps *ps = ni_get_ps(rps);  in si_parse_pplib_clock_info()
6685 	if (rps->class & ATOM_PPLIB_CLASSIFICATION_ACPI) {  in si_parse_pplib_clock_info()
6691 	if ((rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) &&  in si_parse_pplib_clock_info()
6709 	if (rps->class & ATOM_PPLIB_CLASSIFICATION_BOOT) {  in si_parse_pplib_clock_info()
6719 	if ((rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) ==  in si_parse_pplib_clock_info()
6986 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_debugfs_print_current_performance_level()  local
6987 	struct ni_ps *ps = ni_get_ps(rps);  in si_dpm_debugfs_print_current_performance_level()
6997 		seq_printf(m, "uvd    vclk: %d dclk: %d\n", rps->vclk, rps->dclk);  in si_dpm_debugfs_print_current_performance_level()
7006 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_get_current_sclk()  local
7007 	struct ni_ps *ps = ni_get_ps(rps);  in si_dpm_get_current_sclk()
7024 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_get_current_mclk()  local
7025 	struct ni_ps *ps = ni_get_ps(rps);  in si_dpm_get_current_mclk()