2288 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_power_containment_values()  local
2347 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_power_containment_values()
2356 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_power_containment_values()
3610 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_program_ds_registers()  local
3613 	if (eg_pi->sclk_deep_sleep) {  in si_program_ds_registers()
3899 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_construct_voltage_tables()  local
3905 						    VOLTAGE_OBJ_GPIO_LUT, &eg_pi->vddc_voltage_table);  in si_construct_voltage_tables()
3909 		if (eg_pi->vddc_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)  in si_construct_voltage_tables()
3912 								 &eg_pi->vddc_voltage_table);  in si_construct_voltage_tables()
3916 						&eg_pi->vddc_voltage_table);  in si_construct_voltage_tables()
3923 	if (eg_pi->vddci_control) {  in si_construct_voltage_tables()
3925 						    VOLTAGE_OBJ_GPIO_LUT, &eg_pi->vddci_voltage_table);  in si_construct_voltage_tables()
3929 		if (eg_pi->vddci_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)  in si_construct_voltage_tables()
3932 								 &eg_pi->vddci_voltage_table);  in si_construct_voltage_tables()
3937 						&eg_pi->vddci_voltage_table);  in si_construct_voltage_tables()
3990 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_smc_voltage_tables()  local
4002 		if (eg_pi->vddc_voltage_table.count) {  in si_populate_smc_voltage_tables()
4003 			si_populate_smc_voltage_table(rdev, &eg_pi->vddc_voltage_table, table);  in si_populate_smc_voltage_tables()
4005 				cpu_to_be32(eg_pi->vddc_voltage_table.mask_low);  in si_populate_smc_voltage_tables()
4007 			for (i = 0; i < eg_pi->vddc_voltage_table.count; i++) {  in si_populate_smc_voltage_tables()
4008 				if (pi->max_vddc_in_table <= eg_pi->vddc_voltage_table.entries[i].value) {  in si_populate_smc_voltage_tables()
4015 		if (eg_pi->vddci_voltage_table.count) {  in si_populate_smc_voltage_tables()
4016 			si_populate_smc_voltage_table(rdev, &eg_pi->vddci_voltage_table, table);  in si_populate_smc_voltage_tables()
4019 				cpu_to_be32(eg_pi->vddci_voltage_table.mask_low);  in si_populate_smc_voltage_tables()
4310 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_smc_initial_state()  local
4358 	ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_smc_initial_state()
4374 	if (eg_pi->vddci_control)  in si_populate_smc_initial_state()
4376 					  &eg_pi->vddci_voltage_table,  in si_populate_smc_initial_state()
4431 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_smc_acpi_state()  local
4452 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_smc_acpi_state()
4475 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_smc_acpi_state()
4503 		if (eg_pi->acpi_vddci)  in si_populate_smc_acpi_state()
4504 			si_populate_voltage_value(rdev, &eg_pi->vddci_voltage_table,  in si_populate_smc_acpi_state()
4505 						  eg_pi->acpi_vddci,  in si_populate_smc_acpi_state()
4550 	if (eg_pi->dynamic_ac_timing)  in si_populate_smc_acpi_state()
4571 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_ulv_state()  local
4580 		if (eg_pi->sclk_deep_sleep) {  in si_populate_ulv_state()
4920 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_convert_power_level_to_smc()  local
4927 	if (eg_pi->pcie_performance_request &&  in si_convert_power_level_to_smc()
4941 	    !eg_pi->uvd_enabled &&  in si_convert_power_level_to_smc()
4954 		if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold)  in si_convert_power_level_to_smc()
4984 					&eg_pi->vddc_voltage_table,  in si_convert_power_level_to_smc()
4999 	if (eg_pi->vddci_control) {  in si_convert_power_level_to_smc()
5000 		ret = si_populate_voltage_value(rdev, &eg_pi->vddci_voltage_table,  in si_convert_power_level_to_smc()
5131 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_convert_power_state_to_smc()  local
5145 		eg_pi->uvd_enabled = true;  in si_convert_power_state_to_smc()
5146 		if (eg_pi->smu_uvd_hs)  in si_convert_power_state_to_smc()
5149 		eg_pi->uvd_enabled = false;  in si_convert_power_state_to_smc()
5157 		if (eg_pi->sclk_deep_sleep) {  in si_convert_power_state_to_smc()
5182 		if (eg_pi->dynamic_ac_timing)  in si_convert_power_state_to_smc()
5750 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
5752 	if (eg_pi->sclk_deep_sleep) {
6273 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_enable()  local
6291 	if (eg_pi->dynamic_ac_timing) {  in si_dpm_enable()
6294 			eg_pi->dynamic_ac_timing = false;  in si_dpm_enable()
6337 	if (eg_pi->dynamic_ac_timing) {  in si_dpm_enable()
6443 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_pre_set_power_state()  local
6449 	si_apply_state_adjust_rules(rdev, &eg_pi->requested_rps);  in si_dpm_pre_set_power_state()
6482 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_set_power_state()  local
6483 	struct radeon_ps *new_ps = &eg_pi->requested_rps;  in si_dpm_set_power_state()
6484 	struct radeon_ps *old_ps = &eg_pi->current_rps;  in si_dpm_set_power_state()
6497 	if (eg_pi->pcie_performance_request)  in si_dpm_set_power_state()
6530 	if (eg_pi->dynamic_ac_timing) {  in si_dpm_set_power_state()
6555 	if (eg_pi->pcie_performance_request)  in si_dpm_set_power_state()
6584 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_post_set_power_state()  local
6585 	struct radeon_ps *new_ps = &eg_pi->requested_rps;  in si_dpm_post_set_power_state()
6657 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_parse_pplib_clock_info()  local
6687 		eg_pi->acpi_vddci = pl->vddci;  in si_parse_pplib_clock_info()
6807 	struct evergreen_power_info *eg_pi;  in si_dpm_init()  local
6819 	eg_pi = &ni_pi->eg;  in si_dpm_init()
6820 	pi = &eg_pi->rv7xx;  in si_dpm_init()
6837 	eg_pi->acpi_vddci = 0;  in si_dpm_init()
6880 	eg_pi->smu_uvd_hs = false;  in si_dpm_init()
6888 	eg_pi->mclk_edc_wr_enable_threshold = 40000;  in si_dpm_init()
6890 	ni_pi->mclk_rtt_mode_threshold = eg_pi->mclk_edc_wr_enable_threshold;  in si_dpm_init()
6908 	eg_pi->vddci_control =  in si_dpm_init()
6911 	if (!eg_pi->vddci_control)  in si_dpm_init()
6928 	eg_pi->sclk_deep_sleep = true;  in si_dpm_init()
6936 	eg_pi->dynamic_ac_timing = true;  in si_dpm_init()
6938 	eg_pi->light_sleep = true;  in si_dpm_init()
6940 	eg_pi->pcie_performance_request =  in si_dpm_init()
6943 	eg_pi->pcie_performance_request = false;  in si_dpm_init()
6985 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_debugfs_print_current_performance_level()  local
6986 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_debugfs_print_current_performance_level()
7005 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_get_current_sclk()  local
7006 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_get_current_sclk()
7023 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_get_current_mclk()  local
7024 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_get_current_mclk()