258 			 RV770_SMC_SWSTATE *smc_state)  in rv770_populate_smc_t()  argument
290 		smc_state->levels[i].aT = cpu_to_be32(a_t);  in rv770_populate_smc_t()
296 	smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].aT =  in rv770_populate_smc_t()
304 			  RV770_SMC_SWSTATE *smc_state)  in rv770_populate_smc_sp()  argument
310 		smc_state->levels[i].bSP = cpu_to_be32(pi->dsp);  in rv770_populate_smc_sp()
312 	smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].bSP =  in rv770_populate_smc_sp()
676 					    RV770_SMC_SWSTATE *smc_state)  in rv770_convert_power_state_to_smc()  argument
682 		smc_state->flags |= PPSMC_SWSTATE_FLAG_DC;  in rv770_convert_power_state_to_smc()
686 					       &smc_state->levels[0],  in rv770_convert_power_state_to_smc()
693 					       &smc_state->levels[1],  in rv770_convert_power_state_to_smc()
700 					       &smc_state->levels[2],  in rv770_convert_power_state_to_smc()
705 	smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1;  in rv770_convert_power_state_to_smc()
706 	smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2;  in rv770_convert_power_state_to_smc()
707 	smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3;  in rv770_convert_power_state_to_smc()
709 	smc_state->levels[0].seqValue = rv770_get_seq_value(rdev,  in rv770_convert_power_state_to_smc()
711 	smc_state->levels[1].seqValue = rv770_get_seq_value(rdev,  in rv770_convert_power_state_to_smc()
713 	smc_state->levels[2].seqValue = rv770_get_seq_value(rdev,  in rv770_convert_power_state_to_smc()
716 	rv770_populate_smc_sp(rdev, radeon_state, smc_state);  in rv770_convert_power_state_to_smc()
718 	return rv770_populate_smc_t(rdev, radeon_state, smc_state);  in rv770_convert_power_state_to_smc()