Lines Matching refs:ring
1083 rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false; in r700_cp_stop()
1126 struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; in r700_cp_fini() local
1128 radeon_ring_fini(rdev, ring); in r700_cp_fini()
1129 radeon_scratch_free(rdev, ring->rptr_save_reg); in r700_cp_fini()
1686 struct radeon_ring *ring; in rv770_startup() local
1735 rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0; in rv770_startup()
1752 ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; in rv770_startup()
1753 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, in rv770_startup()
1758 ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; in rv770_startup()
1759 r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, in rv770_startup()
1775 ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX]; in rv770_startup()
1776 if (ring->ring_size) { in rv770_startup()
1777 r = radeon_ring_init(rdev, ring, ring->ring_size, 0, in rv770_startup()
1914 rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL; in rv770_init()
1915 r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024); in rv770_init()
1917 rdev->ring[R600_RING_TYPE_DMA_INDEX].ring_obj = NULL; in rv770_init()
1918 r600_ring_init(rdev, &rdev->ring[R600_RING_TYPE_DMA_INDEX], 64 * 1024); in rv770_init()
1922 rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_obj = NULL; in rv770_init()
1923 r600_ring_init(rdev, &rdev->ring[R600_RING_TYPE_UVD_INDEX], in rv770_init()