32 struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev);
121 int rv740_populate_sclk_value(struct radeon_device *rdev, u32 engine_clock,  in rv740_populate_sclk_value()  argument
124 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in rv740_populate_sclk_value()
132 	u32 reference_clock = rdev->clock.spll.reference_freq;  in rv740_populate_sclk_value()
137 	ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM,  in rv740_populate_sclk_value()
163 		if (radeon_atombios_get_asic_ss_info(rdev, &ss,  in rv740_populate_sclk_value()
187 int rv740_populate_mclk_value(struct radeon_device *rdev,  in rv740_populate_mclk_value()  argument
191 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in rv740_populate_mclk_value()
205 	ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_MEMORY_PLL_PARAM,  in rv740_populate_mclk_value()
210 	ibias = rv770_map_clkf_to_ibias(rdev, dividers.whole_fb_div);  in rv740_populate_mclk_value()
250 		if (radeon_atombios_get_asic_ss_info(rdev, &ss,  in rv740_populate_mclk_value()
252 			u32 reference_clock = rdev->clock.mpll.reference_freq;  in rv740_populate_mclk_value()
285 void rv740_read_clock_registers(struct radeon_device *rdev)  in rv740_read_clock_registers()  argument
287 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in rv740_read_clock_registers()
315 int rv740_populate_smc_acpi_state(struct radeon_device *rdev,  in rv740_populate_smc_acpi_state()  argument
318 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in rv740_populate_smc_acpi_state()
334 		rv770_populate_vddc_value(rdev, pi->acpi_vddc,  in rv740_populate_smc_acpi_state()
342 		rv770_populate_vddc_value(rdev, pi->min_vddc_in_table,  in rv740_populate_smc_acpi_state()
392 	rv770_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd);  in rv740_populate_smc_acpi_state()
397 void rv740_enable_mclk_spread_spectrum(struct radeon_device *rdev,  in rv740_enable_mclk_spread_spectrum()  argument