58 	for (i = 0; i < rdev->pm.num_power_states; i++) {  in radeon_pm_get_type_index()
59 		if (rdev->pm.power_state[i].type == ps_type) {  in radeon_pm_get_type_index()
66 	return rdev->pm.default_power_state_index;  in radeon_pm_get_type_index()
71 	if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {  in radeon_pm_acpi_event_handler()
72 		mutex_lock(&rdev->pm.mutex);  in radeon_pm_acpi_event_handler()
74 			rdev->pm.dpm.ac_power = true;  in radeon_pm_acpi_event_handler()
76 			rdev->pm.dpm.ac_power = false;  in radeon_pm_acpi_event_handler()
79 				radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power);  in radeon_pm_acpi_event_handler()
81 		mutex_unlock(&rdev->pm.mutex);  in radeon_pm_acpi_event_handler()
82         } else if (rdev->pm.pm_method == PM_METHOD_PROFILE) {  in radeon_pm_acpi_event_handler()
83 		if (rdev->pm.profile == PM_PROFILE_AUTO) {  in radeon_pm_acpi_event_handler()
84 			mutex_lock(&rdev->pm.mutex);  in radeon_pm_acpi_event_handler()
87 			mutex_unlock(&rdev->pm.mutex);  in radeon_pm_acpi_event_handler()
94 	switch (rdev->pm.profile) {  in radeon_pm_update_profile()
96 		rdev->pm.profile_index = PM_PROFILE_DEFAULT_IDX;  in radeon_pm_update_profile()
100 			if (rdev->pm.active_crtc_count > 1)  in radeon_pm_update_profile()
101 				rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX;  in radeon_pm_update_profile()
103 				rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX;  in radeon_pm_update_profile()
105 			if (rdev->pm.active_crtc_count > 1)  in radeon_pm_update_profile()
106 				rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX;  in radeon_pm_update_profile()
108 				rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX;  in radeon_pm_update_profile()
112 		if (rdev->pm.active_crtc_count > 1)  in radeon_pm_update_profile()
113 			rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX;  in radeon_pm_update_profile()
115 			rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX;  in radeon_pm_update_profile()
118 		if (rdev->pm.active_crtc_count > 1)  in radeon_pm_update_profile()
119 			rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX;  in radeon_pm_update_profile()
121 			rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX;  in radeon_pm_update_profile()
124 		if (rdev->pm.active_crtc_count > 1)  in radeon_pm_update_profile()
125 			rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX;  in radeon_pm_update_profile()
127 			rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX;  in radeon_pm_update_profile()
131 	if (rdev->pm.active_crtc_count == 0) {  in radeon_pm_update_profile()
132 		rdev->pm.requested_power_state_index =  in radeon_pm_update_profile()
133 			rdev->pm.profiles[rdev->pm.profile_index].dpms_off_ps_idx;  in radeon_pm_update_profile()
134 		rdev->pm.requested_clock_mode_index =  in radeon_pm_update_profile()
135 			rdev->pm.profiles[rdev->pm.profile_index].dpms_off_cm_idx;  in radeon_pm_update_profile()
137 		rdev->pm.requested_power_state_index =  in radeon_pm_update_profile()
138 			rdev->pm.profiles[rdev->pm.profile_index].dpms_on_ps_idx;  in radeon_pm_update_profile()
139 		rdev->pm.requested_clock_mode_index =  in radeon_pm_update_profile()
140 			rdev->pm.profiles[rdev->pm.profile_index].dpms_on_cm_idx;  in radeon_pm_update_profile()
159 	if (rdev->pm.active_crtcs) {  in radeon_sync_with_vblank()
160 		rdev->pm.vblank_sync = false;  in radeon_sync_with_vblank()
162 			rdev->irq.vblank_queue, rdev->pm.vblank_sync,  in radeon_sync_with_vblank()
172 	if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) &&  in radeon_set_power_state()
173 	    (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index))  in radeon_set_power_state()
177 		sclk = rdev->pm.power_state[rdev->pm.requested_power_state_index].  in radeon_set_power_state()
178 			clock_info[rdev->pm.requested_clock_mode_index].sclk;  in radeon_set_power_state()
179 		if (sclk > rdev->pm.default_sclk)  in radeon_set_power_state()
180 			sclk = rdev->pm.default_sclk;  in radeon_set_power_state()
186 		if ((rdev->pm.pm_method == PM_METHOD_PROFILE) &&  in radeon_set_power_state()
188 		    rdev->pm.active_crtc_count &&  in radeon_set_power_state()
189 		    ((rdev->pm.profile_index == PM_PROFILE_MID_MH_IDX) ||  in radeon_set_power_state()
190 		     (rdev->pm.profile_index == PM_PROFILE_LOW_MH_IDX)))  in radeon_set_power_state()
191 			mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index].  in radeon_set_power_state()
192 				clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].mclk;  in radeon_set_power_state()
194 			mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index].  in radeon_set_power_state()
195 				clock_info[rdev->pm.requested_clock_mode_index].mclk;  in radeon_set_power_state()
197 		if (mclk > rdev->pm.default_mclk)  in radeon_set_power_state()
198 			mclk = rdev->pm.default_mclk;  in radeon_set_power_state()
201 		if (sclk < rdev->pm.current_sclk)  in radeon_set_power_state()
206 		if (rdev->pm.pm_method == PM_METHOD_DYNPM) {  in radeon_set_power_state()
218 		if (sclk != rdev->pm.current_sclk) {  in radeon_set_power_state()
222 			rdev->pm.current_sclk = sclk;  in radeon_set_power_state()
227 		if (rdev->asic->pm.set_memory_clock && (mclk != rdev->pm.current_mclk)) {  in radeon_set_power_state()
231 			rdev->pm.current_mclk = mclk;  in radeon_set_power_state()
241 		rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index;  in radeon_set_power_state()
242 		rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index;  in radeon_set_power_state()
252 	if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) &&  in radeon_pm_set_clocks()
253 	    (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index))  in radeon_pm_set_clocks()
257 	down_write(&rdev->pm.mclk_lock);  in radeon_pm_set_clocks()
270 			up_write(&rdev->pm.mclk_lock);  in radeon_pm_set_clocks()
280 			if (rdev->pm.active_crtcs & (1 << i)) {  in radeon_pm_set_clocks()
281 				rdev->pm.req_vblank |= (1 << i);  in radeon_pm_set_clocks()
291 			if (rdev->pm.req_vblank & (1 << i)) {  in radeon_pm_set_clocks()
292 				rdev->pm.req_vblank &= ~(1 << i);  in radeon_pm_set_clocks()
300 	if (rdev->pm.active_crtc_count)  in radeon_pm_set_clocks()
303 	rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;  in radeon_pm_set_clocks()
306 	up_write(&rdev->pm.mclk_lock);  in radeon_pm_set_clocks()
316 	DRM_DEBUG_DRIVER("%d Power State(s)\n", rdev->pm.num_power_states);  in radeon_pm_print_states()
317 	for (i = 0; i < rdev->pm.num_power_states; i++) {  in radeon_pm_print_states()
318 		power_state = &rdev->pm.power_state[i];  in radeon_pm_print_states()
321 		if (i == rdev->pm.default_power_state_index)  in radeon_pm_print_states()
350 	int cp = rdev->pm.profile;  in radeon_get_pm_profile()
372 	mutex_lock(&rdev->pm.mutex);  in radeon_set_pm_profile()
373 	if (rdev->pm.pm_method == PM_METHOD_PROFILE) {  in radeon_set_pm_profile()
375 			rdev->pm.profile = PM_PROFILE_DEFAULT;  in radeon_set_pm_profile()
377 			rdev->pm.profile = PM_PROFILE_AUTO;  in radeon_set_pm_profile()
379 			rdev->pm.profile = PM_PROFILE_LOW;  in radeon_set_pm_profile()
381 			rdev->pm.profile = PM_PROFILE_MID;  in radeon_set_pm_profile()
383 			rdev->pm.profile = PM_PROFILE_HIGH;  in radeon_set_pm_profile()
394 	mutex_unlock(&rdev->pm.mutex);  in radeon_set_pm_profile()
405 	int pm = rdev->pm.pm_method;  in radeon_get_pm_method()  local
408 			(pm == PM_METHOD_DYNPM) ? "dynpm" :  in radeon_get_pm_method()
409 			(pm == PM_METHOD_PROFILE) ? "profile" : "dpm");  in radeon_get_pm_method()
428 	if (rdev->pm.pm_method == PM_METHOD_DPM) {  in radeon_set_pm_method()
434 		mutex_lock(&rdev->pm.mutex);  in radeon_set_pm_method()
435 		rdev->pm.pm_method = PM_METHOD_DYNPM;  in radeon_set_pm_method()
436 		rdev->pm.dynpm_state = DYNPM_STATE_PAUSED;  in radeon_set_pm_method()
437 		rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT;  in radeon_set_pm_method()
438 		mutex_unlock(&rdev->pm.mutex);  in radeon_set_pm_method()
440 		mutex_lock(&rdev->pm.mutex);  in radeon_set_pm_method()
442 		rdev->pm.dynpm_state = DYNPM_STATE_DISABLED;  in radeon_set_pm_method()
443 		rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;  in radeon_set_pm_method()
444 		rdev->pm.pm_method = PM_METHOD_PROFILE;  in radeon_set_pm_method()
445 		mutex_unlock(&rdev->pm.mutex);  in radeon_set_pm_method()
446 		cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work);  in radeon_set_pm_method()
462 	enum radeon_pm_state_type pm = rdev->pm.dpm.user_state;  in radeon_get_dpm_state()  local
465 			(pm == POWER_STATE_TYPE_BATTERY) ? "battery" :  in radeon_get_dpm_state()
466 			(pm == POWER_STATE_TYPE_BALANCED) ? "balanced" : "performance");  in radeon_get_dpm_state()
477 	mutex_lock(&rdev->pm.mutex);  in radeon_set_dpm_state()
479 		rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY;  in radeon_set_dpm_state()
481 		rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED;  in radeon_set_dpm_state()
483 		rdev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE;  in radeon_set_dpm_state()
485 		mutex_unlock(&rdev->pm.mutex);  in radeon_set_dpm_state()
489 	mutex_unlock(&rdev->pm.mutex);  in radeon_set_dpm_state()
506 	enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level;  in radeon_get_dpm_forced_performance_level()
532 	mutex_lock(&rdev->pm.mutex);  in radeon_set_dpm_forced_performance_level()
544 		if (rdev->pm.dpm.thermal_active) {  in radeon_set_dpm_forced_performance_level()
553 	mutex_unlock(&rdev->pm.mutex);  in radeon_set_dpm_forced_performance_level()
672 	if (rdev->asic->pm.get_temperature)  in radeon_hwmon_show_temp()
689 		temp = rdev->pm.dpm.thermal.min_temp;  in radeon_hwmon_show_temp_thresh()
691 		temp = rdev->pm.dpm.thermal.max_temp;  in radeon_hwmon_show_temp_thresh()
724 	if (rdev->pm.pm_method != PM_METHOD_DPM &&  in hwmon_attributes_visible()
734 	if (rdev->pm.no_fan &&  in hwmon_attributes_visible()
778 	switch (rdev->pm.int_thermal_type) {  in radeon_hwmon_init()
787 		if (rdev->asic->pm.get_temperature == NULL)  in radeon_hwmon_init()
789 		rdev->pm.int_hwmon_dev = hwmon_device_register_with_groups(rdev->dev,  in radeon_hwmon_init()
792 		if (IS_ERR(rdev->pm.int_hwmon_dev)) {  in radeon_hwmon_init()
793 			err = PTR_ERR(rdev->pm.int_hwmon_dev);  in radeon_hwmon_init()
807 	if (rdev->pm.int_hwmon_dev)  in radeon_hwmon_fini()
808 		hwmon_device_unregister(rdev->pm.int_hwmon_dev);  in radeon_hwmon_fini()
815 			     pm.dpm.thermal.work);  in radeon_dpm_thermal_work_handler()
819 	if (!rdev->pm.dpm_enabled)  in radeon_dpm_thermal_work_handler()
822 	if (rdev->asic->pm.get_temperature) {  in radeon_dpm_thermal_work_handler()
825 		if (temp < rdev->pm.dpm.thermal.min_temp)  in radeon_dpm_thermal_work_handler()
827 			dpm_state = rdev->pm.dpm.user_state;  in radeon_dpm_thermal_work_handler()
829 		if (rdev->pm.dpm.thermal.high_to_low)  in radeon_dpm_thermal_work_handler()
831 			dpm_state = rdev->pm.dpm.user_state;  in radeon_dpm_thermal_work_handler()
833 	mutex_lock(&rdev->pm.mutex);  in radeon_dpm_thermal_work_handler()
835 		rdev->pm.dpm.thermal_active = true;  in radeon_dpm_thermal_work_handler()
837 		rdev->pm.dpm.thermal_active = false;  in radeon_dpm_thermal_work_handler()
838 	rdev->pm.dpm.state = dpm_state;  in radeon_dpm_thermal_work_handler()
839 	mutex_unlock(&rdev->pm.mutex);  in radeon_dpm_thermal_work_handler()
846 	bool single_display = (rdev->pm.dpm.new_active_crtc_count < 2) ?  in radeon_dpm_single_display()
883 	for (i = 0; i < rdev->pm.dpm.num_ps; i++) {  in radeon_dpm_pick_power_state()
884 		ps = &rdev->pm.dpm.ps[i];  in radeon_dpm_pick_power_state()
917 			if (rdev->pm.dpm.uvd_ps)  in radeon_dpm_pick_power_state()
918 				return rdev->pm.dpm.uvd_ps;  in radeon_dpm_pick_power_state()
938 			return rdev->pm.dpm.boot_ps;  in radeon_dpm_pick_power_state()
967 		if (rdev->pm.dpm.uvd_ps) {  in radeon_dpm_pick_power_state()
968 			return rdev->pm.dpm.uvd_ps;  in radeon_dpm_pick_power_state()
1000 	if (!rdev->pm.dpm_enabled)  in radeon_dpm_change_power_state_locked()
1003 	if (rdev->pm.dpm.user_state != rdev->pm.dpm.state) {  in radeon_dpm_change_power_state_locked()
1005 		if ((!rdev->pm.dpm.thermal_active) &&  in radeon_dpm_change_power_state_locked()
1006 		    (!rdev->pm.dpm.uvd_active))  in radeon_dpm_change_power_state_locked()
1007 			rdev->pm.dpm.state = rdev->pm.dpm.user_state;  in radeon_dpm_change_power_state_locked()
1009 	dpm_state = rdev->pm.dpm.state;  in radeon_dpm_change_power_state_locked()
1013 		rdev->pm.dpm.requested_ps = ps;  in radeon_dpm_change_power_state_locked()
1018 	if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) {  in radeon_dpm_change_power_state_locked()
1020 		if (ps->vce_active != rdev->pm.dpm.vce_active)  in radeon_dpm_change_power_state_locked()
1023 		if (rdev->pm.dpm.single_display != single_display)  in radeon_dpm_change_power_state_locked()
1029 			if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) {  in radeon_dpm_change_power_state_locked()
1034 				rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;  in radeon_dpm_change_power_state_locked()
1035 				rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;  in radeon_dpm_change_power_state_locked()
1043 			if (rdev->pm.dpm.new_active_crtcs ==  in radeon_dpm_change_power_state_locked()
1044 			    rdev->pm.dpm.current_active_crtcs) {  in radeon_dpm_change_power_state_locked()
1047 				if ((rdev->pm.dpm.current_active_crtc_count > 1) &&  in radeon_dpm_change_power_state_locked()
1048 				    (rdev->pm.dpm.new_active_crtc_count > 1)) {  in radeon_dpm_change_power_state_locked()
1053 					rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;  in radeon_dpm_change_power_state_locked()
1054 					rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;  in radeon_dpm_change_power_state_locked()
1064 		radeon_dpm_print_power_state(rdev, rdev->pm.dpm.current_ps);  in radeon_dpm_change_power_state_locked()
1066 		radeon_dpm_print_power_state(rdev, rdev->pm.dpm.requested_ps);  in radeon_dpm_change_power_state_locked()
1070 	down_write(&rdev->pm.mclk_lock);  in radeon_dpm_change_power_state_locked()
1074 	ps->vce_active = rdev->pm.dpm.vce_active;  in radeon_dpm_change_power_state_locked()
1096 	rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps;  in radeon_dpm_change_power_state_locked()
1100 	rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;  in radeon_dpm_change_power_state_locked()
1101 	rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;  in radeon_dpm_change_power_state_locked()
1102 	rdev->pm.dpm.single_display = single_display;  in radeon_dpm_change_power_state_locked()
1105 		if (rdev->pm.dpm.thermal_active) {  in radeon_dpm_change_power_state_locked()
1106 			enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level;  in radeon_dpm_change_power_state_locked()
1110 			rdev->pm.dpm.forced_level = level;  in radeon_dpm_change_power_state_locked()
1113 			radeon_dpm_force_performance_level(rdev, rdev->pm.dpm.forced_level);  in radeon_dpm_change_power_state_locked()
1119 	up_write(&rdev->pm.mclk_lock);  in radeon_dpm_change_power_state_locked()
1128 		mutex_lock(&rdev->pm.mutex);  in radeon_dpm_enable_uvd()
1131 		enable |= rdev->pm.dpm.sd > 0;  in radeon_dpm_enable_uvd()
1132 		enable |= rdev->pm.dpm.hd > 0;  in radeon_dpm_enable_uvd()
1135 		mutex_unlock(&rdev->pm.mutex);  in radeon_dpm_enable_uvd()
1138 			mutex_lock(&rdev->pm.mutex);  in radeon_dpm_enable_uvd()
1139 			rdev->pm.dpm.uvd_active = true;  in radeon_dpm_enable_uvd()
1142 			if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0))  in radeon_dpm_enable_uvd()
1144 			else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0))  in radeon_dpm_enable_uvd()
1146 			else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 1))  in radeon_dpm_enable_uvd()
1148 			else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2))  in radeon_dpm_enable_uvd()
1153 			rdev->pm.dpm.state = dpm_state;  in radeon_dpm_enable_uvd()
1154 			mutex_unlock(&rdev->pm.mutex);  in radeon_dpm_enable_uvd()
1156 			mutex_lock(&rdev->pm.mutex);  in radeon_dpm_enable_uvd()
1157 			rdev->pm.dpm.uvd_active = false;  in radeon_dpm_enable_uvd()
1158 			mutex_unlock(&rdev->pm.mutex);  in radeon_dpm_enable_uvd()
1168 		mutex_lock(&rdev->pm.mutex);  in radeon_dpm_enable_vce()
1169 		rdev->pm.dpm.vce_active = true;  in radeon_dpm_enable_vce()
1171 		rdev->pm.dpm.vce_level = RADEON_VCE_LEVEL_AC_ALL;  in radeon_dpm_enable_vce()
1172 		mutex_unlock(&rdev->pm.mutex);  in radeon_dpm_enable_vce()
1174 		mutex_lock(&rdev->pm.mutex);  in radeon_dpm_enable_vce()
1175 		rdev->pm.dpm.vce_active = false;  in radeon_dpm_enable_vce()
1176 		mutex_unlock(&rdev->pm.mutex);  in radeon_dpm_enable_vce()
1184 	mutex_lock(&rdev->pm.mutex);  in radeon_pm_suspend_old()
1185 	if (rdev->pm.pm_method == PM_METHOD_DYNPM) {  in radeon_pm_suspend_old()
1186 		if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE)  in radeon_pm_suspend_old()
1187 			rdev->pm.dynpm_state = DYNPM_STATE_SUSPENDED;  in radeon_pm_suspend_old()
1189 	mutex_unlock(&rdev->pm.mutex);  in radeon_pm_suspend_old()
1191 	cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work);  in radeon_pm_suspend_old()
1196 	mutex_lock(&rdev->pm.mutex);  in radeon_pm_suspend_dpm()
1200 	rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps;  in radeon_pm_suspend_dpm()
1201 	rdev->pm.dpm_enabled = false;  in radeon_pm_suspend_dpm()
1202 	mutex_unlock(&rdev->pm.mutex);  in radeon_pm_suspend_dpm()
1207 	if (rdev->pm.pm_method == PM_METHOD_DPM)  in radeon_pm_suspend()
1219 		if (rdev->pm.default_vddc)  in radeon_pm_resume_old()
1220 			radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,  in radeon_pm_resume_old()
1222 		if (rdev->pm.default_vddci)  in radeon_pm_resume_old()
1223 			radeon_atom_set_voltage(rdev, rdev->pm.default_vddci,  in radeon_pm_resume_old()
1225 		if (rdev->pm.default_sclk)  in radeon_pm_resume_old()
1226 			radeon_set_engine_clock(rdev, rdev->pm.default_sclk);  in radeon_pm_resume_old()
1227 		if (rdev->pm.default_mclk)  in radeon_pm_resume_old()
1228 			radeon_set_memory_clock(rdev, rdev->pm.default_mclk);  in radeon_pm_resume_old()
1231 	mutex_lock(&rdev->pm.mutex);  in radeon_pm_resume_old()
1232 	rdev->pm.current_power_state_index = rdev->pm.default_power_state_index;  in radeon_pm_resume_old()
1233 	rdev->pm.current_clock_mode_index = 0;  in radeon_pm_resume_old()
1234 	rdev->pm.current_sclk = rdev->pm.default_sclk;  in radeon_pm_resume_old()
1235 	rdev->pm.current_mclk = rdev->pm.default_mclk;  in radeon_pm_resume_old()
1236 	if (rdev->pm.power_state) {  in radeon_pm_resume_old()
1237 …rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vol…  in radeon_pm_resume_old()
1238 …rdev->pm.current_vddci = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vo…  in radeon_pm_resume_old()
1240 	if (rdev->pm.pm_method == PM_METHOD_DYNPM  in radeon_pm_resume_old()
1241 	    && rdev->pm.dynpm_state == DYNPM_STATE_SUSPENDED) {  in radeon_pm_resume_old()
1242 		rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE;  in radeon_pm_resume_old()
1243 		schedule_delayed_work(&rdev->pm.dynpm_idle_work,  in radeon_pm_resume_old()
1246 	mutex_unlock(&rdev->pm.mutex);  in radeon_pm_resume_old()
1255 	mutex_lock(&rdev->pm.mutex);  in radeon_pm_resume_dpm()
1256 	rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps;  in radeon_pm_resume_dpm()
1259 	mutex_unlock(&rdev->pm.mutex);  in radeon_pm_resume_dpm()
1262 	rdev->pm.dpm_enabled = true;  in radeon_pm_resume_dpm()
1270 		if (rdev->pm.default_vddc)  in radeon_pm_resume_dpm()
1271 			radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,  in radeon_pm_resume_dpm()
1273 		if (rdev->pm.default_vddci)  in radeon_pm_resume_dpm()
1274 			radeon_atom_set_voltage(rdev, rdev->pm.default_vddci,  in radeon_pm_resume_dpm()
1276 		if (rdev->pm.default_sclk)  in radeon_pm_resume_dpm()
1277 			radeon_set_engine_clock(rdev, rdev->pm.default_sclk);  in radeon_pm_resume_dpm()
1278 		if (rdev->pm.default_mclk)  in radeon_pm_resume_dpm()
1279 			radeon_set_memory_clock(rdev, rdev->pm.default_mclk);  in radeon_pm_resume_dpm()
1285 	if (rdev->pm.pm_method == PM_METHOD_DPM)  in radeon_pm_resume()
1295 	rdev->pm.profile = PM_PROFILE_DEFAULT;  in radeon_pm_init_old()
1296 	rdev->pm.dynpm_state = DYNPM_STATE_DISABLED;  in radeon_pm_init_old()
1297 	rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;  in radeon_pm_init_old()
1298 	rdev->pm.dynpm_can_upclock = true;  in radeon_pm_init_old()
1299 	rdev->pm.dynpm_can_downclock = true;  in radeon_pm_init_old()
1300 	rdev->pm.default_sclk = rdev->clock.default_sclk;  in radeon_pm_init_old()
1301 	rdev->pm.default_mclk = rdev->clock.default_mclk;  in radeon_pm_init_old()
1302 	rdev->pm.current_sclk = rdev->clock.default_sclk;  in radeon_pm_init_old()
1303 	rdev->pm.current_mclk = rdev->clock.default_mclk;  in radeon_pm_init_old()
1304 	rdev->pm.int_thermal_type = THERMAL_TYPE_NONE;  in radeon_pm_init_old()
1317 			if (rdev->pm.default_vddc)  in radeon_pm_init_old()
1318 				radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,  in radeon_pm_init_old()
1320 			if (rdev->pm.default_vddci)  in radeon_pm_init_old()
1321 				radeon_atom_set_voltage(rdev, rdev->pm.default_vddci,  in radeon_pm_init_old()
1323 			if (rdev->pm.default_sclk)  in radeon_pm_init_old()
1324 				radeon_set_engine_clock(rdev, rdev->pm.default_sclk);  in radeon_pm_init_old()
1325 			if (rdev->pm.default_mclk)  in radeon_pm_init_old()
1326 				radeon_set_memory_clock(rdev, rdev->pm.default_mclk);  in radeon_pm_init_old()
1335 	INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler);  in radeon_pm_init_old()
1337 	if (rdev->pm.num_power_states > 1) {  in radeon_pm_init_old()
1352 	for (i = 0; i < rdev->pm.dpm.num_ps; i++) {  in radeon_dpm_print_power_states()
1354 		radeon_dpm_print_power_state(rdev, &rdev->pm.dpm.ps[i]);  in radeon_dpm_print_power_states()
1363 	rdev->pm.dpm.state = POWER_STATE_TYPE_BALANCED;  in radeon_pm_init_dpm()
1364 	rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED;  in radeon_pm_init_dpm()
1365 	rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO;  in radeon_pm_init_dpm()
1366 	rdev->pm.default_sclk = rdev->clock.default_sclk;  in radeon_pm_init_dpm()
1367 	rdev->pm.default_mclk = rdev->clock.default_mclk;  in radeon_pm_init_dpm()
1368 	rdev->pm.current_sclk = rdev->clock.default_sclk;  in radeon_pm_init_dpm()
1369 	rdev->pm.current_mclk = rdev->clock.default_mclk;  in radeon_pm_init_dpm()
1370 	rdev->pm.int_thermal_type = THERMAL_TYPE_NONE;  in radeon_pm_init_dpm()
1382 	INIT_WORK(&rdev->pm.dpm.thermal.work, radeon_dpm_thermal_work_handler);  in radeon_pm_init_dpm()
1383 	mutex_lock(&rdev->pm.mutex);  in radeon_pm_init_dpm()
1385 	rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps;  in radeon_pm_init_dpm()
1390 	mutex_unlock(&rdev->pm.mutex);  in radeon_pm_init_dpm()
1393 	rdev->pm.dpm_enabled = true;  in radeon_pm_init_dpm()
1404 	rdev->pm.dpm_enabled = false;  in radeon_pm_init_dpm()
1408 		if (rdev->pm.default_vddc)  in radeon_pm_init_dpm()
1409 			radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,  in radeon_pm_init_dpm()
1411 		if (rdev->pm.default_vddci)  in radeon_pm_init_dpm()
1412 			radeon_atom_set_voltage(rdev, rdev->pm.default_vddci,  in radeon_pm_init_dpm()
1414 		if (rdev->pm.default_sclk)  in radeon_pm_init_dpm()
1415 			radeon_set_engine_clock(rdev, rdev->pm.default_sclk);  in radeon_pm_init_dpm()
1416 		if (rdev->pm.default_mclk)  in radeon_pm_init_dpm()
1417 			radeon_set_memory_clock(rdev, rdev->pm.default_mclk);  in radeon_pm_init_dpm()
1468 			rdev->pm.pm_method = PM_METHOD_PROFILE;  in radeon_pm_init()
1472 			rdev->pm.pm_method = PM_METHOD_PROFILE;  in radeon_pm_init()
1474 			rdev->pm.pm_method = PM_METHOD_DPM;  in radeon_pm_init()
1476 			rdev->pm.pm_method = PM_METHOD_PROFILE;  in radeon_pm_init()
1506 			rdev->pm.pm_method = PM_METHOD_PROFILE;  in radeon_pm_init()
1510 			rdev->pm.pm_method = PM_METHOD_PROFILE;  in radeon_pm_init()
1512 			rdev->pm.pm_method = PM_METHOD_PROFILE;  in radeon_pm_init()
1514 			rdev->pm.pm_method = PM_METHOD_PROFILE;  in radeon_pm_init()
1516 			rdev->pm.pm_method = PM_METHOD_DPM;  in radeon_pm_init()
1520 		rdev->pm.pm_method = PM_METHOD_PROFILE;  in radeon_pm_init()
1524 	if (rdev->pm.pm_method == PM_METHOD_DPM)  in radeon_pm_init()
1534 	if (rdev->pm.pm_method == PM_METHOD_DPM) {  in radeon_pm_late_init()
1535 		if (rdev->pm.dpm_enabled) {  in radeon_pm_late_init()
1536 			if (!rdev->pm.sysfs_initialized) {  in radeon_pm_late_init()
1551 					rdev->pm.sysfs_initialized = true;  in radeon_pm_late_init()
1554 			mutex_lock(&rdev->pm.mutex);  in radeon_pm_late_init()
1556 			mutex_unlock(&rdev->pm.mutex);  in radeon_pm_late_init()
1558 				rdev->pm.dpm_enabled = false;  in radeon_pm_late_init()
1568 		if ((rdev->pm.num_power_states > 1) &&  in radeon_pm_late_init()
1569 		    (!rdev->pm.sysfs_initialized)) {  in radeon_pm_late_init()
1578 				rdev->pm.sysfs_initialized = true;  in radeon_pm_late_init()
1586 	if (rdev->pm.num_power_states > 1) {  in radeon_pm_fini_old()
1587 		mutex_lock(&rdev->pm.mutex);  in radeon_pm_fini_old()
1588 		if (rdev->pm.pm_method == PM_METHOD_PROFILE) {  in radeon_pm_fini_old()
1589 			rdev->pm.profile = PM_PROFILE_DEFAULT;  in radeon_pm_fini_old()
1592 		} else if (rdev->pm.pm_method == PM_METHOD_DYNPM) {  in radeon_pm_fini_old()
1594 			rdev->pm.dynpm_state = DYNPM_STATE_DISABLED;  in radeon_pm_fini_old()
1595 			rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT;  in radeon_pm_fini_old()
1598 		mutex_unlock(&rdev->pm.mutex);  in radeon_pm_fini_old()
1600 		cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work);  in radeon_pm_fini_old()
1607 	kfree(rdev->pm.power_state);  in radeon_pm_fini_old()
1612 	if (rdev->pm.num_power_states > 1) {  in radeon_pm_fini_dpm()
1613 		mutex_lock(&rdev->pm.mutex);  in radeon_pm_fini_dpm()
1615 		mutex_unlock(&rdev->pm.mutex);  in radeon_pm_fini_dpm()
1626 	kfree(rdev->pm.power_state);  in radeon_pm_fini_dpm()
1631 	if (rdev->pm.pm_method == PM_METHOD_DPM)  in radeon_pm_fini()
1643 	if (rdev->pm.num_power_states < 2)  in radeon_pm_compute_clocks_old()
1646 	mutex_lock(&rdev->pm.mutex);  in radeon_pm_compute_clocks_old()
1648 	rdev->pm.active_crtcs = 0;  in radeon_pm_compute_clocks_old()
1649 	rdev->pm.active_crtc_count = 0;  in radeon_pm_compute_clocks_old()
1655 				rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id);  in radeon_pm_compute_clocks_old()
1656 				rdev->pm.active_crtc_count++;  in radeon_pm_compute_clocks_old()
1661 	if (rdev->pm.pm_method == PM_METHOD_PROFILE) {  in radeon_pm_compute_clocks_old()
1664 	} else if (rdev->pm.pm_method == PM_METHOD_DYNPM) {  in radeon_pm_compute_clocks_old()
1665 		if (rdev->pm.dynpm_state != DYNPM_STATE_DISABLED) {  in radeon_pm_compute_clocks_old()
1666 			if (rdev->pm.active_crtc_count > 1) {  in radeon_pm_compute_clocks_old()
1667 				if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) {  in radeon_pm_compute_clocks_old()
1668 					cancel_delayed_work(&rdev->pm.dynpm_idle_work);  in radeon_pm_compute_clocks_old()
1670 					rdev->pm.dynpm_state = DYNPM_STATE_PAUSED;  in radeon_pm_compute_clocks_old()
1671 					rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT;  in radeon_pm_compute_clocks_old()
1677 			} else if (rdev->pm.active_crtc_count == 1) {  in radeon_pm_compute_clocks_old()
1680 				if (rdev->pm.dynpm_state == DYNPM_STATE_MINIMUM) {  in radeon_pm_compute_clocks_old()
1681 					rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE;  in radeon_pm_compute_clocks_old()
1682 					rdev->pm.dynpm_planned_action = DYNPM_ACTION_UPCLOCK;  in radeon_pm_compute_clocks_old()
1686 					schedule_delayed_work(&rdev->pm.dynpm_idle_work,  in radeon_pm_compute_clocks_old()
1688 				} else if (rdev->pm.dynpm_state == DYNPM_STATE_PAUSED) {  in radeon_pm_compute_clocks_old()
1689 					rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE;  in radeon_pm_compute_clocks_old()
1690 					schedule_delayed_work(&rdev->pm.dynpm_idle_work,  in radeon_pm_compute_clocks_old()
1695 				if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) {  in radeon_pm_compute_clocks_old()
1696 					cancel_delayed_work(&rdev->pm.dynpm_idle_work);  in radeon_pm_compute_clocks_old()
1698 					rdev->pm.dynpm_state = DYNPM_STATE_MINIMUM;  in radeon_pm_compute_clocks_old()
1699 					rdev->pm.dynpm_planned_action = DYNPM_ACTION_MINIMUM;  in radeon_pm_compute_clocks_old()
1707 	mutex_unlock(&rdev->pm.mutex);  in radeon_pm_compute_clocks_old()
1716 	if (!rdev->pm.dpm_enabled)  in radeon_pm_compute_clocks_dpm()
1719 	mutex_lock(&rdev->pm.mutex);  in radeon_pm_compute_clocks_dpm()
1722 	rdev->pm.dpm.new_active_crtcs = 0;  in radeon_pm_compute_clocks_dpm()
1723 	rdev->pm.dpm.new_active_crtc_count = 0;  in radeon_pm_compute_clocks_dpm()
1729 				rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id);  in radeon_pm_compute_clocks_dpm()
1730 				rdev->pm.dpm.new_active_crtc_count++;  in radeon_pm_compute_clocks_dpm()
1737 		rdev->pm.dpm.ac_power = true;  in radeon_pm_compute_clocks_dpm()
1739 		rdev->pm.dpm.ac_power = false;  in radeon_pm_compute_clocks_dpm()
1743 	mutex_unlock(&rdev->pm.mutex);  in radeon_pm_compute_clocks_dpm()
1749 	if (rdev->pm.pm_method == PM_METHOD_DPM)  in radeon_pm_compute_clocks()
1764 		if (rdev->pm.active_crtcs & (1 << crtc)) {  in radeon_pm_in_vbl()
1791 				pm.dynpm_idle_work.work);  in radeon_dynpm_idle_work_handler()
1794 	mutex_lock(&rdev->pm.mutex);  in radeon_dynpm_idle_work_handler()
1795 	if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) {  in radeon_dynpm_idle_work_handler()
1810 			if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_DOWNCLOCK) {  in radeon_dynpm_idle_work_handler()
1811 				rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;  in radeon_dynpm_idle_work_handler()
1812 			} else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE &&  in radeon_dynpm_idle_work_handler()
1813 				   rdev->pm.dynpm_can_upclock) {  in radeon_dynpm_idle_work_handler()
1814 				rdev->pm.dynpm_planned_action =  in radeon_dynpm_idle_work_handler()
1816 				rdev->pm.dynpm_action_timeout = jiffies +  in radeon_dynpm_idle_work_handler()
1820 			if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_UPCLOCK) {  in radeon_dynpm_idle_work_handler()
1821 				rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;  in radeon_dynpm_idle_work_handler()
1822 			} else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE &&  in radeon_dynpm_idle_work_handler()
1823 				   rdev->pm.dynpm_can_downclock) {  in radeon_dynpm_idle_work_handler()
1824 				rdev->pm.dynpm_planned_action =  in radeon_dynpm_idle_work_handler()
1826 				rdev->pm.dynpm_action_timeout = jiffies +  in radeon_dynpm_idle_work_handler()
1834 		if (rdev->pm.dynpm_planned_action != DYNPM_ACTION_NONE &&  in radeon_dynpm_idle_work_handler()
1835 		    jiffies > rdev->pm.dynpm_action_timeout) {  in radeon_dynpm_idle_work_handler()
1840 		schedule_delayed_work(&rdev->pm.dynpm_idle_work,  in radeon_dynpm_idle_work_handler()
1843 	mutex_unlock(&rdev->pm.mutex);  in radeon_dynpm_idle_work_handler()
1862 	} else if (rdev->pm.dpm_enabled) {  in radeon_debugfs_pm_info()
1863 		mutex_lock(&rdev->pm.mutex);  in radeon_debugfs_pm_info()
1868 		mutex_unlock(&rdev->pm.mutex);  in radeon_debugfs_pm_info()
1870 		seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk);  in radeon_debugfs_pm_info()
1873 			seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk);  in radeon_debugfs_pm_info()
1876 		seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk);  in radeon_debugfs_pm_info()
1877 		if (rdev->asic->pm.get_memory_clock)  in radeon_debugfs_pm_info()
1879 		if (rdev->pm.current_vddc)  in radeon_debugfs_pm_info()
1880 			seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc);  in radeon_debugfs_pm_info()
1881 		if (rdev->asic->pm.get_pcie_lanes)  in radeon_debugfs_pm_info()