Lines Matching refs:tv

393 	WREG32(RADEON_TV_UV_ADR, tv_dac->tv.tv_uv_adr);  in radeon_restore_tv_timing_tables()
394 h_table = radeon_get_htiming_tables_addr(tv_dac->tv.tv_uv_adr); in radeon_restore_tv_timing_tables()
395 v_table = radeon_get_vtiming_tables_addr(tv_dac->tv.tv_uv_adr); in radeon_restore_tv_timing_tables()
398 tmp = ((uint32_t)tv_dac->tv.h_code_timing[i] << 14) | ((uint32_t)tv_dac->tv.h_code_timing[i+1]); in radeon_restore_tv_timing_tables()
400 if (tv_dac->tv.h_code_timing[i] == 0 || tv_dac->tv.h_code_timing[i + 1] == 0) in radeon_restore_tv_timing_tables()
404 tmp = ((uint32_t)tv_dac->tv.v_code_timing[i+1] << 14) | ((uint32_t)tv_dac->tv.v_code_timing[i]); in radeon_restore_tv_timing_tables()
406 if (tv_dac->tv.v_code_timing[i] == 0 || tv_dac->tv.v_code_timing[i + 1] == 0) in radeon_restore_tv_timing_tables()
416 WREG32(RADEON_TV_FRESTART, tv_dac->tv.frestart); in radeon_legacy_write_tv_restarts()
417 WREG32(RADEON_TV_HRESTART, tv_dac->tv.hrestart); in radeon_legacy_write_tv_restarts()
418 WREG32(RADEON_TV_VRESTART, tv_dac->tv.vrestart); in radeon_legacy_write_tv_restarts()
474 h_changed = (p1 != tv_dac->tv.h_code_timing[H_TABLE_POS1] || in radeon_legacy_tv_init_restarts()
475 p2 != tv_dac->tv.h_code_timing[H_TABLE_POS2]); in radeon_legacy_tv_init_restarts()
477 tv_dac->tv.h_code_timing[H_TABLE_POS1] = p1; in radeon_legacy_tv_init_restarts()
478 tv_dac->tv.h_code_timing[H_TABLE_POS2] = p2; in radeon_legacy_tv_init_restarts()
502 tv_dac->tv.hrestart = restart % h_total; in radeon_legacy_tv_init_restarts()
504 tv_dac->tv.vrestart = restart % v_total; in radeon_legacy_tv_init_restarts()
506 tv_dac->tv.frestart = restart % f_total; in radeon_legacy_tv_init_restarts()
509 (unsigned)tv_dac->tv.frestart, in radeon_legacy_tv_init_restarts()
510 (unsigned)tv_dac->tv.vrestart, in radeon_legacy_tv_init_restarts()
511 (unsigned)tv_dac->tv.hrestart); in radeon_legacy_tv_init_restarts()
523 tv_dac->tv.timing_cntl = (tv_dac->tv.timing_cntl & ~RADEON_H_INC_MASK) | in radeon_legacy_tv_init_restarts()
672 tv_dac->tv.timing_cntl = tmp; in radeon_legacy_tv_mode_set()
725 tv_dac->tv.tv_uv_adr = 0xc8; in radeon_legacy_tv_mode_set()
741 if ((tv_dac->tv.h_code_timing[i] = hor_timing[i]) == 0) in radeon_legacy_tv_mode_set()
746 if ((tv_dac->tv.v_code_timing[i] = vert_timing[i]) == 0) in radeon_legacy_tv_mode_set()
816 WREG32(RADEON_TV_TIMING_CNTL, tv_dac->tv.timing_cntl); in radeon_legacy_tv_mode_set()