309 	spin_lock_irqsave(&rdev->ddev->event_lock, flags);  in radeon_crtc_handle_vblank()
315 		spin_unlock_irqrestore(&rdev->ddev->event_lock, flags);  in radeon_crtc_handle_vblank()
325 	    (DRM_SCANOUTPOS_VALID & radeon_get_crtc_scanoutpos(rdev->ddev, crtc_id, 0,  in radeon_crtc_handle_vblank()
337 	spin_unlock_irqrestore(&rdev->ddev->event_lock, flags);  in radeon_crtc_handle_vblank()
360 	spin_lock_irqsave(&rdev->ddev->event_lock, flags);  in radeon_crtc_handle_flip()
367 		spin_unlock_irqrestore(&rdev->ddev->event_lock, flags);  in radeon_crtc_handle_flip()
377 		drm_send_vblank_event(rdev->ddev, crtc_id, work->event);  in radeon_crtc_handle_flip()
379 	spin_unlock_irqrestore(&rdev->ddev->event_lock, flags);  in radeon_crtc_handle_flip()
381 	drm_vblank_put(rdev->ddev, radeon_crtc->crtc_id);  in radeon_crtc_handle_flip()
1398 			drm_property_create_range(rdev->ddev, 0 , "coherent", 0, 1);  in radeon_modeset_create_props()
1406 			drm_property_create_enum(rdev->ddev, 0,  in radeon_modeset_create_props()
1412 		drm_property_create_range(rdev->ddev, 0, "load detection", 0, 1);  in radeon_modeset_create_props()
1416 	drm_mode_create_scaling_mode_property(rdev->ddev);  in radeon_modeset_create_props()
1420 		drm_property_create_enum(rdev->ddev, 0,  in radeon_modeset_create_props()
1426 		drm_property_create_enum(rdev->ddev, 0,  in radeon_modeset_create_props()
1431 		drm_property_create_range(rdev->ddev, 0,  in radeon_modeset_create_props()
1437 		drm_property_create_range(rdev->ddev, 0,  in radeon_modeset_create_props()
1444 		drm_property_create_enum(rdev->ddev, 0,  in radeon_modeset_create_props()
1450 		drm_property_create_enum(rdev->ddev, 0,  in radeon_modeset_create_props()
1456 		drm_property_create_enum(rdev->ddev, 0,  in radeon_modeset_create_props()
1575 	drm_mode_config_init(rdev->ddev);  in radeon_modeset_init()
1578 	rdev->ddev->mode_config.funcs = &radeon_mode_funcs;  in radeon_modeset_init()
1581 		rdev->ddev->mode_config.max_width = 16384;  in radeon_modeset_init()
1582 		rdev->ddev->mode_config.max_height = 16384;  in radeon_modeset_init()
1584 		rdev->ddev->mode_config.max_width = 8192;  in radeon_modeset_init()
1585 		rdev->ddev->mode_config.max_height = 8192;  in radeon_modeset_init()
1587 		rdev->ddev->mode_config.max_width = 4096;  in radeon_modeset_init()
1588 		rdev->ddev->mode_config.max_height = 4096;  in radeon_modeset_init()
1591 	rdev->ddev->mode_config.preferred_depth = 24;  in radeon_modeset_init()
1592 	rdev->ddev->mode_config.prefer_shadow = 1;  in radeon_modeset_init()
1594 	rdev->ddev->mode_config.fb_base = rdev->mc.aper_base;  in radeon_modeset_init()
1612 		radeon_crtc_init(rdev->ddev, i);  in radeon_modeset_init()
1616 	ret = radeon_setup_enc_conn(rdev->ddev);  in radeon_modeset_init()
1634 	drm_kms_helper_poll_init(rdev->ddev);  in radeon_modeset_init()
1649 		drm_kms_helper_poll_fini(rdev->ddev);  in radeon_modeset_fini()
1651 		drm_mode_config_cleanup(rdev->ddev);  in radeon_modeset_fini()