654 	dev_priv->ring.tail = cur_read_ptr;  in radeon_do_cp_reset()
792 	dev_priv->ring.tail = cur_read_ptr;  in radeon_cp_init_ring_buffer()
812 		     (dev_priv->ring.fetch_size_l2ow << 18) |  in radeon_cp_init_ring_buffer()
813 		     (dev_priv->ring.rptr_update_l2qw << 8) |  in radeon_cp_init_ring_buffer()
814 		     dev_priv->ring.size_l2qw);  in radeon_cp_init_ring_buffer()
817 		     (dev_priv->ring.fetch_size_l2ow << 18) |  in radeon_cp_init_ring_buffer()
818 		     (dev_priv->ring.rptr_update_l2qw << 8) |  in radeon_cp_init_ring_buffer()
819 		     dev_priv->ring.size_l2qw);  in radeon_cp_init_ring_buffer()
1443 	dev_priv->ring.start = (u32 *) dev_priv->cp_ring->handle;  in radeon_do_init_cp()
1444 	dev_priv->ring.end = ((u32 *) dev_priv->cp_ring->handle  in radeon_do_init_cp()
1446 	dev_priv->ring.size = init->ring_size;  in radeon_do_init_cp()
1447 	dev_priv->ring.size_l2qw = order_base_2(init->ring_size / 8);  in radeon_do_init_cp()
1449 	dev_priv->ring.rptr_update = /* init->rptr_update */ 4096;  in radeon_do_init_cp()
1450 	dev_priv->ring.rptr_update_l2qw = order_base_2( /* init->rptr_update */ 4096 / 8);  in radeon_do_init_cp()
1452 	dev_priv->ring.fetch_size = /* init->fetch_size */ 32;  in radeon_do_init_cp()
1453 	dev_priv->ring.fetch_size_l2ow = order_base_2( /* init->fetch_size */ 32 / 16);  in radeon_do_init_cp()
1454 	dev_priv->ring.tail_mask = (dev_priv->ring.size / sizeof(u32)) - 1;  in radeon_do_init_cp()
1456 	dev_priv->ring.high_mark = RADEON_RING_HIGH_MARK;  in radeon_do_init_cp()
1979 	drm_radeon_ring_buffer_t *ring = &dev_priv->ring;  in radeon_wait_ring()  local
1986 		ring->space = (head - ring->tail) * sizeof(u32);  in radeon_wait_ring()
1987 		if (ring->space <= 0)  in radeon_wait_ring()
1988 			ring->space += ring->size;  in radeon_wait_ring()
1989 		if (ring->space > n)  in radeon_wait_ring()
2210 	u32 *ring;  in radeon_commit_ring()  local
2215 	tail_aligned = dev_priv->ring.tail & (RADEON_RING_ALIGN-1);  in radeon_commit_ring()
2219 		ring = dev_priv->ring.start;  in radeon_commit_ring()
2222 			ring[dev_priv->ring.tail + i] = CP_PACKET2();  in radeon_commit_ring()
2224 		dev_priv->ring.tail += i;  in radeon_commit_ring()
2226 		dev_priv->ring.space -= num_p2 * sizeof(u32);  in radeon_commit_ring()
2229 	dev_priv->ring.tail &= dev_priv->ring.tail_mask;  in radeon_commit_ring()
2235 		RADEON_WRITE(R600_CP_RB_WPTR, dev_priv->ring.tail);  in radeon_commit_ring()
2239 		RADEON_WRITE(RADEON_CP_RB_WPTR, dev_priv->ring.tail);  in radeon_commit_ring()