Lines Matching refs:rdev

241 bool radeon_get_bios(struct radeon_device *rdev);
251 int radeon_dummy_page_init(struct radeon_device *rdev);
252 void radeon_dummy_page_fini(struct radeon_device *rdev);
277 int radeon_pm_init(struct radeon_device *rdev);
278 int radeon_pm_late_init(struct radeon_device *rdev);
279 void radeon_pm_fini(struct radeon_device *rdev);
280 void radeon_pm_compute_clocks(struct radeon_device *rdev);
281 void radeon_pm_suspend(struct radeon_device *rdev);
282 void radeon_pm_resume(struct radeon_device *rdev);
283 void radeon_combios_get_power_modes(struct radeon_device *rdev);
284 void radeon_atombios_get_power_modes(struct radeon_device *rdev);
285 int radeon_atom_get_clock_dividers(struct radeon_device *rdev,
290 int radeon_atom_get_memory_pll_dividers(struct radeon_device *rdev,
294 void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type);
295 int radeon_atom_get_voltage_gpio_settings(struct radeon_device *rdev,
298 void radeon_atom_set_engine_dram_timings(struct radeon_device *rdev,
300 int radeon_atom_get_voltage_step(struct radeon_device *rdev,
302 int radeon_atom_get_max_vddc(struct radeon_device *rdev, u8 voltage_type,
304 int radeon_atom_get_leakage_vddc_based_on_leakage_idx(struct radeon_device *rdev,
307 int radeon_atom_get_leakage_id_from_vbios(struct radeon_device *rdev,
309 int radeon_atom_get_leakage_vddc_based_on_leakage_params(struct radeon_device *rdev,
313 int radeon_atom_get_voltage_evv(struct radeon_device *rdev,
316 int radeon_atom_round_to_true_voltage(struct radeon_device *rdev,
320 int radeon_atom_get_min_voltage(struct radeon_device *rdev,
322 int radeon_atom_get_max_voltage(struct radeon_device *rdev,
324 int radeon_atom_get_voltage_table(struct radeon_device *rdev,
327 bool radeon_atom_is_voltage_gpio(struct radeon_device *rdev,
329 int radeon_atom_get_svi2_info(struct radeon_device *rdev,
332 void radeon_atom_update_memory_dll(struct radeon_device *rdev,
334 void radeon_atom_set_ac_timing(struct radeon_device *rdev,
336 int radeon_atom_init_mc_reg_table(struct radeon_device *rdev,
339 int radeon_atom_get_memory_info(struct radeon_device *rdev,
341 int radeon_atom_get_mclk_range_table(struct radeon_device *rdev,
344 int radeon_atom_get_max_vddc(struct radeon_device *rdev, u8 voltage_type,
346 void rs690_pm_info(struct radeon_device *rdev);
355 struct radeon_device *rdev; member
369 struct radeon_device *rdev; member
378 int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring);
379 int radeon_fence_driver_init(struct radeon_device *rdev);
380 void radeon_fence_driver_fini(struct radeon_device *rdev);
381 void radeon_fence_driver_force_completion(struct radeon_device *rdev, int ring);
382 int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence **fence, int ring);
383 void radeon_fence_process(struct radeon_device *rdev, int ring);
386 int radeon_fence_wait_next(struct radeon_device *rdev, int ring);
387 int radeon_fence_wait_empty(struct radeon_device *rdev, int ring);
388 int radeon_fence_wait_any(struct radeon_device *rdev,
393 unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring);
504 struct radeon_device *rdev; member
515 int radeon_gem_debugfs_init(struct radeon_device *rdev);
573 int radeon_gem_init(struct radeon_device *rdev);
574 void radeon_gem_fini(struct radeon_device *rdev);
575 int radeon_gem_object_create(struct radeon_device *rdev, unsigned long size,
596 int radeon_semaphore_create(struct radeon_device *rdev,
598 bool radeon_semaphore_emit_signal(struct radeon_device *rdev, int ring,
600 bool radeon_semaphore_emit_wait(struct radeon_device *rdev, int ring,
602 void radeon_semaphore_free(struct radeon_device *rdev,
618 int radeon_sync_resv(struct radeon_device *rdev,
622 int radeon_sync_rings(struct radeon_device *rdev,
625 void radeon_sync_free(struct radeon_device *rdev, struct radeon_sync *sync,
656 int radeon_gart_table_ram_alloc(struct radeon_device *rdev);
657 void radeon_gart_table_ram_free(struct radeon_device *rdev);
658 int radeon_gart_table_vram_alloc(struct radeon_device *rdev);
659 void radeon_gart_table_vram_free(struct radeon_device *rdev);
660 int radeon_gart_table_vram_pin(struct radeon_device *rdev);
661 void radeon_gart_table_vram_unpin(struct radeon_device *rdev);
662 int radeon_gart_init(struct radeon_device *rdev);
663 void radeon_gart_fini(struct radeon_device *rdev);
664 void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
666 int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
696 bool radeon_combios_sideport_present(struct radeon_device *rdev);
697 bool radeon_atombios_sideport_present(struct radeon_device *rdev);
709 int radeon_scratch_get(struct radeon_device *rdev, uint32_t *reg);
710 void radeon_scratch_free(struct radeon_device *rdev, uint32_t reg);
726 int radeon_doorbell_get(struct radeon_device *rdev, u32 *page);
727 void radeon_doorbell_free(struct radeon_device *rdev, u32 doorbell);
728 void radeon_doorbell_get_kfd_info(struct radeon_device *rdev,
740 struct radeon_device *rdev; member
820 int radeon_irq_kms_init(struct radeon_device *rdev);
821 void radeon_irq_kms_fini(struct radeon_device *rdev);
822 void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring);
823 bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring);
824 void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring);
825 void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc);
826 void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc);
827 void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block);
828 void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block);
829 void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask);
830 void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask);
1017 int radeon_ib_get(struct radeon_device *rdev, int ring,
1020 void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib);
1021 int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib,
1023 int radeon_ib_pool_init(struct radeon_device *rdev);
1024 void radeon_ib_pool_fini(struct radeon_device *rdev);
1025 int radeon_ib_ring_tests(struct radeon_device *rdev);
1027 bool radeon_ring_supports_scratch_reg(struct radeon_device *rdev,
1029 void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *cp);
1030 int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ndw);
1031 int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ndw);
1032 void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *cp,
1034 void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *cp,
1037 void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *cp);
1038 int radeon_ring_test(struct radeon_device *rdev, struct radeon_ring *cp);
1039 void radeon_ring_lockup_update(struct radeon_device *rdev,
1041 bool radeon_ring_test_lockup(struct radeon_device *rdev, struct radeon_ring *ring);
1042 unsigned radeon_ring_backup(struct radeon_device *rdev, struct radeon_ring *ring,
1044 int radeon_ring_restore(struct radeon_device *rdev, struct radeon_ring *ring,
1046 int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ring_size,
1048 void radeon_ring_fini(struct radeon_device *rdev, struct radeon_ring *cp);
1052 void r600_dma_stop(struct radeon_device *rdev);
1053 int r600_dma_resume(struct radeon_device *rdev);
1054 void r600_dma_fini(struct radeon_device *rdev);
1056 void cayman_dma_stop(struct radeon_device *rdev);
1057 int cayman_dma_resume(struct radeon_device *rdev);
1058 void cayman_dma_fini(struct radeon_device *rdev);
1071 struct radeon_device *rdev; member
1130 int radeon_agp_init(struct radeon_device *rdev);
1131 void radeon_agp_resume(struct radeon_device *rdev);
1132 void radeon_agp_suspend(struct radeon_device *rdev);
1133 void radeon_agp_fini(struct radeon_device *rdev);
1597 void radeon_dpm_enable_uvd(struct radeon_device *rdev, bool enable);
1598 void radeon_dpm_enable_vce(struct radeon_device *rdev, bool enable);
1664 int radeon_pm_get_type_index(struct radeon_device *rdev,
1684 int radeon_uvd_init(struct radeon_device *rdev);
1685 void radeon_uvd_fini(struct radeon_device *rdev);
1686 int radeon_uvd_suspend(struct radeon_device *rdev);
1687 int radeon_uvd_resume(struct radeon_device *rdev);
1688 int radeon_uvd_get_create_msg(struct radeon_device *rdev, int ring,
1690 int radeon_uvd_get_destroy_msg(struct radeon_device *rdev, int ring,
1694 void radeon_uvd_free_handles(struct radeon_device *rdev,
1697 void radeon_uvd_note_usage(struct radeon_device *rdev);
1698 int radeon_uvd_calc_upll_dividers(struct radeon_device *rdev,
1707 int radeon_uvd_send_upll_ctlreq(struct radeon_device *rdev,
1728 int radeon_vce_init(struct radeon_device *rdev);
1729 void radeon_vce_fini(struct radeon_device *rdev);
1730 int radeon_vce_suspend(struct radeon_device *rdev);
1731 int radeon_vce_resume(struct radeon_device *rdev);
1732 int radeon_vce_get_create_msg(struct radeon_device *rdev, int ring,
1734 int radeon_vce_get_destroy_msg(struct radeon_device *rdev, int ring,
1736 void radeon_vce_free_handles(struct radeon_device *rdev, struct drm_file *filp);
1737 void radeon_vce_note_usage(struct radeon_device *rdev);
1740 bool radeon_vce_semaphore_emit(struct radeon_device *rdev,
1744 void radeon_vce_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
1745 void radeon_vce_fence_emit(struct radeon_device *rdev,
1747 int radeon_vce_ring_test(struct radeon_device *rdev, struct radeon_ring *ring);
1748 int radeon_vce_ib_test(struct radeon_device *rdev, struct radeon_ring *ring);
1773 void radeon_benchmark(struct radeon_device *rdev, int test_number);
1779 void radeon_test_moves(struct radeon_device *rdev);
1780 void radeon_test_ring_sync(struct radeon_device *rdev,
1783 void radeon_test_syncing(struct radeon_device *rdev);
1807 int radeon_debugfs_add_files(struct radeon_device *rdev,
1810 int radeon_debugfs_fence_init(struct radeon_device *rdev);
1817 u32 (*get_rptr)(struct radeon_device *rdev, struct radeon_ring *ring);
1818 u32 (*get_wptr)(struct radeon_device *rdev, struct radeon_ring *ring);
1819 void (*set_wptr)(struct radeon_device *rdev, struct radeon_ring *ring);
1822 int (*ib_parse)(struct radeon_device *rdev, struct radeon_ib *ib);
1826 void (*ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib);
1827 void (*emit_fence)(struct radeon_device *rdev, struct radeon_fence *fence);
1828 void (*hdp_flush)(struct radeon_device *rdev, struct radeon_ring *ring);
1829 bool (*emit_semaphore)(struct radeon_device *rdev, struct radeon_ring *cp,
1831 void (*vm_flush)(struct radeon_device *rdev, struct radeon_ring *ring,
1835 int (*ring_test)(struct radeon_device *rdev, struct radeon_ring *cp);
1836 int (*ib_test)(struct radeon_device *rdev, struct radeon_ring *cp);
1837 bool (*is_lockup)(struct radeon_device *rdev, struct radeon_ring *cp);
1840 void (*ring_start)(struct radeon_device *rdev, struct radeon_ring *cp);
1847 int (*init)(struct radeon_device *rdev);
1848 void (*fini)(struct radeon_device *rdev);
1849 int (*resume)(struct radeon_device *rdev);
1850 int (*suspend)(struct radeon_device *rdev);
1851 void (*vga_set_state)(struct radeon_device *rdev, bool state);
1852 int (*asic_reset)(struct radeon_device *rdev);
1854 void (*mmio_hdp_flush)(struct radeon_device *rdev);
1856 bool (*gui_idle)(struct radeon_device *rdev);
1858 int (*mc_wait_for_idle)(struct radeon_device *rdev);
1860 u32 (*get_xclk)(struct radeon_device *rdev);
1862 uint64_t (*get_gpu_clock_counter)(struct radeon_device *rdev);
1864 int (*get_allowed_info_register)(struct radeon_device *rdev, u32 reg, u32 *val);
1867 void (*tlb_flush)(struct radeon_device *rdev);
1869 void (*set_page)(struct radeon_device *rdev, unsigned i,
1873 int (*init)(struct radeon_device *rdev);
1874 void (*fini)(struct radeon_device *rdev);
1875 void (*copy_pages)(struct radeon_device *rdev,
1879 void (*write_pages)(struct radeon_device *rdev,
1884 void (*set_pages)(struct radeon_device *rdev,
1895 int (*set)(struct radeon_device *rdev);
1896 int (*process)(struct radeon_device *rdev);
1901 void (*bandwidth_update)(struct radeon_device *rdev);
1903 u32 (*get_vblank_counter)(struct radeon_device *rdev, int crtc);
1905 void (*wait_for_vblank)(struct radeon_device *rdev, int crtc);
1916 struct radeon_fence *(*blit)(struct radeon_device *rdev,
1922 struct radeon_fence *(*dma)(struct radeon_device *rdev,
1929 struct radeon_fence *(*copy)(struct radeon_device *rdev,
1939 int (*set_reg)(struct radeon_device *rdev, int reg,
1942 void (*clear_reg)(struct radeon_device *rdev, int reg);
1946 void (*init)(struct radeon_device *rdev);
1947 void (*fini)(struct radeon_device *rdev);
1948 bool (*sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
1949 void (*set_polarity)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
1953 void (*misc)(struct radeon_device *rdev);
1954 void (*prepare)(struct radeon_device *rdev);
1955 void (*finish)(struct radeon_device *rdev);
1956 void (*init_profile)(struct radeon_device *rdev);
1957 void (*get_dynpm_state)(struct radeon_device *rdev);
1958 uint32_t (*get_engine_clock)(struct radeon_device *rdev);
1959 void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock);
1960 uint32_t (*get_memory_clock)(struct radeon_device *rdev);
1961 void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock);
1962 int (*get_pcie_lanes)(struct radeon_device *rdev);
1963 void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes);
1964 void (*set_clock_gating)(struct radeon_device *rdev, int enable);
1965 int (*set_uvd_clocks)(struct radeon_device *rdev, u32 vclk, u32 dclk);
1966 int (*set_vce_clocks)(struct radeon_device *rdev, u32 evclk, u32 ecclk);
1967 int (*get_temperature)(struct radeon_device *rdev);
1971 int (*init)(struct radeon_device *rdev);
1972 void (*setup_asic)(struct radeon_device *rdev);
1973 int (*enable)(struct radeon_device *rdev);
1974 int (*late_enable)(struct radeon_device *rdev);
1975 void (*disable)(struct radeon_device *rdev);
1976 int (*pre_set_power_state)(struct radeon_device *rdev);
1977 int (*set_power_state)(struct radeon_device *rdev);
1978 void (*post_set_power_state)(struct radeon_device *rdev);
1979 void (*display_configuration_changed)(struct radeon_device *rdev);
1980 void (*fini)(struct radeon_device *rdev);
1981 u32 (*get_sclk)(struct radeon_device *rdev, bool low);
1982 u32 (*get_mclk)(struct radeon_device *rdev, bool low);
1983 void (*print_power_state)(struct radeon_device *rdev, struct radeon_ps *ps);
1984 void (*debugfs_print_current_performance_level)(struct radeon_device *rdev, struct seq_file *m);
1985 int (*force_performance_level)(struct radeon_device *rdev, enum radeon_dpm_forced_level level);
1986 bool (*vblank_too_short)(struct radeon_device *rdev);
1987 void (*powergate_uvd)(struct radeon_device *rdev, bool gate);
1988 void (*enable_bapm)(struct radeon_device *rdev, bool enable);
1989 void (*fan_ctrl_set_mode)(struct radeon_device *rdev, u32 mode);
1990 u32 (*fan_ctrl_get_mode)(struct radeon_device *rdev);
1991 int (*set_fan_speed_percent)(struct radeon_device *rdev, u32 speed);
1992 int (*get_fan_speed_percent)(struct radeon_device *rdev, u32 *speed);
1993 u32 (*get_current_sclk)(struct radeon_device *rdev);
1994 u32 (*get_current_mclk)(struct radeon_device *rdev);
1998 void (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base);
1999 bool (*page_flip_pending)(struct radeon_device *rdev, int crtc);
2210 void radeon_agp_disable(struct radeon_device *rdev);
2211 int radeon_asic_init(struct radeon_device *rdev);
2468 int radeon_device_init(struct radeon_device *rdev,
2472 void radeon_device_fini(struct radeon_device *rdev);
2473 int radeon_gpu_wait_for_idle(struct radeon_device *rdev);
2477 static inline uint32_t r100_mm_rreg(struct radeon_device *rdev, uint32_t reg, in r100_mm_rreg() argument
2481 if ((reg < rdev->rmmio_size || reg < RADEON_MIN_MMIO_SIZE) && !always_indirect) in r100_mm_rreg()
2482 return readl(((void __iomem *)rdev->rmmio) + reg); in r100_mm_rreg()
2487 spin_lock_irqsave(&rdev->mmio_idx_lock, flags); in r100_mm_rreg()
2488 writel(reg, ((void __iomem *)rdev->rmmio) + RADEON_MM_INDEX); in r100_mm_rreg()
2489 ret = readl(((void __iomem *)rdev->rmmio) + RADEON_MM_DATA); in r100_mm_rreg()
2490 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags); in r100_mm_rreg()
2496 static inline void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v, in r100_mm_wreg() argument
2499 if ((reg < rdev->rmmio_size || reg < RADEON_MIN_MMIO_SIZE) && !always_indirect) in r100_mm_wreg()
2500 writel(v, ((void __iomem *)rdev->rmmio) + reg); in r100_mm_wreg()
2504 spin_lock_irqsave(&rdev->mmio_idx_lock, flags); in r100_mm_wreg()
2505 writel(reg, ((void __iomem *)rdev->rmmio) + RADEON_MM_INDEX); in r100_mm_wreg()
2506 writel(v, ((void __iomem *)rdev->rmmio) + RADEON_MM_DATA); in r100_mm_wreg()
2507 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags); in r100_mm_wreg()
2511 u32 r100_io_rreg(struct radeon_device *rdev, u32 reg);
2512 void r100_io_wreg(struct radeon_device *rdev, u32 reg, u32 v);
2514 u32 cik_mm_rdoorbell(struct radeon_device *rdev, u32 index);
2515 void cik_mm_wdoorbell(struct radeon_device *rdev, u32 index, u32 v);
2535 #define RREG8(reg) readb((rdev->rmmio) + (reg))
2536 #define WREG8(reg, v) writeb(v, (rdev->rmmio) + (reg))
2537 #define RREG16(reg) readw((rdev->rmmio) + (reg))
2538 #define WREG16(reg, v) writew(v, (rdev->rmmio) + (reg))
2539 #define RREG32(reg) r100_mm_rreg(rdev, (reg), false)
2540 #define RREG32_IDX(reg) r100_mm_rreg(rdev, (reg), true)
2541 #define DREG32(reg) printk(KERN_INFO "REGISTER: " #reg " : 0x%08X\n", r100_mm_rreg(rdev, (reg), fal…
2542 #define WREG32(reg, v) r100_mm_wreg(rdev, (reg), (v), false)
2543 #define WREG32_IDX(reg, v) r100_mm_wreg(rdev, (reg), (v), true)
2546 #define RREG32_PLL(reg) rdev->pll_rreg(rdev, (reg))
2547 #define WREG32_PLL(reg, v) rdev->pll_wreg(rdev, (reg), (v))
2548 #define RREG32_MC(reg) rdev->mc_rreg(rdev, (reg))
2549 #define WREG32_MC(reg, v) rdev->mc_wreg(rdev, (reg), (v))
2550 #define RREG32_PCIE(reg) rv370_pcie_rreg(rdev, (reg))
2551 #define WREG32_PCIE(reg, v) rv370_pcie_wreg(rdev, (reg), (v))
2552 #define RREG32_PCIE_PORT(reg) rdev->pciep_rreg(rdev, (reg))
2553 #define WREG32_PCIE_PORT(reg, v) rdev->pciep_wreg(rdev, (reg), (v))
2554 #define RREG32_SMC(reg) tn_smc_rreg(rdev, (reg))
2555 #define WREG32_SMC(reg, v) tn_smc_wreg(rdev, (reg), (v))
2556 #define RREG32_RCU(reg) r600_rcu_rreg(rdev, (reg))
2557 #define WREG32_RCU(reg, v) r600_rcu_wreg(rdev, (reg), (v))
2558 #define RREG32_CG(reg) eg_cg_rreg(rdev, (reg))
2559 #define WREG32_CG(reg, v) eg_cg_wreg(rdev, (reg), (v))
2560 #define RREG32_PIF_PHY0(reg) eg_pif_phy0_rreg(rdev, (reg))
2561 #define WREG32_PIF_PHY0(reg, v) eg_pif_phy0_wreg(rdev, (reg), (v))
2562 #define RREG32_PIF_PHY1(reg) eg_pif_phy1_rreg(rdev, (reg))
2563 #define WREG32_PIF_PHY1(reg, v) eg_pif_phy1_wreg(rdev, (reg), (v))
2564 #define RREG32_UVD_CTX(reg) r600_uvd_ctx_rreg(rdev, (reg))
2565 #define WREG32_UVD_CTX(reg, v) r600_uvd_ctx_wreg(rdev, (reg), (v))
2566 #define RREG32_DIDT(reg) cik_didt_rreg(rdev, (reg))
2567 #define WREG32_DIDT(reg, v) cik_didt_wreg(rdev, (reg), (v))
2584 #define DREG32_SYS(sqf, rdev, reg) seq_printf((sqf), #reg " : 0x%08X\n", r100_mm_rreg((rdev), (reg)… argument
2585 #define RREG32_IO(reg) r100_io_rreg(rdev, (reg))
2586 #define WREG32_IO(reg, v) r100_io_wreg(rdev, (reg), (v))
2588 #define RDOORBELL32(index) cik_mm_rdoorbell(rdev, (index))
2589 #define WDOORBELL32(index, v) cik_mm_wdoorbell(rdev, (index), (v))
2594 static inline uint32_t rv370_pcie_rreg(struct radeon_device *rdev, uint32_t reg) in rv370_pcie_rreg() argument
2599 spin_lock_irqsave(&rdev->pcie_idx_lock, flags); in rv370_pcie_rreg()
2600 WREG32(RADEON_PCIE_INDEX, ((reg) & rdev->pcie_reg_mask)); in rv370_pcie_rreg()
2602 spin_unlock_irqrestore(&rdev->pcie_idx_lock, flags); in rv370_pcie_rreg()
2606 static inline void rv370_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) in rv370_pcie_wreg() argument
2610 spin_lock_irqsave(&rdev->pcie_idx_lock, flags); in rv370_pcie_wreg()
2611 WREG32(RADEON_PCIE_INDEX, ((reg) & rdev->pcie_reg_mask)); in rv370_pcie_wreg()
2613 spin_unlock_irqrestore(&rdev->pcie_idx_lock, flags); in rv370_pcie_wreg()
2616 static inline u32 tn_smc_rreg(struct radeon_device *rdev, u32 reg) in tn_smc_rreg() argument
2621 spin_lock_irqsave(&rdev->smc_idx_lock, flags); in tn_smc_rreg()
2624 spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); in tn_smc_rreg()
2628 static inline void tn_smc_wreg(struct radeon_device *rdev, u32 reg, u32 v) in tn_smc_wreg() argument
2632 spin_lock_irqsave(&rdev->smc_idx_lock, flags); in tn_smc_wreg()
2635 spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); in tn_smc_wreg()
2638 static inline u32 r600_rcu_rreg(struct radeon_device *rdev, u32 reg) in r600_rcu_rreg() argument
2643 spin_lock_irqsave(&rdev->rcu_idx_lock, flags); in r600_rcu_rreg()
2646 spin_unlock_irqrestore(&rdev->rcu_idx_lock, flags); in r600_rcu_rreg()
2650 static inline void r600_rcu_wreg(struct radeon_device *rdev, u32 reg, u32 v) in r600_rcu_wreg() argument
2654 spin_lock_irqsave(&rdev->rcu_idx_lock, flags); in r600_rcu_wreg()
2657 spin_unlock_irqrestore(&rdev->rcu_idx_lock, flags); in r600_rcu_wreg()
2660 static inline u32 eg_cg_rreg(struct radeon_device *rdev, u32 reg) in eg_cg_rreg() argument
2665 spin_lock_irqsave(&rdev->cg_idx_lock, flags); in eg_cg_rreg()
2668 spin_unlock_irqrestore(&rdev->cg_idx_lock, flags); in eg_cg_rreg()
2672 static inline void eg_cg_wreg(struct radeon_device *rdev, u32 reg, u32 v) in eg_cg_wreg() argument
2676 spin_lock_irqsave(&rdev->cg_idx_lock, flags); in eg_cg_wreg()
2679 spin_unlock_irqrestore(&rdev->cg_idx_lock, flags); in eg_cg_wreg()
2682 static inline u32 eg_pif_phy0_rreg(struct radeon_device *rdev, u32 reg) in eg_pif_phy0_rreg() argument
2687 spin_lock_irqsave(&rdev->pif_idx_lock, flags); in eg_pif_phy0_rreg()
2690 spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); in eg_pif_phy0_rreg()
2694 static inline void eg_pif_phy0_wreg(struct radeon_device *rdev, u32 reg, u32 v) in eg_pif_phy0_wreg() argument
2698 spin_lock_irqsave(&rdev->pif_idx_lock, flags); in eg_pif_phy0_wreg()
2701 spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); in eg_pif_phy0_wreg()
2704 static inline u32 eg_pif_phy1_rreg(struct radeon_device *rdev, u32 reg) in eg_pif_phy1_rreg() argument
2709 spin_lock_irqsave(&rdev->pif_idx_lock, flags); in eg_pif_phy1_rreg()
2712 spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); in eg_pif_phy1_rreg()
2716 static inline void eg_pif_phy1_wreg(struct radeon_device *rdev, u32 reg, u32 v) in eg_pif_phy1_wreg() argument
2720 spin_lock_irqsave(&rdev->pif_idx_lock, flags); in eg_pif_phy1_wreg()
2723 spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); in eg_pif_phy1_wreg()
2726 static inline u32 r600_uvd_ctx_rreg(struct radeon_device *rdev, u32 reg) in r600_uvd_ctx_rreg() argument
2731 spin_lock_irqsave(&rdev->uvd_idx_lock, flags); in r600_uvd_ctx_rreg()
2734 spin_unlock_irqrestore(&rdev->uvd_idx_lock, flags); in r600_uvd_ctx_rreg()
2738 static inline void r600_uvd_ctx_wreg(struct radeon_device *rdev, u32 reg, u32 v) in r600_uvd_ctx_wreg() argument
2742 spin_lock_irqsave(&rdev->uvd_idx_lock, flags); in r600_uvd_ctx_wreg()
2745 spin_unlock_irqrestore(&rdev->uvd_idx_lock, flags); in r600_uvd_ctx_wreg()
2749 static inline u32 cik_didt_rreg(struct radeon_device *rdev, u32 reg) in cik_didt_rreg() argument
2754 spin_lock_irqsave(&rdev->didt_idx_lock, flags); in cik_didt_rreg()
2757 spin_unlock_irqrestore(&rdev->didt_idx_lock, flags); in cik_didt_rreg()
2761 static inline void cik_didt_wreg(struct radeon_device *rdev, u32 reg, u32 v) in cik_didt_wreg() argument
2765 spin_lock_irqsave(&rdev->didt_idx_lock, flags); in cik_didt_wreg()
2768 spin_unlock_irqrestore(&rdev->didt_idx_lock, flags); in cik_didt_wreg()
2771 void r100_pll_errata_after_index(struct radeon_device *rdev);
2777 #define ASIC_IS_RN50(rdev) ((rdev->pdev->device == 0x515e) || \ argument
2778 (rdev->pdev->device == 0x5969))
2779 #define ASIC_IS_RV100(rdev) ((rdev->family == CHIP_RV100) || \ argument
2780 (rdev->family == CHIP_RV200) || \
2781 (rdev->family == CHIP_RS100) || \
2782 (rdev->family == CHIP_RS200) || \
2783 (rdev->family == CHIP_RV250) || \
2784 (rdev->family == CHIP_RV280) || \
2785 (rdev->family == CHIP_RS300))
2786 #define ASIC_IS_R300(rdev) ((rdev->family == CHIP_R300) || \ argument
2787 (rdev->family == CHIP_RV350) || \
2788 (rdev->family == CHIP_R350) || \
2789 (rdev->family == CHIP_RV380) || \
2790 (rdev->family == CHIP_R420) || \
2791 (rdev->family == CHIP_R423) || \
2792 (rdev->family == CHIP_RV410) || \
2793 (rdev->family == CHIP_RS400) || \
2794 (rdev->family == CHIP_RS480))
2795 #define ASIC_IS_X2(rdev) ((rdev->ddev->pdev->device == 0x9441) || \ argument
2796 (rdev->ddev->pdev->device == 0x9443) || \
2797 (rdev->ddev->pdev->device == 0x944B) || \
2798 (rdev->ddev->pdev->device == 0x9506) || \
2799 (rdev->ddev->pdev->device == 0x9509) || \
2800 (rdev->ddev->pdev->device == 0x950F) || \
2801 (rdev->ddev->pdev->device == 0x689C) || \
2802 (rdev->ddev->pdev->device == 0x689D))
2803 #define ASIC_IS_AVIVO(rdev) ((rdev->family >= CHIP_RS600)) argument
2804 #define ASIC_IS_DCE2(rdev) ((rdev->family == CHIP_RS600) || \ argument
2805 (rdev->family == CHIP_RS690) || \
2806 (rdev->family == CHIP_RS740) || \
2807 (rdev->family >= CHIP_R600))
2808 #define ASIC_IS_DCE3(rdev) ((rdev->family >= CHIP_RV620)) argument
2809 #define ASIC_IS_DCE32(rdev) ((rdev->family >= CHIP_RV730)) argument
2810 #define ASIC_IS_DCE4(rdev) ((rdev->family >= CHIP_CEDAR)) argument
2811 #define ASIC_IS_DCE41(rdev) ((rdev->family >= CHIP_PALM) && \ argument
2812 (rdev->flags & RADEON_IS_IGP))
2813 #define ASIC_IS_DCE5(rdev) ((rdev->family >= CHIP_BARTS)) argument
2814 #define ASIC_IS_DCE6(rdev) ((rdev->family >= CHIP_ARUBA)) argument
2815 #define ASIC_IS_DCE61(rdev) ((rdev->family >= CHIP_ARUBA) && \ argument
2816 (rdev->flags & RADEON_IS_IGP))
2817 #define ASIC_IS_DCE64(rdev) ((rdev->family == CHIP_OLAND)) argument
2818 #define ASIC_IS_NODCE(rdev) ((rdev->family == CHIP_HAINAN)) argument
2819 #define ASIC_IS_DCE8(rdev) ((rdev->family >= CHIP_BONAIRE)) argument
2820 #define ASIC_IS_DCE81(rdev) ((rdev->family == CHIP_KAVERI)) argument
2821 #define ASIC_IS_DCE82(rdev) ((rdev->family == CHIP_BONAIRE)) argument
2822 #define ASIC_IS_DCE83(rdev) ((rdev->family == CHIP_KABINI) || \ argument
2823 (rdev->family == CHIP_MULLINS))
2825 #define ASIC_IS_LOMBOK(rdev) ((rdev->ddev->pdev->device == 0x6849) || \ argument
2826 (rdev->ddev->pdev->device == 0x6850) || \
2827 (rdev->ddev->pdev->device == 0x6858) || \
2828 (rdev->ddev->pdev->device == 0x6859) || \
2829 (rdev->ddev->pdev->device == 0x6840) || \
2830 (rdev->ddev->pdev->device == 0x6841) || \
2831 (rdev->ddev->pdev->device == 0x6842) || \
2832 (rdev->ddev->pdev->device == 0x6843))
2837 #define RBIOS8(i) (rdev->bios[i])
2841 int radeon_combios_init(struct radeon_device *rdev);
2842 void radeon_combios_fini(struct radeon_device *rdev);
2843 int radeon_atombios_init(struct radeon_device *rdev);
2844 void radeon_atombios_fini(struct radeon_device *rdev);
2873 #define radeon_init(rdev) (rdev)->asic->init((rdev)) argument
2874 #define radeon_fini(rdev) (rdev)->asic->fini((rdev)) argument
2875 #define radeon_resume(rdev) (rdev)->asic->resume((rdev)) argument
2876 #define radeon_suspend(rdev) (rdev)->asic->suspend((rdev)) argument
2877 #define radeon_cs_parse(rdev, r, p) (rdev)->asic->ring[(r)]->cs_parse((p)) argument
2878 #define radeon_vga_set_state(rdev, state) (rdev)->asic->vga_set_state((rdev), (state)) argument
2879 #define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev)) argument
2880 #define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart.tlb_flush((rdev)) argument
2881 #define radeon_gart_get_page_entry(a, f) (rdev)->asic->gart.get_page_entry((a), (f))
2882 #define radeon_gart_set_page(rdev, i, e) (rdev)->asic->gart.set_page((rdev), (i), (e)) argument
2883 #define radeon_asic_vm_init(rdev) (rdev)->asic->vm.init((rdev)) argument
2884 #define radeon_asic_vm_fini(rdev) (rdev)->asic->vm.fini((rdev)) argument
2885 #define radeon_asic_vm_copy_pages(rdev, ib, pe, src, count) ((rdev)->asic->vm.copy_pages((rdev), (i… argument
2886 #define radeon_asic_vm_write_pages(rdev, ib, pe, addr, count, incr, flags) ((rdev)->asic->vm.write_… argument
2887 #define radeon_asic_vm_set_pages(rdev, ib, pe, addr, count, incr, flags) ((rdev)->asic->vm.set_page… argument
2888 #define radeon_asic_vm_pad_ib(rdev, ib) ((rdev)->asic->vm.pad_ib((ib))) argument
2889 #define radeon_ring_start(rdev, r, cp) (rdev)->asic->ring[(r)]->ring_start((rdev), (cp)) argument
2890 #define radeon_ring_test(rdev, r, cp) (rdev)->asic->ring[(r)]->ring_test((rdev), (cp)) argument
2891 #define radeon_ib_test(rdev, r, cp) (rdev)->asic->ring[(r)]->ib_test((rdev), (cp)) argument
2892 #define radeon_ring_ib_execute(rdev, r, ib) (rdev)->asic->ring[(r)]->ib_execute((rdev), (ib)) argument
2893 #define radeon_ring_ib_parse(rdev, r, ib) (rdev)->asic->ring[(r)]->ib_parse((rdev), (ib)) argument
2894 #define radeon_ring_is_lockup(rdev, r, cp) (rdev)->asic->ring[(r)]->is_lockup((rdev), (cp)) argument
2895 #define radeon_ring_vm_flush(rdev, r, vm_id, pd_addr) (rdev)->asic->ring[(r)->idx]->vm_flush((rdev)… argument
2896 #define radeon_ring_get_rptr(rdev, r) (rdev)->asic->ring[(r)->idx]->get_rptr((rdev), (r)) argument
2897 #define radeon_ring_get_wptr(rdev, r) (rdev)->asic->ring[(r)->idx]->get_wptr((rdev), (r)) argument
2898 #define radeon_ring_set_wptr(rdev, r) (rdev)->asic->ring[(r)->idx]->set_wptr((rdev), (r)) argument
2899 #define radeon_irq_set(rdev) (rdev)->asic->irq.set((rdev)) argument
2900 #define radeon_irq_process(rdev) (rdev)->asic->irq.process((rdev)) argument
2901 #define radeon_get_vblank_counter(rdev, crtc) (rdev)->asic->display.get_vblank_counter((rdev), (crt… argument
2902 #define radeon_set_backlight_level(rdev, e, l) (rdev)->asic->display.set_backlight_level((e), (l)) argument
2903 #define radeon_get_backlight_level(rdev, e) (rdev)->asic->display.get_backlight_level((e)) argument
2904 #define radeon_hdmi_enable(rdev, e, b) (rdev)->asic->display.hdmi_enable((e), (b)) argument
2905 #define radeon_hdmi_setmode(rdev, e, m) (rdev)->asic->display.hdmi_setmode((e), (m)) argument
2906 #define radeon_fence_ring_emit(rdev, r, fence) (rdev)->asic->ring[(r)]->emit_fence((rdev), (fence)) argument
2907 #define radeon_semaphore_ring_emit(rdev, r, cp, semaphore, emit_wait) (rdev)->asic->ring[(r)]->emit… argument
2908 #define radeon_copy_blit(rdev, s, d, np, resv) (rdev)->asic->copy.blit((rdev), (s), (d), (np), (res… argument
2909 #define radeon_copy_dma(rdev, s, d, np, resv) (rdev)->asic->copy.dma((rdev), (s), (d), (np), (resv)) argument
2910 #define radeon_copy(rdev, s, d, np, resv) (rdev)->asic->copy.copy((rdev), (s), (d), (np), (resv)) argument
2911 #define radeon_copy_blit_ring_index(rdev) (rdev)->asic->copy.blit_ring_index argument
2912 #define radeon_copy_dma_ring_index(rdev) (rdev)->asic->copy.dma_ring_index argument
2913 #define radeon_copy_ring_index(rdev) (rdev)->asic->copy.copy_ring_index argument
2914 #define radeon_get_engine_clock(rdev) (rdev)->asic->pm.get_engine_clock((rdev)) argument
2915 #define radeon_set_engine_clock(rdev, e) (rdev)->asic->pm.set_engine_clock((rdev), (e)) argument
2916 #define radeon_get_memory_clock(rdev) (rdev)->asic->pm.get_memory_clock((rdev)) argument
2917 #define radeon_set_memory_clock(rdev, e) (rdev)->asic->pm.set_memory_clock((rdev), (e)) argument
2918 #define radeon_get_pcie_lanes(rdev) (rdev)->asic->pm.get_pcie_lanes((rdev)) argument
2919 #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->pm.set_pcie_lanes((rdev), (l)) argument
2920 #define radeon_set_clock_gating(rdev, e) (rdev)->asic->pm.set_clock_gating((rdev), (e)) argument
2921 #define radeon_set_uvd_clocks(rdev, v, d) (rdev)->asic->pm.set_uvd_clocks((rdev), (v), (d)) argument
2922 #define radeon_set_vce_clocks(rdev, ev, ec) (rdev)->asic->pm.set_vce_clocks((rdev), (ev), (ec)) argument
2923 #define radeon_get_temperature(rdev) (rdev)->asic->pm.get_temperature((rdev)) argument
2924 #define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->surface.set_reg((rdev), (r), (f)… argument
2925 #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->surface.clear_reg((rdev), (r))) argument
2926 #define radeon_bandwidth_update(rdev) (rdev)->asic->display.bandwidth_update((rdev)) argument
2927 #define radeon_hpd_init(rdev) (rdev)->asic->hpd.init((rdev)) argument
2928 #define radeon_hpd_fini(rdev) (rdev)->asic->hpd.fini((rdev)) argument
2929 #define radeon_hpd_sense(rdev, h) (rdev)->asic->hpd.sense((rdev), (h)) argument
2930 #define radeon_hpd_set_polarity(rdev, h) (rdev)->asic->hpd.set_polarity((rdev), (h)) argument
2931 #define radeon_gui_idle(rdev) (rdev)->asic->gui_idle((rdev)) argument
2932 #define radeon_pm_misc(rdev) (rdev)->asic->pm.misc((rdev)) argument
2933 #define radeon_pm_prepare(rdev) (rdev)->asic->pm.prepare((rdev)) argument
2934 #define radeon_pm_finish(rdev) (rdev)->asic->pm.finish((rdev)) argument
2935 #define radeon_pm_init_profile(rdev) (rdev)->asic->pm.init_profile((rdev)) argument
2936 #define radeon_pm_get_dynpm_state(rdev) (rdev)->asic->pm.get_dynpm_state((rdev)) argument
2937 #define radeon_page_flip(rdev, crtc, base) (rdev)->asic->pflip.page_flip((rdev), (crtc), (base)) argument
2938 #define radeon_page_flip_pending(rdev, crtc) (rdev)->asic->pflip.page_flip_pending((rdev), (crtc)) argument
2939 #define radeon_wait_for_vblank(rdev, crtc) (rdev)->asic->display.wait_for_vblank((rdev), (crtc)) argument
2940 #define radeon_mc_wait_for_idle(rdev) (rdev)->asic->mc_wait_for_idle((rdev)) argument
2941 #define radeon_get_xclk(rdev) (rdev)->asic->get_xclk((rdev)) argument
2942 #define radeon_get_gpu_clock_counter(rdev) (rdev)->asic->get_gpu_clock_counter((rdev)) argument
2943 #define radeon_get_allowed_info_register(rdev, r, v) (rdev)->asic->get_allowed_info_register((rdev)… argument
2944 #define radeon_dpm_init(rdev) rdev->asic->dpm.init((rdev)) argument
2945 #define radeon_dpm_setup_asic(rdev) rdev->asic->dpm.setup_asic((rdev)) argument
2946 #define radeon_dpm_enable(rdev) rdev->asic->dpm.enable((rdev)) argument
2947 #define radeon_dpm_late_enable(rdev) rdev->asic->dpm.late_enable((rdev)) argument
2948 #define radeon_dpm_disable(rdev) rdev->asic->dpm.disable((rdev)) argument
2949 #define radeon_dpm_pre_set_power_state(rdev) rdev->asic->dpm.pre_set_power_state((rdev)) argument
2950 #define radeon_dpm_set_power_state(rdev) rdev->asic->dpm.set_power_state((rdev)) argument
2951 #define radeon_dpm_post_set_power_state(rdev) rdev->asic->dpm.post_set_power_state((rdev)) argument
2952 …define radeon_dpm_display_configuration_changed(rdev) rdev->asic->dpm.display_configuration_change… argument
2953 #define radeon_dpm_fini(rdev) rdev->asic->dpm.fini((rdev)) argument
2954 #define radeon_dpm_get_sclk(rdev, l) rdev->asic->dpm.get_sclk((rdev), (l)) argument
2955 #define radeon_dpm_get_mclk(rdev, l) rdev->asic->dpm.get_mclk((rdev), (l)) argument
2956 #define radeon_dpm_print_power_state(rdev, ps) rdev->asic->dpm.print_power_state((rdev), (ps)) argument
2957 …_debugfs_print_current_performance_level(rdev, m) rdev->asic->dpm.debugfs_print_current_performanc… argument
2958 #define radeon_dpm_force_performance_level(rdev, l) rdev->asic->dpm.force_performance_level((rdev),… argument
2959 #define radeon_dpm_vblank_too_short(rdev) rdev->asic->dpm.vblank_too_short((rdev)) argument
2960 #define radeon_dpm_powergate_uvd(rdev, g) rdev->asic->dpm.powergate_uvd((rdev), (g)) argument
2961 #define radeon_dpm_enable_bapm(rdev, e) rdev->asic->dpm.enable_bapm((rdev), (e)) argument
2962 #define radeon_dpm_get_current_sclk(rdev) rdev->asic->dpm.get_current_sclk((rdev)) argument
2963 #define radeon_dpm_get_current_mclk(rdev) rdev->asic->dpm.get_current_mclk((rdev)) argument
2967 extern int radeon_gpu_reset(struct radeon_device *rdev);
2968 extern void radeon_pci_config_reset(struct radeon_device *rdev);
2969 extern void r600_set_bios_scratch_engine_hung(struct radeon_device *rdev, bool hung);
2970 extern void radeon_agp_disable(struct radeon_device *rdev);
2971 extern int radeon_modeset_init(struct radeon_device *rdev);
2972 extern void radeon_modeset_fini(struct radeon_device *rdev);
2973 extern bool radeon_card_posted(struct radeon_device *rdev);
2974 extern void radeon_update_bandwidth_info(struct radeon_device *rdev);
2975 extern void radeon_update_display_priority(struct radeon_device *rdev);
2976 extern bool radeon_boot_test_post_card(struct radeon_device *rdev);
2977 extern void radeon_scratch_init(struct radeon_device *rdev);
2978 extern void radeon_wb_fini(struct radeon_device *rdev);
2979 extern int radeon_wb_init(struct radeon_device *rdev);
2980 extern void radeon_wb_disable(struct radeon_device *rdev);
2981 extern void radeon_surface_init(struct radeon_device *rdev);
2983 extern void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable);
2984 extern void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable);
2991 extern void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc *mc, u64 base);
2992 extern void radeon_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc);
2995 extern void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size);
2996 extern void radeon_program_register_sequence(struct radeon_device *rdev,
3003 int radeon_vm_manager_init(struct radeon_device *rdev);
3004 void radeon_vm_manager_fini(struct radeon_device *rdev);
3005 int radeon_vm_init(struct radeon_device *rdev, struct radeon_vm *vm);
3006 void radeon_vm_fini(struct radeon_device *rdev, struct radeon_vm *vm);
3007 struct radeon_bo_list *radeon_vm_get_bos(struct radeon_device *rdev,
3010 struct radeon_fence *radeon_vm_grab_id(struct radeon_device *rdev,
3012 void radeon_vm_flush(struct radeon_device *rdev,
3015 void radeon_vm_fence(struct radeon_device *rdev,
3018 uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr);
3019 int radeon_vm_update_page_directory(struct radeon_device *rdev,
3021 int radeon_vm_clear_freed(struct radeon_device *rdev,
3023 int radeon_vm_clear_invalids(struct radeon_device *rdev,
3025 int radeon_vm_bo_update(struct radeon_device *rdev,
3028 void radeon_vm_bo_invalidate(struct radeon_device *rdev,
3032 struct radeon_bo_va *radeon_vm_bo_add(struct radeon_device *rdev,
3035 int radeon_vm_bo_set_addr(struct radeon_device *rdev,
3039 void radeon_vm_bo_rmv(struct radeon_device *rdev,
3044 struct r600_audio_pin *r600_audio_get_pin(struct radeon_device *rdev);
3045 struct r600_audio_pin *dce6_audio_get_pin(struct radeon_device *rdev);
3046 void r600_audio_enable(struct radeon_device *rdev,
3049 void dce6_audio_enable(struct radeon_device *rdev,
3056 int r600_vram_scratch_init(struct radeon_device *rdev);
3057 void r600_vram_scratch_fini(struct radeon_device *rdev);
3088 extern u32 r6xx_remap_render_backend(struct radeon_device *rdev,
3098 extern int ni_init_microcode(struct radeon_device *rdev);
3099 extern int ni_mc_load_microcode(struct radeon_device *rdev);
3103 extern int radeon_acpi_init(struct radeon_device *rdev);
3104 extern void radeon_acpi_fini(struct radeon_device *rdev);
3105 extern bool radeon_acpi_is_pcie_performance_request_supported(struct radeon_device *rdev);
3106 extern int radeon_acpi_pcie_performance_request(struct radeon_device *rdev,
3108 extern int radeon_acpi_pcie_notify_device_ready(struct radeon_device *rdev);
3110 static inline int radeon_acpi_init(struct radeon_device *rdev) { return 0; } in radeon_acpi_init() argument
3111 static inline void radeon_acpi_fini(struct radeon_device *rdev) { } in radeon_acpi_fini() argument