Lines Matching refs:WREG32
248 WREG32(CG_RLC_REQ_AND_RSP, 0x2); in r600_gfx_clockgating_enable()
256 WREG32(CG_RLC_REQ_AND_RSP, 0x0); in r600_gfx_clockgating_enable()
258 WREG32(GRBM_PWR_CNTL, 0x1); in r600_gfx_clockgating_enable()
337 WREG32(CG_BSP, BSP(p) | BSU(u)); in r600_set_bsp()
344 WREG32(CG_RT, FLS(l_to_m) | FMS(m_to_h)); in r600_set_at()
345 WREG32(CG_LT, FHS(h_to_m) | FMS(m_to_l)); in r600_set_at()
351 WREG32(CG_FFCT_0 + (index * 4), UTC_0(u_t) | DTC_0(d_t)); in r600_set_tc()
369 WREG32(CG_FTV, vrv); in r600_set_vrc()
521 WREG32(LOWER_GPIO_ENABLE, mask & 0xffffffff); in r600_voltage_control_enable_pins()
522 WREG32(UPPER_GPIO_ENABLE, upper_32_bits(mask)); in r600_voltage_control_enable_pins()
532 WREG32(CTXSW_VID_LOWER_GPIO_CNTL + (ix * 4), pins & 0xffffffff); in r600_voltage_control_program_voltages()
537 WREG32(VID_UPPER_GPIO_CNTL, tmp); in r600_voltage_control_program_voltages()
547 WREG32(GPIOPAD_MASK, gpio); in r600_voltage_control_deactivate_static_control()
551 WREG32(GPIOPAD_EN, gpio); in r600_voltage_control_deactivate_static_control()
555 WREG32(GPIOPAD_A, gpio); in r600_voltage_control_deactivate_static_control()