2680 	rb_bufsz = order_base_2(ring->ring_size / 8);  in r600_cp_resume()
2730 void r600_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size)  in r600_ring_init()  argument
2736 	rb_bufsz = order_base_2(ring_size / 8);  in r600_ring_init()
2737 	ring_size = (1 << (rb_bufsz + 1)) * 4;  in r600_ring_init()
2738 	ring->ring_size = ring_size;  in r600_ring_init()
3035 			rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0;  in r600_startup()
3054 	r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET,  in r600_startup()
3068 		if (ring->ring_size) {  in r600_startup()
3069 			r = radeon_ring_init(rdev, ring, ring->ring_size, 0,  in r600_startup()
3373 void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size)  in r600_ih_ring_init()  argument
3378 	rb_bufsz = order_base_2(ring_size / 4);  in r600_ih_ring_init()
3379 	ring_size = (1 << rb_bufsz) * 4;  in r600_ih_ring_init()
3380 	rdev->ih.ring_size = ring_size;  in r600_ih_ring_init()
3381 	rdev->ih.ptr_mask = rdev->ih.ring_size - 1;  in r600_ih_ring_init()
3391 		r = radeon_bo_create(rdev, rdev->ih.ring_size,  in r600_ih_ring_alloc()
3615 	rb_bufsz = order_base_2(rdev->ih.ring_size / 4);  in r600_irq_init()