1039 	WREG32(SMC_SCRATCH0, parameter);  in ni_send_msg_to_smc_with_parameter()
1539 		WREG32(MC_ARB_DRAM_TIMING, mc_arb_dram_timing);  in ni_copy_and_switch_arb_sets()
1540 		WREG32(MC_ARB_DRAM_TIMING2, mc_arb_dram_timing2);  in ni_copy_and_switch_arb_sets()
1544 		WREG32(MC_ARB_DRAM_TIMING_1, mc_arb_dram_timing);  in ni_copy_and_switch_arb_sets()
1545 		WREG32(MC_ARB_DRAM_TIMING2_1, mc_arb_dram_timing2);  in ni_copy_and_switch_arb_sets()
1549 		WREG32(MC_ARB_DRAM_TIMING_2, mc_arb_dram_timing);  in ni_copy_and_switch_arb_sets()
1550 		WREG32(MC_ARB_DRAM_TIMING2_2, mc_arb_dram_timing2);  in ni_copy_and_switch_arb_sets()
1554 		WREG32(MC_ARB_DRAM_TIMING_3, mc_arb_dram_timing);  in ni_copy_and_switch_arb_sets()
1555 		WREG32(MC_ARB_DRAM_TIMING2_3, mc_arb_dram_timing2);  in ni_copy_and_switch_arb_sets()
1563 	WREG32(MC_CG_CONFIG, mc_cg_config);  in ni_copy_and_switch_arb_sets()
2883 	WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING));  in ni_initialize_mc_reg_table()
2884 	WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING));  in ni_initialize_mc_reg_table()
2885 	WREG32(MC_SEQ_MISC_TIMING_LP, RREG32(MC_SEQ_MISC_TIMING));  in ni_initialize_mc_reg_table()
2886 	WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2));  in ni_initialize_mc_reg_table()
2887 	WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS));  in ni_initialize_mc_reg_table()
2888 	WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS));  in ni_initialize_mc_reg_table()
2889 	WREG32(MC_SEQ_PMG_CMD_MRS1_LP, RREG32(MC_PMG_CMD_MRS1));  in ni_initialize_mc_reg_table()
2890 	WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0));  in ni_initialize_mc_reg_table()
2891 	WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1));  in ni_initialize_mc_reg_table()
2892 	WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0));  in ni_initialize_mc_reg_table()
2893 	WREG32(MC_SEQ_RD_CTL_D1_LP, RREG32(MC_SEQ_RD_CTL_D1));  in ni_initialize_mc_reg_table()
2894 	WREG32(MC_SEQ_PMG_TIMING_LP, RREG32(MC_SEQ_PMG_TIMING));  in ni_initialize_mc_reg_table()
2895 	WREG32(MC_SEQ_PMG_CMD_MRS2_LP, RREG32(MC_PMG_CMD_MRS2));  in ni_initialize_mc_reg_table()
3157 	WREG32(CG_CAC_CTRL, reg);  in ni_initialize_smc_cac_tables()
3360 	WREG32(SQ_CAC_THRESHOLD, reg);  in ni_initialize_hardware_cac_manager()
3367 	WREG32(MC_CG_CONFIG, reg);  in ni_initialize_hardware_cac_manager()
3372 	WREG32(MC_CG_DATAPORT, reg);  in ni_initialize_hardware_cac_manager()
3472 				WREG32(CG_BIF_REQ_AND_RSP, bif);  in ni_enable_bif_dynamic_pcie_gen2()
3487 				WREG32(CG_BIF_REQ_AND_RSP, bif);  in ni_enable_bif_dynamic_pcie_gen2()