Lines Matching refs:robj
1242 track->db_z_read_bo = reloc->robj; in evergreen_cs_check_reg()
1254 track->db_z_write_bo = reloc->robj; in evergreen_cs_check_reg()
1266 track->db_s_read_bo = reloc->robj; in evergreen_cs_check_reg()
1278 track->db_s_write_bo = reloc->robj; in evergreen_cs_check_reg()
1302 track->vgt_strmout_bo[tmp] = reloc->robj; in evergreen_cs_check_reg()
1525 track->cb_color_fmask_bo[tmp] = reloc->robj; in evergreen_cs_check_reg()
1542 track->cb_color_cmask_bo[tmp] = reloc->robj; in evergreen_cs_check_reg()
1583 track->cb_color_bo[tmp] = reloc->robj; in evergreen_cs_check_reg()
1599 track->cb_color_bo[tmp] = reloc->robj; in evergreen_cs_check_reg()
1611 track->htile_bo = reloc->robj; in evergreen_cs_check_reg()
2044 track->indirect_draw_buffer_size = radeon_bo_size(reloc->robj); in evergreen_packet3_check()
2181 if ((tmp + size) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2183 tmp + size, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2219 if ((tmp + size) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2221 tmp + size, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2390 texture = reloc->robj; in evergreen_packet3_check()
2411 mipmap = reloc->robj; in evergreen_packet3_check()
2431 if (p->rdev && (size + offset) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2434 ib[idx+1+(i*8)+1] = radeon_bo_size(reloc->robj) - offset; in evergreen_packet3_check()
2513 if ((offset + 4) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2515 offset + 4, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2532 if ((offset + 4) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2534 offset + 4, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2561 if ((offset + 8) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2563 offset + 8, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2586 if ((offset + 4) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2588 offset + 4, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2610 if ((offset + 4) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2612 offset + 4, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2806 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
2808 dst_offset, radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
2831 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
2833 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
2836 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
2838 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
2871 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
2873 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
2876 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
2878 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
2890 if ((src_offset + count) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
2892 src_offset + count, radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
2895 if ((dst_offset + count) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
2897 dst_offset + count, radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
2934 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
2936 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
2939 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
2941 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
2944 if ((dst2_offset + (count * 4)) > radeon_bo_size(dst2_reloc->robj)) { in evergreen_dma_cs_parse()
2946 dst2_offset + (count * 4), radeon_bo_size(dst2_reloc->robj)); in evergreen_dma_cs_parse()
2974 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
2976 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
2979 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
2981 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
2984 if ((dst2_offset + (count * 4)) > radeon_bo_size(dst2_reloc->robj)) { in evergreen_dma_cs_parse()
2986 dst2_offset + (count * 4), radeon_bo_size(dst2_reloc->robj)); in evergreen_dma_cs_parse()
3036 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
3038 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
3041 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
3043 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
3046 if ((dst2_offset + (count * 4)) > radeon_bo_size(dst2_reloc->robj)) { in evergreen_dma_cs_parse()
3048 dst2_offset + (count * 4), radeon_bo_size(dst2_reloc->robj)); in evergreen_dma_cs_parse()
3082 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
3084 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
3087 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
3089 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
3123 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
3125 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
3128 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
3130 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
3133 if ((dst2_offset + (count * 4)) > radeon_bo_size(dst2_reloc->robj)) { in evergreen_dma_cs_parse()
3135 dst2_offset + (count * 4), radeon_bo_size(dst2_reloc->robj)); in evergreen_dma_cs_parse()
3157 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
3159 dst_offset, radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()