Lines Matching refs:INT_MASK
4510 WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); in evergreen_disable_interrupt_state()
4511 WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); in evergreen_disable_interrupt_state()
4513 WREG32(INT_MASK + EVERGREEN_CRTC2_REGISTER_OFFSET, 0); in evergreen_disable_interrupt_state()
4514 WREG32(INT_MASK + EVERGREEN_CRTC3_REGISTER_OFFSET, 0); in evergreen_disable_interrupt_state()
4517 WREG32(INT_MASK + EVERGREEN_CRTC4_REGISTER_OFFSET, 0); in evergreen_disable_interrupt_state()
4518 WREG32(INT_MASK + EVERGREEN_CRTC5_REGISTER_OFFSET, 0); in evergreen_disable_interrupt_state()
4730 WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, crtc1); in evergreen_irq_set()
4731 WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, crtc2); in evergreen_irq_set()
4733 WREG32(INT_MASK + EVERGREEN_CRTC2_REGISTER_OFFSET, crtc3); in evergreen_irq_set()
4734 WREG32(INT_MASK + EVERGREEN_CRTC3_REGISTER_OFFSET, crtc4); in evergreen_irq_set()
4737 WREG32(INT_MASK + EVERGREEN_CRTC4_REGISTER_OFFSET, crtc5); in evergreen_irq_set()
4738 WREG32(INT_MASK + EVERGREEN_CRTC5_REGISTER_OFFSET, crtc6); in evergreen_irq_set()