1226 	u32 tmp = 0;  in dce4_program_fmt()  local
1347 	u32 tmp = RREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset);  in evergreen_page_flip()  local
1620 	u32 tmp;  in evergreen_pm_prepare()  local
1645 	u32 tmp;  in evergreen_pm_finish()  local
1714 	u32 tmp;  in evergreen_hpd_set_polarity()  local
1784 	u32 tmp = DC_HPDx_CONNECTION_TIMER(0x9c4) |  in evergreen_hpd_init()  local
1877 	u32 tmp, buffer_alloc, i;  in evergreen_line_buffer_adjust()  local
1965 	u32 tmp = RREG32(MC_SHARED_CHMAP);  in evergreen_get_number_of_dram_channels()  local
2221 	u32 tmp, arb_control3;  in evergreen_program_watermarks()  local
2408 	u32 tmp;  in evergreen_mc_wait_for_idle()  local
2426 	u32 tmp;  in evergreen_pcie_gart_tlb_flush()  local
2448 	u32 tmp;  in evergreen_pcie_gart_enable()  local
2506 	u32 tmp;  in evergreen_pcie_gart_disable()  local
2539 	u32 tmp;  in evergreen_agp_enable()  local
2706 	u32 crtc_enabled, tmp, frame_count, blackout;  in evergreen_mc_stop()  local
2804 	u32 tmp, frame_count;  in evergreen_mc_resume()  local
2894 	u32 tmp;  in evergreen_mc_program()  local
3107 	u32 tmp;  in evergreen_cp_resume()  local
3191 	u32 hdp_host_path_cntl, tmp;  in evergreen_gpu_init()  local
3752 	u32 tmp;  in evergreen_mc_init()  local
3841 	u32 i, j, tmp;  in evergreen_is_display_hung()  local
3869 	u32 tmp;  in evergreen_gpu_check_soft_reset()  local
3939 	u32 tmp;  in evergreen_gpu_soft_reset()  local
4052 	u32 tmp, i;  in evergreen_gpu_pci_config_reset()  local
4433 			u32 tmp = (RREG32(CC_GC_SHADER_PIPE_CONFIG) & 0xffff0000) >> 16;  in evergreen_rlc_resume()  local
4495 	u32 tmp;  in evergreen_disable_interrupt_state()  local
4784 	u32 tmp;  in evergreen_irq_ack()  local
4964 	u32 wptr, tmp;  in evergreen_get_ih_wptr()  local