2528 								   pi->dpm_table.sclk_table.dpm_levels[i].value,  in ci_do_program_memory_timing_parameters()
2529 								   pi->dpm_table.mclk_table.dpm_levels[j].value,  in ci_do_program_memory_timing_parameters()
2587 		if (dpm_table->dpm_levels[i-1].enabled)  in ci_get_dpm_level_enable_mask_value()
2605 			(u8)dpm_table->pcie_speed_table.dpm_levels[i].value;  in ci_populate_smc_link_level()
2607 			r600_encode_pci_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1);  in ci_populate_smc_link_level()
3261 						       dpm_table->sclk_table.dpm_levels[i].value,  in ci_populate_all_graphic_levels()
3307 		if (dpm_table->mclk_table.dpm_levels[i].value == 0)  in ci_populate_all_memory_levels()
3310 						      dpm_table->mclk_table.dpm_levels[i].value,  in ci_populate_all_memory_levels()
3352 		dpm_table->dpm_levels[i].enabled = false;  in ci_reset_single_dpm_table()
3358 	dpm_table->dpm_levels[index].value = pcie_gen;  in ci_setup_pcie_table_entry()
3359 	dpm_table->dpm_levels[index].param1 = pcie_lanes;  in ci_setup_pcie_table_entry()
3360 	dpm_table->dpm_levels[index].enabled = true;  in ci_setup_pcie_table_entry()
3452 		    (pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count-1].value !=  in ci_setup_default_dpm_tables()
3454 			pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].value =  in ci_setup_default_dpm_tables()
3456 			pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].enabled =  in ci_setup_default_dpm_tables()
3465 		    (pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count-1].value !=  in ci_setup_default_dpm_tables()
3467 			pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].value =  in ci_setup_default_dpm_tables()
3469 			pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].enabled =  in ci_setup_default_dpm_tables()
3476 		pi->dpm_table.vddc_table.dpm_levels[i].value =  in ci_setup_default_dpm_tables()
3478 		pi->dpm_table.vddc_table.dpm_levels[i].param1 =  in ci_setup_default_dpm_tables()
3480 		pi->dpm_table.vddc_table.dpm_levels[i].enabled = true;  in ci_setup_default_dpm_tables()
3487 			pi->dpm_table.vddci_table.dpm_levels[i].value =  in ci_setup_default_dpm_tables()
3489 			pi->dpm_table.vddci_table.dpm_levels[i].enabled = true;  in ci_setup_default_dpm_tables()
3497 			pi->dpm_table.mvdd_table.dpm_levels[i].value =  in ci_setup_default_dpm_tables()
3499 			pi->dpm_table.mvdd_table.dpm_levels[i].enabled = true;  in ci_setup_default_dpm_tables()
3516 		if (value == table->dpm_levels[i].value) {  in ci_find_boot_level()
3680 		if ((dpm_table->dpm_levels[i].value < low_limit) ||  in ci_trim_single_dpm_states()
3681 		    (dpm_table->dpm_levels[i].value > high_limit))  in ci_trim_single_dpm_states()
3682 			dpm_table->dpm_levels[i].enabled = false;  in ci_trim_single_dpm_states()
3684 			dpm_table->dpm_levels[i].enabled = true;  in ci_trim_single_dpm_states()
3697 		if ((pcie_table->dpm_levels[i].value < speed_low) ||  in ci_trim_pcie_dpm_states()
3698 		    (pcie_table->dpm_levels[i].param1 < lanes_low) ||  in ci_trim_pcie_dpm_states()
3699 		    (pcie_table->dpm_levels[i].value > speed_high) ||  in ci_trim_pcie_dpm_states()
3700 		    (pcie_table->dpm_levels[i].param1 > lanes_high))  in ci_trim_pcie_dpm_states()
3701 			pcie_table->dpm_levels[i].enabled = false;  in ci_trim_pcie_dpm_states()
3703 			pcie_table->dpm_levels[i].enabled = true;  in ci_trim_pcie_dpm_states()
3707 		if (pcie_table->dpm_levels[i].enabled) {  in ci_trim_pcie_dpm_states()
3709 				if (pcie_table->dpm_levels[j].enabled) {  in ci_trim_pcie_dpm_states()
3710 					if ((pcie_table->dpm_levels[i].value == pcie_table->dpm_levels[j].value) &&  in ci_trim_pcie_dpm_states()
3711 					    (pcie_table->dpm_levels[i].param1 == pcie_table->dpm_levels[j].param1))  in ci_trim_pcie_dpm_states()
3712 						pcie_table->dpm_levels[j].enabled = false;  in ci_trim_pcie_dpm_states()
3839 		if (sclk == sclk_table->dpm_levels[i].value)  in ci_find_dpm_states_clocks_in_dpm_table()
3852 		if (mclk == mclk_table->dpm_levels[i].value)  in ci_find_dpm_states_clocks_in_dpm_table()
3878 		dpm_table->sclk_table.dpm_levels[dpm_table->sclk_table.count-1].value = sclk;  in ci_populate_and_upload_sclk_mclk_dpm_levels()
3881 		dpm_table->mclk_table.dpm_levels[dpm_table->mclk_table.count-1].value = mclk;  in ci_populate_and_upload_sclk_mclk_dpm_levels()
4713 						     pi->dpm_table.mclk_table.dpm_levels[i].value,  in ci_convert_mc_reg_table_to_smc()