114 nv40_fan_pwm_ctrl(struct nvkm_therm *therm, int line, bool enable)  in nv40_fan_pwm_ctrl()  argument
117 	if      (line == 2) nv_mask(therm, 0x0010f0, 0x80000000, mask);  in nv40_fan_pwm_ctrl()
118 	else if (line == 9) nv_mask(therm, 0x0015f4, 0x80000000, mask);  in nv40_fan_pwm_ctrl()
120 		nv_error(therm, "unknown pwm ctrl for gpio %d\n", line);  in nv40_fan_pwm_ctrl()
127 nv40_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty)  in nv40_fan_pwm_get()  argument
129 	if (line == 2) {  in nv40_fan_pwm_get()
137 	if (line == 9) {  in nv40_fan_pwm_get()
145 		nv_error(therm, "unknown pwm ctrl for gpio %d\n", line);  in nv40_fan_pwm_get()
153 nv40_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty)  in nv40_fan_pwm_set()  argument
155 	if (line == 2) {  in nv40_fan_pwm_set()
158 	if (line == 9) {  in nv40_fan_pwm_set()
162 		nv_error(therm, "unknown pwm ctrl for gpio %d\n", line);  in nv40_fan_pwm_set()