28 	u32 addr;  member
41 	nv_wri2cr(mast, chan->addr, 0xa0, link_bw);  in anx9805_train()
42 	nv_wri2cr(mast, chan->addr, 0xa1, link_nr | (enh ? 0x80 : 0x00));  in anx9805_train()
43 	nv_wri2cr(mast, chan->addr, 0xa2, 0x01);  in anx9805_train()
44 	nv_wri2cr(mast, chan->addr, 0xa8, 0x01);  in anx9805_train()
47 	while ((tmp = nv_rdi2cr(mast, chan->addr, 0xa8)) & 0x01) {  in anx9805_train()
65 	    u8 type, u32 addr, u8 *data, u8 size)  in anx9805_aux()  argument
73 	DBG("%02x %05x %d\n", type, addr, size);  in anx9805_aux()
80 	nv_wri2cr(mast, chan->addr, 0xe4, 0x80);  in anx9805_aux()
85 			nv_wri2cr(mast, chan->addr, 0xf0 + i, buf[i]);  in anx9805_aux()
87 	nv_wri2cr(mast, chan->addr, 0xe5, ((size - 1) << 4) | type);  in anx9805_aux()
88 	nv_wri2cr(mast, chan->addr, 0xe6, (addr & 0x000ff) >>  0);  in anx9805_aux()
89 	nv_wri2cr(mast, chan->addr, 0xe7, (addr & 0x0ff00) >>  8);  in anx9805_aux()
90 	nv_wri2cr(mast, chan->addr, 0xe8, (addr & 0xf0000) >> 16);  in anx9805_aux()
91 	nv_wri2cr(mast, chan->addr, 0xe9, 0x01);  in anx9805_aux()
94 	while ((tmp = nv_rdi2cr(mast, chan->addr, 0xe9)) & 0x01) {  in anx9805_aux()
107 			buf[i] = nv_rdi2cr(mast, chan->addr, 0xf0 + i);  in anx9805_aux()
143 		chan->addr = 0x38;  in anx9805_aux_chan_ctor()
147 		chan->addr = 0x3c;  in anx9805_aux_chan_ctor()
183 	nv_wri2cr(mast, port->addr, 0x43, 0x05);  in anx9805_xfer()
187 		if ( (msg->flags & I2C_M_RD) && msg->addr == 0x50) {  in anx9805_xfer()
188 			nv_wri2cr(mast, port->addr, 0x40, msg->addr << 1);  in anx9805_xfer()
189 			nv_wri2cr(mast, port->addr, 0x41, seg);  in anx9805_xfer()
190 			nv_wri2cr(mast, port->addr, 0x42, off);  in anx9805_xfer()
191 			nv_wri2cr(mast, port->addr, 0x44, msg->len);  in anx9805_xfer()
192 			nv_wri2cr(mast, port->addr, 0x45, 0x00);  in anx9805_xfer()
193 			nv_wri2cr(mast, port->addr, 0x43, 0x01);  in anx9805_xfer()
196 				while (nv_rdi2cr(mast, port->addr, 0x46) & 0x10) {  in anx9805_xfer()
201 				msg->buf[i] = nv_rdi2cr(mast, port->addr, 0x47);  in anx9805_xfer()
205 			if (msg->addr == 0x50 && msg->len == 0x01) {  in anx9805_xfer()
208 			if (msg->addr == 0x30 && msg->len == 0x01) {  in anx9805_xfer()
220 	nv_wri2cr(mast, port->addr, 0x43, 0x00);  in anx9805_xfer()
258 		port->addr = 0x3d;  in anx9805_ddc_port_ctor()
262 		port->addr = 0x3f;  in anx9805_ddc_port_ctor()