Lines Matching refs:timing
71 } ramcfg, timing; in nv50_ram_calc() local
100 timing.data = nvbios_timingEe(bios, strap, &ver, &hdr, in nv50_ram_calc()
102 if (!timing.data || ver != 0x10 || hdr < 0x12) { in nv50_ram_calc()
105 strap, timing.data, ver, hdr); in nv50_ram_calc()
109 timing.data = 0; in nv50_ram_calc()
173 ram_mask(hwsq, timing[3], 0x00000000, 0x00000000); /*XXX*/ in nv50_ram_calc()
174 ram_mask(hwsq, timing[1], 0x00000000, 0x00000000); /*XXX*/ in nv50_ram_calc()
175 ram_mask(hwsq, timing[6], 0x00000000, 0x00000000); /*XXX*/ in nv50_ram_calc()
176 ram_mask(hwsq, timing[7], 0x00000000, 0x00000000); /*XXX*/ in nv50_ram_calc()
177 ram_mask(hwsq, timing[8], 0x00000000, 0x00000000); /*XXX*/ in nv50_ram_calc()
178 ram_mask(hwsq, timing[0], 0x00000000, 0x00000000); /*XXX*/ in nv50_ram_calc()
179 ram_mask(hwsq, timing[2], 0x00000000, 0x00000000); /*XXX*/ in nv50_ram_calc()
180 ram_mask(hwsq, timing[4], 0x00000000, 0x00000000); /*XXX*/ in nv50_ram_calc()
181 ram_mask(hwsq, timing[5], 0x00000000, 0x00000000); /*XXX*/ in nv50_ram_calc()
183 ram_mask(hwsq, timing[0], 0x00000000, 0x00000000); /*XXX*/ in nv50_ram_calc()