30 		  u32 flags, struct nvkm_fb_tile *tile)  in nv20_fb_tile_init()  argument
32 	tile->addr  = 0x00000001 | addr;  in nv20_fb_tile_init()
33 	tile->limit = max(1u, addr + size) - 1;  in nv20_fb_tile_init()
34 	tile->pitch = pitch;  in nv20_fb_tile_init()
36 		pfb->tile.comp(pfb, i, size, flags, tile);  in nv20_fb_tile_init()
37 		tile->addr |= 2;  in nv20_fb_tile_init()
43 		  struct nvkm_fb_tile *tile)  in nv20_fb_tile_comp()  argument
47 	if (!nvkm_mm_head(&pfb->tags, 0, 1, tags, tags, 1, &tile->tag)) {  in nv20_fb_tile_comp()
48 		if (!(flags & 2)) tile->zcomp = 0x00000000; /* Z16 */  in nv20_fb_tile_comp()
49 		else              tile->zcomp = 0x04000000; /* Z24S8 */  in nv20_fb_tile_comp()
50 		tile->zcomp |= tile->tag->offset;  in nv20_fb_tile_comp()
51 		tile->zcomp |= 0x80000000; /* enable */  in nv20_fb_tile_comp()
53 		tile->zcomp |= 0x08000000;  in nv20_fb_tile_comp()
59 nv20_fb_tile_fini(struct nvkm_fb *pfb, int i, struct nvkm_fb_tile *tile)  in nv20_fb_tile_fini()  argument
61 	tile->addr  = 0;  in nv20_fb_tile_fini()
62 	tile->limit = 0;  in nv20_fb_tile_fini()
63 	tile->pitch = 0;  in nv20_fb_tile_fini()
64 	tile->zcomp = 0;  in nv20_fb_tile_fini()
65 	nvkm_mm_free(&pfb->tags, &tile->tag);  in nv20_fb_tile_fini()
69 nv20_fb_tile_prog(struct nvkm_fb *pfb, int i, struct nvkm_fb_tile *tile)  in nv20_fb_tile_prog()  argument
71 	nv_wr32(pfb, 0x100244 + (i * 0x10), tile->limit);  in nv20_fb_tile_prog()
72 	nv_wr32(pfb, 0x100248 + (i * 0x10), tile->pitch);  in nv20_fb_tile_prog()
73 	nv_wr32(pfb, 0x100240 + (i * 0x10), tile->addr);  in nv20_fb_tile_prog()
75 	nv_wr32(pfb, 0x100300 + (i * 0x04), tile->zcomp);  in nv20_fb_tile_prog()
89 	.tile.regions = 8,
90 	.tile.init = nv20_fb_tile_init,
91 	.tile.comp = nv20_fb_tile_comp,
92 	.tile.fini = nv20_fb_tile_fini,
93 	.tile.prog = nv20_fb_tile_prog,