Lines Matching refs:mast
127 u32 src, mast = nv_rd32(priv, 0x00c040); in read_pll_ref() local
131 src = !!(mast & 0x00200000); in read_pll_ref()
134 src = !!(mast & 0x00400000); in read_pll_ref()
137 src = !!(mast & 0x00010000); in read_pll_ref()
140 src = !!(mast & 0x02000000); in read_pll_ref()
159 u32 mast = nv_rd32(priv, 0x00c040); in read_pll() local
166 if (base == 0x004028 && (mast & 0x00100000)) { in read_pll()
193 u32 mast = nv_rd32(priv, 0x00c040); in nv50_clk_read() local
208 switch (mast & 0x30000000) { in nv50_clk_read()
216 if (!(mast & 0x00100000)) in nv50_clk_read()
218 switch (mast & 0x00000003) { in nv50_clk_read()
227 switch (mast & 0x00000030) { in nv50_clk_read()
229 if (mast & 0x00000080) in nv50_clk_read()
240 switch (mast & 0x0000c000) { in nv50_clk_read()
260 switch (mast & 0x00000c00) { in nv50_clk_read()
268 if (mast & 0x01000000) in nv50_clk_read()
276 switch (mast & 0x00000c00) { in nv50_clk_read()
301 switch (mast & 0x0c000000) { in nv50_clk_read()
316 nv_debug(priv, "unknown clock source %d 0x%08x\n", src, mast); in nv50_clk_read()
440 clk_mask(hwsq, mast, mastm, 0x00000000); in nv50_clk_calc()
442 clk_mask(hwsq, mast, mastm, mastv); in nv50_clk_calc()
448 clk_mask(hwsq, mast, 0x001000b0, 0x00100080); in nv50_clk_calc()
450 clk_mask(hwsq, mast, 0x000000b3, 0x00000081); in nv50_clk_calc()
469 clk_mask(hwsq, mast, 0x00100033, 0x00000023); in nv50_clk_calc()
478 clk_mask(hwsq, mast, 0x00100033, 0x00000033); in nv50_clk_calc()