43 read_vco(struct gt215_clk_priv *priv, int clk)  in read_vco()  argument
45 	u32 sctl = nv_rd32(priv, 0x4120 + (clk * 4));  in read_vco()
60 read_clk(struct gt215_clk_priv *priv, int clk, bool ignore_en)  in read_clk()  argument
65 	if (clk >= 0x40) {  in read_clk()
74 	sctl = nv_rd32(priv, 0x4120 + (clk * 4));  in read_clk()
97 		sclk = read_vco(priv, clk);  in read_clk()
106 read_pll(struct gt215_clk_priv *priv, int clk, u32 pll)  in read_pll()  argument
124 			sclk = read_clk(priv, 0x00 + clk, false);  in read_pll()
127 		sclk = read_clk(priv, 0x10 + clk, false);  in read_pll()
137 gt215_clk_read(struct nvkm_clk *clk, enum nv_clk_src src)  in gt215_clk_read()  argument
139 	struct gt215_clk_priv *priv = (void *)clk;  in gt215_clk_read()
167 			nv_error(clk, "unknown HOST clock source %d\n", hsrc);  in gt215_clk_read()
171 		nv_error(clk, "invalid clock source %d\n", src);  in gt215_clk_read()
179 gt215_clk_info(struct nvkm_clk *clock, int clk, u32 khz,  in gt215_clk_info()  argument
185 	info->clk = 0;  in gt215_clk_info()
189 		info->clk = 0x00000100;  in gt215_clk_info()
192 		info->clk = 0x00002100;  in gt215_clk_info()
195 		info->clk = 0x00002140;  in gt215_clk_info()
198 		sclk = read_vco(priv, clk);  in gt215_clk_info()
215 			info->clk = (((sdiv - 2) << 16) | 0x00003100);  in gt215_clk_info()
226 gt215_pll_info(struct nvkm_clk *clock, int clk, u32 pll, u32 khz,  in gt215_pll_info()  argument
239 	ret = gt215_clk_info(clock, clk, khz, info);  in gt215_pll_info()
250 	ret = gt215_clk_info(clock, clk - 0x10, limits.refclk, info);  in gt215_pll_info()
266 	 int clk, u32 pll, int idx)  in calc_clk()  argument
268 	int ret = gt215_pll_info(&priv->base, clk, pll, cstate->domain[idx],  in calc_clk()
283 		info->clk = 0;  in calc_host()
298 gt215_clk_pre(struct nvkm_clk *clk, unsigned long *flags)  in gt215_clk_pre()  argument
300 	struct nvkm_fifo *pfifo = nvkm_fifo(clk);  in gt215_clk_pre()
303 	nv_mask(clk, 0x020060, 0x00070000, 0x00000000);  in gt215_clk_pre()
304 	nv_mask(clk, 0x002504, 0x00000001, 0x00000001);  in gt215_clk_pre()
306 	if (!nv_wait(clk, 0x000100, 0xffffffff, 0x00000000))  in gt215_clk_pre()
312 	if (!nv_wait(clk, 0x002504, 0x00000010, 0x00000010))  in gt215_clk_pre()
314 	if (!nv_wait(clk, 0x00251c, 0x0000003f, 0x0000003f))  in gt215_clk_pre()
321 gt215_clk_post(struct nvkm_clk *clk, unsigned long *flags)  in gt215_clk_post()  argument
323 	struct nvkm_fifo *pfifo = nvkm_fifo(clk);  in gt215_clk_post()
328 	nv_mask(clk, 0x002504, 0x00000001, 0x00000000);  in gt215_clk_post()
329 	nv_mask(clk, 0x020060, 0x00070000, 0x00040000);  in gt215_clk_post()
340 prog_pll(struct gt215_clk_priv *priv, int clk, u32 pll, int idx)  in prog_pll()  argument
343 	const u32 src0 = 0x004120 + (clk * 4);  in prog_pll()
344 	const u32 src1 = 0x004160 + (clk * 4);  in prog_pll()
358 		nv_mask(priv, src0, 0x003f3141, 0x00000101 | info->clk);  in prog_pll()
371 		nv_mask(priv, src1, 0x003f3141, 0x00000101 | info->clk);  in prog_pll()
380 prog_clk(struct gt215_clk_priv *priv, int clk, int idx)  in prog_clk()  argument
383 	nv_mask(priv, 0x004120 + (clk * 4), 0x003f3141, 0x00000101 | info->clk);  in prog_clk()
429 gt215_clk_calc(struct nvkm_clk *clk, struct nvkm_cstate *cstate)  in gt215_clk_calc()  argument
431 	struct gt215_clk_priv *priv = (void *)clk;  in gt215_clk_calc()
445 		ret = gt215_clk_info(clk, 0x10,  in gt215_clk_calc()
456 gt215_clk_prog(struct nvkm_clk *clk)  in gt215_clk_prog()  argument
458 	struct gt215_clk_priv *priv = (void *)clk;  in gt215_clk_prog()
464 	ret = gt215_clk_pre(clk, f);  in gt215_clk_prog()
481 	gt215_clk_post(clk, f);  in gt215_clk_prog()
486 gt215_clk_tidy(struct nvkm_clk *clk)  in gt215_clk_tidy()  argument